Show patches with: Submitter = Alistair Francis       |    State = Action Required       |    Archived = No       |   1321 patches
« 1 2 3 4 … 13 14 »
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[PULL,v2,50/50] hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,49/50] target/riscv: Support Supm and Sspm as part of Zjpm v1.0 [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,48/50] hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,47/50] target/riscv: Add Smdbltrp ISA extension enable switch [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,46/50] target/riscv: Implement Smdbltrp behavior [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,45/50] target/riscv: Implement Smdbltrp sret, mret and mnret behavior [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,44/50] target/riscv: Add Smdbltrp CSRs handling [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,43/50] target/riscv: Add Ssdbltrp ISA extension enable switch [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,42/50] target/riscv: Implement Ssdbltrp exception handling [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,41/50] target/riscv: Implement Ssdbltrp sret, mret and mnret behavior [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,40/50] target/riscv: Add Ssdbltrp CSRs handling [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,39/50] target/riscv: Fix henvcfg potentially containing stale bits [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,38/50] target/riscv: Add configuration for S[m|s]csrind, Smcdeleg/Ssccfg [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,37/50] target/riscv: Add implied rule for counter delegation extensions [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,36/50] target/riscv: Invoke pmu init after feature enable [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,35/50] target/riscv: Add counter delegation/configuration support [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,34/50] target/riscv: Add select value range check for counter delegation [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,33/50] target/riscv: Add counter delegation definitions [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,32/50] target/riscv: Add properties for counter delegation ISA extensions [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,31/50] target/riscv: Support generic CSR indirect access [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,30/50] target/riscv: Enable S*stateen bits for AIA [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,29/50] target/riscv: Decouple AIA processing from xiselect and xireg [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,28/50] target/riscv: Add properties for Indirect CSR Access extension [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,27/50] hw/riscv/virt: Remove unnecessary use of &first_cpu [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,26/50] target/riscv: Have kvm_riscv_get_timebase_frequency() take RISCVCPU cpu [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,25/50] target/riscv: Add Zicfilp support for Smrnmi [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,24/50] target/riscv: Add Smrnmi cpu extension [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,23/50] target/riscv: Add Smrnmi mnret instruction [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,22/50] target/riscv: Handle Smrnmi interrupt and exception [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,21/50] target/riscv: Add Smrnmi CSRs [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,20/50] target/riscv: Add 'ext_smrnmi' in the RISCVCPUConfig [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,19/50] target/riscv: Enable updates for pointer masking variables and thus enable pointer … [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,18/50] target/riscv: Apply pointer masking for virtualized memory accesses [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,17/50] target/riscv: Update address modify functions to take into account pointer masking [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,16/50] target/riscv: Add pointer masking tb flags [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 3 - --- 2025-01-19 Alistair Francis New
[PULL,v2,15/50] target/riscv: Add helper functions to calculate current number of masked bits for p… [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,14/50] target/riscv: Add new CSR fields for S{sn, mn, m}pm extensions as part of Zjpm v1.0 [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,13/50] target/riscv: Remove obsolete pointer masking extension code. [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - - - --- 2025-01-19 Alistair Francis New
[PULL,v2,12/50] target/riscv: add trace in riscv_raise_exception() [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,11/50] target/riscv: use RISCVException enum in exception helpers [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,10/50] target/riscv/tcg: add sha [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,09/50] target/riscv: add shgatpa [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,08/50] target/riscv: add shvsatpa [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,07/50] target/riscv: add shvstvecd [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,06/50] target/riscv: add shtvala [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,05/50] target/riscv: add shvstvala [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,04/50] target/riscv: add shcounterenw [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,03/50] riscv/gdbstub: add V bit to priv reg [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,02/50] target/riscv: rvv: speed up small unit-stride loads and stores [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 3 - --- 2025-01-19 Alistair Francis New
[PULL,v2,00/50] riscv-to-apply queue - - - - --- 2025-01-19 Alistair Francis New
[PULL,50/50] hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,49/50] target/riscv: Support Supm and Sspm as part of Zjpm v1.0 [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,48/50] hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,47/50] target/riscv: Add Smdbltrp ISA extension enable switch [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,46/50] target/riscv: Implement Smdbltrp behavior [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,45/50] target/riscv: Implement Smdbltrp sret, mret and mnret behavior [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,44/50] target/riscv: Add Smdbltrp CSRs handling [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,43/50] target/riscv: Add Ssdbltrp ISA extension enable switch [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,42/50] target/riscv: Implement Ssdbltrp exception handling [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,41/50] target/riscv: Implement Ssdbltrp sret, mret and mnret behavior [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,40/50] target/riscv: Add Ssdbltrp CSRs handling [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,39/50] target/riscv: Fix henvcfg potentially containing stale bits [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,38/50] target/riscv: Add configuration for S[m|s]csrind, Smcdeleg/Ssccfg [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - 1 - --- 2025-01-17 Alistair Francis New
[PULL,37/50] target/riscv: Add implied rule for counter delegation extensions [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - 1 - --- 2025-01-17 Alistair Francis New
[PULL,36/50] target/riscv: Invoke pmu init after feature enable [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,35/50] target/riscv: Add counter delegation/configuration support [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - 1 - --- 2025-01-17 Alistair Francis New
[PULL,34/50] target/riscv: Add select value range check for counter delegation [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,33/50] target/riscv: Add counter delegation definitions [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,32/50] target/riscv: Add properties for counter delegation ISA extensions [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,31/50] target/riscv: Support generic CSR indirect access [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - 1 - --- 2025-01-17 Alistair Francis New
[PULL,30/50] target/riscv: Enable S*stateen bits for AIA [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,29/50] target/riscv: Decouple AIA processing from xiselect and xireg [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,28/50] target/riscv: Add properties for Indirect CSR Access extension [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - 1 - --- 2025-01-17 Alistair Francis New
[PULL,27/50] hw/riscv/virt: Remove unnecessary use of &first_cpu [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,26/50] target/riscv: Have kvm_riscv_get_timebase_frequency() take RISCVCPU cpu [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,25/50] target/riscv: Add Zicfilp support for Smrnmi [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,24/50] target/riscv: Add Smrnmi cpu extension [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,23/50] target/riscv: Add Smrnmi mnret instruction [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,22/50] target/riscv: Handle Smrnmi interrupt and exception [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,21/50] target/riscv: Add Smrnmi CSRs [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,20/50] target/riscv: Add 'ext_smrnmi' in the RISCVCPUConfig [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,19/50] target/riscv: Enable updates for pointer masking variables and thus enable pointer mas… [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,18/50] target/riscv: Apply pointer masking for virtualized memory accesses [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,17/50] target/riscv: Update address modify functions to take into account pointer masking [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,16/50] target/riscv: Add pointer masking tb flags [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 3 - --- 2025-01-17 Alistair Francis New
[PULL,15/50] target/riscv: Add helper functions to calculate current number of masked bits for poin… [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,14/50] target/riscv: Add new CSR fields for S{sn, mn, m}pm extensions as part of Zjpm v1.0 [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,13/50] target/riscv: Remove obsolete pointer masking extension code. [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - - - --- 2025-01-17 Alistair Francis New
[PULL,12/50] target/riscv: add trace in riscv_raise_exception() [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,11/50] target/riscv: use RISCVException enum in exception helpers [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
[PULL,10/50] target/riscv/tcg: add sha [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,09/50] target/riscv: add shgatpa [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,08/50] target/riscv: add shvsatpa [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,07/50] target/riscv: add shvstvecd [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,06/50] target/riscv: add shtvala [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,05/50] target/riscv: add shvstvala [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,04/50] target/riscv: add shcounterenw [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,03/50] riscv/gdbstub: add V bit to priv reg [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 1 - --- 2025-01-17 Alistair Francis New
[PULL,02/50] target/riscv: rvv: speed up small unit-stride loads and stores [PULL,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - - 2 - --- 2025-01-17 Alistair Francis New
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