Show patches with: Series = [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)       |    State = Action Required       |    Archived = No       |   47 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[PULL,47/47] hw/intc: riscv-imsic: Fix interrupt state updates. [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,46/47] target/riscv/cpu_helper: Fix linking problem with semihosting disabled [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,45/47] target/riscv32: Fix masking of physical address [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - 1 2 - --- 2024-09-12 Alistair Francis New
[PULL,44/47] target: riscv: Add Svvptc extension support [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,43/47] hw/riscv: Respect firmware ELF entry point [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,42/47] bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,41/47] bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,40/47] bsd-user: Implement 'get_mcontext' for RISC-V [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,39/47] bsd-user: Implement RISC-V signal trampoline setup functions [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,38/47] bsd-user: Define RISC-V signal handling structures and constants [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,37/47] bsd-user: Add generic RISC-V64 target definitions [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,36/47] bsd-user: Define RISC-V system call structures and constants [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,35/47] bsd-user: Define RISC-V VM parameters and helper functions [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,34/47] bsd-user: Add RISC-V thread setup and initialization support [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,33/47] bsd-user: Implement RISC-V sysarch system call emulation [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,32/47] bsd-user: Add RISC-V signal trampoline setup function [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,31/47] bsd-user: Define RISC-V register structures and register copying [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,30/47] bsd-user: Add RISC-V ELF definitions and hardware capability detection [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,29/47] bsd-user: Implement RISC-V TLS register setup [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,28/47] bsd-user: Implement RISC-V CPU register cloning and reset functions [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,27/47] bsd-user: Add RISC-V CPU execution loop and syscall handling [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,26/47] bsd-user: Implement RISC-V CPU initialization and main loop [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,25/47] docs/specs: add riscv-iommu [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,24/47] qtest/riscv-iommu-test: add init queues test [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) 1 - 1 - --- 2024-09-12 Alistair Francis New
[PULL,23/47] hw/riscv/riscv-iommu: add DBG support [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 2 - --- 2024-09-12 Alistair Francis New
[PULL,22/47] hw/riscv/riscv-iommu: add ATS support [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) 1 - 1 - --- 2024-09-12 Alistair Francis New
[PULL,21/47] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC) [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) 1 - 1 - --- 2024-09-12 Alistair Francis New
[PULL,20/47] test/qtest: add riscv-iommu-pci tests [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) 1 - 1 - --- 2024-09-12 Alistair Francis New
[PULL,19/47] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 2 - --- 2024-09-12 Alistair Francis New
[PULL,18/47] hw/riscv: add riscv-iommu-pci reference device [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 2 - --- 2024-09-12 Alistair Francis New
[PULL,17/47] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 2 - --- 2024-09-12 Alistair Francis New
[PULL,16/47] hw/riscv: add RISC-V IOMMU base emulation [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) 1 - - - --- 2024-09-12 Alistair Francis New
[PULL,15/47] hw/riscv: add riscv-iommu-bits.h [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 3 - --- 2024-09-12 Alistair Francis New
[PULL,14/47] exec/memtxattr: add process identifier to the transaction attributes [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 3 - --- 2024-09-12 Alistair Francis New
[PULL,13/47] target/riscv: Add textra matching condition for the triggers [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,12/47] target/riscv: Preliminary textra trigger CSR writting support [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,11/47] util/util/cpuinfo-riscv.c: fix riscv64 build on musl libc [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,10/47] target/riscv/cpu.c: Add 'fcsr' register to QEMU log as a part of F extension [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 2 - --- 2024-09-12 Alistair Francis New
[PULL,09/47] target/riscv: Stop timer with infinite timecmp [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - 1 1 - --- 2024-09-12 Alistair Francis New
[PULL,08/47] target/riscv/kvm: Fix the group bit setting of AIA [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,07/47] target: riscv: Enable Bit Manip for OpenTitan Ibex CPU [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New
[PULL,06/47] target/riscv: fix za64rs enabling [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - 1 2 - --- 2024-09-12 Alistair Francis New
[PULL,05/47] target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - 1 1 - --- 2024-09-12 Alistair Francis New
[PULL,04/47] tests/acpi: Add expected ACPI SRAT AML file for RISC-V [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) 1 - 1 - --- 2024-09-12 Alistair Francis New
[PULL,03/47] tests/qtest/bios-tables-test.c: Enable numamem testing for RISC-V [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) 1 - 1 - --- 2024-09-12 Alistair Francis New
[PULL,02/47] tests/acpi: Add empty ACPI SRAT data file for RISC-V [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) 1 - 1 - --- 2024-09-12 Alistair Francis New
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) [PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2) - - 1 - --- 2024-09-12 Alistair Francis New