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[0/5] Introduce svukte ISA extension

Message ID 20240903061757.1114957-1-fea.wang@sifive.com
Headers show
Series Introduce svukte ISA extension | expand

Message

Fea.Wang Sept. 3, 2024, 6:17 a.m. UTC 
Refer to the draft of svukte extension from:
https://github.com/riscv/riscv-isa-manual/pull/1564

Svukte provides a means to make user-mode accesses to supervisor memory
raise page faults in constant time, mitigating attacks that attempt to
discover the supervisor software's address-space layout.

base-commit: 8d0a03f689bff16c93df311fdd724c2736d28556

* Add svukte extension

Fea.Wang (5):
  target/riscv: Add svukte extension capability variable
  target/riscv: Support senvcfg[UKTE] bit when svukte extension is
    enabled
  target/riscv: Support hstatus[HUKTE] bit when svukte extension is
    enabled
  target/riscv: Check memory access to meet svuket rule
  target/riscv: Expose svukte ISA extension

 target/riscv/cpu.c        |  2 ++
 target/riscv/cpu_bits.h   |  2 ++
 target/riscv/cpu_cfg.h    |  1 +
 target/riscv/cpu_helper.c | 55 +++++++++++++++++++++++++++++++++++++++
 target/riscv/csr.c        |  7 +++++
 5 files changed, 67 insertions(+)

Comments

Alistair Francis Sept. 4, 2024, 12:07 a.m. UTC | #1 
On Tue, Sep 3, 2024 at 4:16 PM Fea.Wang <fea.wang@sifive.com> wrote:
>
> Refer to the draft of svukte extension from:
> https://github.com/riscv/riscv-isa-manual/pull/1564
>
> Svukte provides a means to make user-mode accesses to supervisor memory
> raise page faults in constant time, mitigating attacks that attempt to
> discover the supervisor software's address-space layout.

Overall looks fine, let's just wait for the spec to be a little more finalised

Alistair

>
> base-commit: 8d0a03f689bff16c93df311fdd724c2736d28556
>
> * Add svukte extension
>
> Fea.Wang (5):
>   target/riscv: Add svukte extension capability variable
>   target/riscv: Support senvcfg[UKTE] bit when svukte extension is
>     enabled
>   target/riscv: Support hstatus[HUKTE] bit when svukte extension is
>     enabled
>   target/riscv: Check memory access to meet svuket rule
>   target/riscv: Expose svukte ISA extension
>
>  target/riscv/cpu.c        |  2 ++
>  target/riscv/cpu_bits.h   |  2 ++
>  target/riscv/cpu_cfg.h    |  1 +
>  target/riscv/cpu_helper.c | 55 +++++++++++++++++++++++++++++++++++++++
>  target/riscv/csr.c        |  7 +++++
>  5 files changed, 67 insertions(+)
>
> --
> 2.34.1
>
>