| Message ID | 20240805043336.72548-2-alistair.francis@wdc.com |
|---|---|
| State | New |
| Headers | show |
| Series | target/riscv: Convert RISC-V custom bitops to standard ones | expand |
On 8/5/24 14:33, Alistair Francis wrote: > Based on the RISC-V get_field() and set_field() macros add > mask_extract64() and mask_deposit64() bitop functions. These can extrac > and deposit values into fields using a bit field mask directly instead > of a length and shift. > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > --- > include/qemu/bitops.h | 35 +++++++++++++++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h > index 2c0a2fe751..dd26f4a6b5 100644 > --- a/include/qemu/bitops.h > +++ b/include/qemu/bitops.h > @@ -409,6 +409,22 @@ static inline uint64_t extract64(uint64_t value, int start, int length) > return (value >> start) & (~0ULL >> (64 - length)); > } > > +/** > + * mask_extract64: > + * @value: the value to extract the bit field from > + * @mask: the mask bit field to extract > + * > + * Extract from the 64 bit input @value the bit mask specified by the > + * @mask parameter, and return it. The value returned is shifted > + * so that only the bit field is returned. > + * > + * Returns: the value of the bit field extracted from the input value. > + */ > +static inline uint64_t mask_extract64(uint64_t value, uint64_t mask) > +{ > + return (value & mask) / (mask & ~(mask << 1)); > +} Adding these miss the point of using "standard" qemu operations. But if we were going to add this, avoid the division. (value & mask) >> ctz64(mask) I presume the original formulation is so that the macro can be used in the context of a compile-time constant. r~
On Tue, Aug 6, 2024 at 5:32 PM Richard Henderson <richard.henderson@linaro.org> wrote: > > On 8/5/24 14:33, Alistair Francis wrote: > > Based on the RISC-V get_field() and set_field() macros add > > mask_extract64() and mask_deposit64() bitop functions. These can extrac > > and deposit values into fields using a bit field mask directly instead > > of a length and shift. > > > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > > --- > > include/qemu/bitops.h | 35 +++++++++++++++++++++++++++++++++++ > > 1 file changed, 35 insertions(+) > > > > diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h > > index 2c0a2fe751..dd26f4a6b5 100644 > > --- a/include/qemu/bitops.h > > +++ b/include/qemu/bitops.h > > @@ -409,6 +409,22 @@ static inline uint64_t extract64(uint64_t value, int start, int length) > > return (value >> start) & (~0ULL >> (64 - length)); > > } > > > > +/** > > + * mask_extract64: > > + * @value: the value to extract the bit field from > > + * @mask: the mask bit field to extract > > + * > > + * Extract from the 64 bit input @value the bit mask specified by the > > + * @mask parameter, and return it. The value returned is shifted > > + * so that only the bit field is returned. > > + * > > + * Returns: the value of the bit field extracted from the input value. > > + */ > > +static inline uint64_t mask_extract64(uint64_t value, uint64_t mask) > > +{ > > + return (value & mask) / (mask & ~(mask << 1)); > > +} > > Adding these miss the point of using "standard" qemu operations. My thinking is that if they are added then they become standard :) At least then they are included in core code and easier for people to understand. > > But if we were going to add this, avoid the division. > > (value & mask) >> ctz64(mask) Good point Alistair > > I presume the original formulation is so that the macro can be used in the context of a > compile-time constant. > > > r~
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h index 2c0a2fe751..dd26f4a6b5 100644 --- a/include/qemu/bitops.h +++ b/include/qemu/bitops.h @@ -409,6 +409,22 @@ static inline uint64_t extract64(uint64_t value, int start, int length) return (value >> start) & (~0ULL >> (64 - length)); } +/** + * mask_extract64: + * @value: the value to extract the bit field from + * @mask: the mask bit field to extract + * + * Extract from the 64 bit input @value the bit mask specified by the + * @mask parameter, and return it. The value returned is shifted + * so that only the bit field is returned. + * + * Returns: the value of the bit field extracted from the input value. + */ +static inline uint64_t mask_extract64(uint64_t value, uint64_t mask) +{ + return (value & mask) / (mask & ~(mask << 1)); +} + /** * sextract32: * @value: the value to extract the bit field from @@ -511,6 +527,25 @@ static inline uint64_t deposit64(uint64_t value, int start, int length, return (value & ~mask) | ((fieldval << start) & mask); } +/** + * mask_deposit64: + * @value: initial value to insert bit field into + * @mask: the mask bit field + * @fieldval: the value to insert into the bit field + * + * Deposit @fieldval into the 64 bit @value at the bit field specified + * by the @mask parameter, and return the modified + * @value. Bits of @value outside the bit field are not modified. + * Bits of @fieldval above @mask bits are ignored. + * + * Returns: the modified @value. + */ +static inline uint64_t mask_deposit64(uint64_t value, uint64_t mask, + uint64_t fieldval) +{ + return (value & ~mask) | ((fieldval * (mask & ~(mask << 1))) & mask); +} + /** * half_shuffle32: * @x: 32-bit value (of which only the bottom 16 bits are of interest)
Based on the RISC-V get_field() and set_field() macros add mask_extract64() and mask_deposit64() bitop functions. These can extrac and deposit values into fields using a bit field mask directly instead of a length and shift. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> --- include/qemu/bitops.h | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+)