| Message ID | 20240301144053.265964-1-dbarboza@ventanamicro.com |
|---|---|
| State | New |
| Headers | show |
| Series | target/riscv: move ratified/frozen exts to non-experimental | expand |
On Sat, Mar 2, 2024 at 12:41 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > smaia and ssaia were ratified in August 25th 2023 [1]. > > zvfh and zvfhmin were ratified in August 2nd 2023 [2]. > > zfbfmin and zvfbf(min|wma) are frozen and moved to public review since > Dec 16th 2023 [3]. > > zaamo and zalrsc are both marked as "Frozen" since January 24th 2024 > [4]. > > [1] https://jira.riscv.org/browse/RVS-438 > [2] https://jira.riscv.org/browse/RVS-871 > [3] https://jira.riscv.org/browse/RVS-704 > [4] https://jira.riscv.org/browse/RVS-1995 > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/cpu.c | 22 +++++++++------------- > 1 file changed, 9 insertions(+), 13 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index fd0c7efdda..f5d30510ef 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -1463,17 +1463,26 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { > MULTI_EXT_CFG_BOOL("zihintntl", ext_zihintntl, true), > MULTI_EXT_CFG_BOOL("zihintpause", ext_zihintpause, true), > MULTI_EXT_CFG_BOOL("zacas", ext_zacas, false), > + MULTI_EXT_CFG_BOOL("zaamo", ext_zaamo, false), > + MULTI_EXT_CFG_BOOL("zalrsc", ext_zalrsc, false), > MULTI_EXT_CFG_BOOL("zawrs", ext_zawrs, true), > MULTI_EXT_CFG_BOOL("zfa", ext_zfa, true), > + MULTI_EXT_CFG_BOOL("zfbfmin", ext_zfbfmin, false), > MULTI_EXT_CFG_BOOL("zfh", ext_zfh, false), > MULTI_EXT_CFG_BOOL("zfhmin", ext_zfhmin, false), > MULTI_EXT_CFG_BOOL("zve32f", ext_zve32f, false), > MULTI_EXT_CFG_BOOL("zve64f", ext_zve64f, false), > MULTI_EXT_CFG_BOOL("zve64d", ext_zve64d, false), > + MULTI_EXT_CFG_BOOL("zvfbfmin", ext_zvfbfmin, false), > + MULTI_EXT_CFG_BOOL("zvfbfwma", ext_zvfbfwma, false), > + MULTI_EXT_CFG_BOOL("zvfh", ext_zvfh, false), > + MULTI_EXT_CFG_BOOL("zvfhmin", ext_zvfhmin, false), > MULTI_EXT_CFG_BOOL("sstc", ext_sstc, true), > > + MULTI_EXT_CFG_BOOL("smaia", ext_smaia, false), > MULTI_EXT_CFG_BOOL("smepmp", ext_smepmp, false), > MULTI_EXT_CFG_BOOL("smstateen", ext_smstateen, false), > + MULTI_EXT_CFG_BOOL("ssaia", ext_ssaia, false), > MULTI_EXT_CFG_BOOL("svade", ext_svade, false), > MULTI_EXT_CFG_BOOL("svadu", ext_svadu, true), > MULTI_EXT_CFG_BOOL("svinval", ext_svinval, false), > @@ -1561,19 +1570,6 @@ const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { > > /* These are experimental so mark with 'x-' */ > const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { > - MULTI_EXT_CFG_BOOL("x-smaia", ext_smaia, false), > - MULTI_EXT_CFG_BOOL("x-ssaia", ext_ssaia, false), > - > - MULTI_EXT_CFG_BOOL("x-zaamo", ext_zaamo, false), > - MULTI_EXT_CFG_BOOL("x-zalrsc", ext_zalrsc, false), > - > - MULTI_EXT_CFG_BOOL("x-zvfh", ext_zvfh, false), > - MULTI_EXT_CFG_BOOL("x-zvfhmin", ext_zvfhmin, false), > - > - MULTI_EXT_CFG_BOOL("x-zfbfmin", ext_zfbfmin, false), > - MULTI_EXT_CFG_BOOL("x-zvfbfmin", ext_zvfbfmin, false), > - MULTI_EXT_CFG_BOOL("x-zvfbfwma", ext_zvfbfwma, false), > - > DEFINE_PROP_END_OF_LIST(), > }; > > -- > 2.43.2 > >
On Sat, Mar 2, 2024 at 12:41 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > smaia and ssaia were ratified in August 25th 2023 [1]. > > zvfh and zvfhmin were ratified in August 2nd 2023 [2]. > > zfbfmin and zvfbf(min|wma) are frozen and moved to public review since > Dec 16th 2023 [3]. > > zaamo and zalrsc are both marked as "Frozen" since January 24th 2024 > [4]. > > [1] https://jira.riscv.org/browse/RVS-438 > [2] https://jira.riscv.org/browse/RVS-871 > [3] https://jira.riscv.org/browse/RVS-704 > [4] https://jira.riscv.org/browse/RVS-1995 > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Thanks! Applied to riscv-to-apply.next Alistair > --- > target/riscv/cpu.c | 22 +++++++++------------- > 1 file changed, 9 insertions(+), 13 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index fd0c7efdda..f5d30510ef 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -1463,17 +1463,26 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { > MULTI_EXT_CFG_BOOL("zihintntl", ext_zihintntl, true), > MULTI_EXT_CFG_BOOL("zihintpause", ext_zihintpause, true), > MULTI_EXT_CFG_BOOL("zacas", ext_zacas, false), > + MULTI_EXT_CFG_BOOL("zaamo", ext_zaamo, false), > + MULTI_EXT_CFG_BOOL("zalrsc", ext_zalrsc, false), > MULTI_EXT_CFG_BOOL("zawrs", ext_zawrs, true), > MULTI_EXT_CFG_BOOL("zfa", ext_zfa, true), > + MULTI_EXT_CFG_BOOL("zfbfmin", ext_zfbfmin, false), > MULTI_EXT_CFG_BOOL("zfh", ext_zfh, false), > MULTI_EXT_CFG_BOOL("zfhmin", ext_zfhmin, false), > MULTI_EXT_CFG_BOOL("zve32f", ext_zve32f, false), > MULTI_EXT_CFG_BOOL("zve64f", ext_zve64f, false), > MULTI_EXT_CFG_BOOL("zve64d", ext_zve64d, false), > + MULTI_EXT_CFG_BOOL("zvfbfmin", ext_zvfbfmin, false), > + MULTI_EXT_CFG_BOOL("zvfbfwma", ext_zvfbfwma, false), > + MULTI_EXT_CFG_BOOL("zvfh", ext_zvfh, false), > + MULTI_EXT_CFG_BOOL("zvfhmin", ext_zvfhmin, false), > MULTI_EXT_CFG_BOOL("sstc", ext_sstc, true), > > + MULTI_EXT_CFG_BOOL("smaia", ext_smaia, false), > MULTI_EXT_CFG_BOOL("smepmp", ext_smepmp, false), > MULTI_EXT_CFG_BOOL("smstateen", ext_smstateen, false), > + MULTI_EXT_CFG_BOOL("ssaia", ext_ssaia, false), > MULTI_EXT_CFG_BOOL("svade", ext_svade, false), > MULTI_EXT_CFG_BOOL("svadu", ext_svadu, true), > MULTI_EXT_CFG_BOOL("svinval", ext_svinval, false), > @@ -1561,19 +1570,6 @@ const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { > > /* These are experimental so mark with 'x-' */ > const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { > - MULTI_EXT_CFG_BOOL("x-smaia", ext_smaia, false), > - MULTI_EXT_CFG_BOOL("x-ssaia", ext_ssaia, false), > - > - MULTI_EXT_CFG_BOOL("x-zaamo", ext_zaamo, false), > - MULTI_EXT_CFG_BOOL("x-zalrsc", ext_zalrsc, false), > - > - MULTI_EXT_CFG_BOOL("x-zvfh", ext_zvfh, false), > - MULTI_EXT_CFG_BOOL("x-zvfhmin", ext_zvfhmin, false), > - > - MULTI_EXT_CFG_BOOL("x-zfbfmin", ext_zfbfmin, false), > - MULTI_EXT_CFG_BOOL("x-zvfbfmin", ext_zvfbfmin, false), > - MULTI_EXT_CFG_BOOL("x-zvfbfwma", ext_zvfbfwma, false), > - > DEFINE_PROP_END_OF_LIST(), > }; > > -- > 2.43.2 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index fd0c7efdda..f5d30510ef 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1463,17 +1463,26 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { MULTI_EXT_CFG_BOOL("zihintntl", ext_zihintntl, true), MULTI_EXT_CFG_BOOL("zihintpause", ext_zihintpause, true), MULTI_EXT_CFG_BOOL("zacas", ext_zacas, false), + MULTI_EXT_CFG_BOOL("zaamo", ext_zaamo, false), + MULTI_EXT_CFG_BOOL("zalrsc", ext_zalrsc, false), MULTI_EXT_CFG_BOOL("zawrs", ext_zawrs, true), MULTI_EXT_CFG_BOOL("zfa", ext_zfa, true), + MULTI_EXT_CFG_BOOL("zfbfmin", ext_zfbfmin, false), MULTI_EXT_CFG_BOOL("zfh", ext_zfh, false), MULTI_EXT_CFG_BOOL("zfhmin", ext_zfhmin, false), MULTI_EXT_CFG_BOOL("zve32f", ext_zve32f, false), MULTI_EXT_CFG_BOOL("zve64f", ext_zve64f, false), MULTI_EXT_CFG_BOOL("zve64d", ext_zve64d, false), + MULTI_EXT_CFG_BOOL("zvfbfmin", ext_zvfbfmin, false), + MULTI_EXT_CFG_BOOL("zvfbfwma", ext_zvfbfwma, false), + MULTI_EXT_CFG_BOOL("zvfh", ext_zvfh, false), + MULTI_EXT_CFG_BOOL("zvfhmin", ext_zvfhmin, false), MULTI_EXT_CFG_BOOL("sstc", ext_sstc, true), + MULTI_EXT_CFG_BOOL("smaia", ext_smaia, false), MULTI_EXT_CFG_BOOL("smepmp", ext_smepmp, false), MULTI_EXT_CFG_BOOL("smstateen", ext_smstateen, false), + MULTI_EXT_CFG_BOOL("ssaia", ext_ssaia, false), MULTI_EXT_CFG_BOOL("svade", ext_svade, false), MULTI_EXT_CFG_BOOL("svadu", ext_svadu, true), MULTI_EXT_CFG_BOOL("svinval", ext_svinval, false), @@ -1561,19 +1570,6 @@ const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { /* These are experimental so mark with 'x-' */ const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { - MULTI_EXT_CFG_BOOL("x-smaia", ext_smaia, false), - MULTI_EXT_CFG_BOOL("x-ssaia", ext_ssaia, false), - - MULTI_EXT_CFG_BOOL("x-zaamo", ext_zaamo, false), - MULTI_EXT_CFG_BOOL("x-zalrsc", ext_zalrsc, false), - - MULTI_EXT_CFG_BOOL("x-zvfh", ext_zvfh, false), - MULTI_EXT_CFG_BOOL("x-zvfhmin", ext_zvfhmin, false), - - MULTI_EXT_CFG_BOOL("x-zfbfmin", ext_zfbfmin, false), - MULTI_EXT_CFG_BOOL("x-zvfbfmin", ext_zvfbfmin, false), - MULTI_EXT_CFG_BOOL("x-zvfbfwma", ext_zvfbfwma, false), - DEFINE_PROP_END_OF_LIST(), };
smaia and ssaia were ratified in August 25th 2023 [1]. zvfh and zvfhmin were ratified in August 2nd 2023 [2]. zfbfmin and zvfbf(min|wma) are frozen and moved to public review since Dec 16th 2023 [3]. zaamo and zalrsc are both marked as "Frozen" since January 24th 2024 [4]. [1] https://jira.riscv.org/browse/RVS-438 [2] https://jira.riscv.org/browse/RVS-871 [3] https://jira.riscv.org/browse/RVS-704 [4] https://jira.riscv.org/browse/RVS-1995 Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/cpu.c | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-)