Message ID | 20231122053800.1531799-1-alistair.francis@wdc.com |
---|---|
State | New |
Headers | show |
Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any user-visible changes.
22.11.2023 08:37, Alistair Francis wrote: ..> ---------------------------------------------------------------- > Fourth RISC-V PR for 8.2 > > This is a few bug fixes for the 8.2 release > > * Add Zicboz block size to hwprobe > * Creat the virt machine FDT before machine init is complete > * Don't verify ISA compatibility for zicntr and zihpm > * Fix SiFive E CLINT clock frequency > * Fix invalid exception on MMU translation stage > * Fix mxr bit behavior From this list, is there anything which is not suitable for stable? It seems all 6 changes should be picked for stable (8.1 and some even for 7.2). Maybe only "ISA compatibility for zicntr and zihpm" should be omitted? Thanks! /mjt
On Sun, Nov 26, 2023 at 7:08 AM Michael Tokarev <mjt@tls.msk.ru> wrote: > > 22.11.2023 08:37, Alistair Francis wrote: > ..> ---------------------------------------------------------------- > > Fourth RISC-V PR for 8.2 > > > > This is a few bug fixes for the 8.2 release > > > > * Add Zicboz block size to hwprobe > > * Creat the virt machine FDT before machine init is complete > > * Don't verify ISA compatibility for zicntr and zihpm > > * Fix SiFive E CLINT clock frequency > > * Fix invalid exception on MMU translation stage > > * Fix mxr bit behavior > > From this list, is there anything which is not suitable for stable? > It seems all 6 changes should be picked for stable (8.1 and some > even for 7.2). Maybe only "ISA compatibility for zicntr and zihpm" > should be omitted? These should all be fine for backporting. Sorry for the delay, I've been sick for the last week Alistair > > Thanks! > > /mjt