diff mbox series

[v2,12/14] disas/riscv: Add rv_codec_vror_vi for vror.vi

Message ID 20231026151828.754279-13-max.chou@sifive.com
State New
Headers show
Series Update RISC-V vector crypto to ratified v1.0.0 | expand

Commit Message

Max Chou Oct. 26, 2023, 3:18 p.m. UTC
Add rv_codec_vror_vi for the vector crypto instruction - vror.vi.
The rotate amount of vror.vi is defined by combining seperated bits.

Signed-off-by: Max Chou <max.chou@sifive.com>
---
 disas/riscv.c | 14 +++++++++++++-
 disas/riscv.h |  1 +
 2 files changed, 14 insertions(+), 1 deletion(-)

Comments

Alistair Francis Nov. 2, 2023, 12:57 a.m. UTC | #1
On Fri, Oct 27, 2023 at 2:47 AM Max Chou <max.chou@sifive.com> wrote:
>
> Add rv_codec_vror_vi for the vector crypto instruction - vror.vi.
> The rotate amount of vror.vi is defined by combining seperated bits.
>
> Signed-off-by: Max Chou <max.chou@sifive.com>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  disas/riscv.c | 14 +++++++++++++-
>  disas/riscv.h |  1 +
>  2 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/disas/riscv.c b/disas/riscv.c
> index 8e89e1d1157..ec33e447f5b 100644
> --- a/disas/riscv.c
> +++ b/disas/riscv.c
> @@ -4011,6 +4011,12 @@ static uint32_t operand_vzimm10(rv_inst inst)
>      return (inst << 34) >> 54;
>  }
>
> +static uint32_t operand_vzimm6(rv_inst inst)
> +{
> +    return ((inst << 37) >> 63) << 5 |
> +        ((inst << 44) >> 59);
> +}
> +
>  static uint32_t operand_bs(rv_inst inst)
>  {
>      return (inst << 32) >> 62;
> @@ -4393,6 +4399,12 @@ static void decode_inst_operands(rv_decode *dec, rv_isa isa)
>          dec->imm = operand_vimm(inst);
>          dec->vm = operand_vm(inst);
>          break;
> +    case rv_codec_vror_vi:
> +        dec->rd = operand_rd(inst);
> +        dec->rs2 = operand_rs2(inst);
> +        dec->imm = operand_vzimm6(inst);
> +        dec->vm = operand_vm(inst);
> +        break;
>      case rv_codec_vsetvli:
>          dec->rd = operand_rd(inst);
>          dec->rs1 = operand_rs1(inst);
> @@ -4677,7 +4689,7 @@ static void format_inst(char *buf, size_t buflen, size_t tab, rv_decode *dec)
>              append(buf, tmp, buflen);
>              break;
>          case 'u':
> -            snprintf(tmp, sizeof(tmp), "%u", ((uint32_t)dec->imm & 0b11111));
> +            snprintf(tmp, sizeof(tmp), "%u", ((uint32_t)dec->imm & 0b111111));
>              append(buf, tmp, buflen);
>              break;
>          case 'j':
> diff --git a/disas/riscv.h b/disas/riscv.h
> index b242d73b25e..19e5ed2ce63 100644
> --- a/disas/riscv.h
> +++ b/disas/riscv.h
> @@ -152,6 +152,7 @@ typedef enum {
>      rv_codec_v_i,
>      rv_codec_vsetvli,
>      rv_codec_vsetivli,
> +    rv_codec_vror_vi,
>      rv_codec_zcb_ext,
>      rv_codec_zcb_mul,
>      rv_codec_zcb_lb,
> --
> 2.34.1
>
>
diff mbox series

Patch

diff --git a/disas/riscv.c b/disas/riscv.c
index 8e89e1d1157..ec33e447f5b 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -4011,6 +4011,12 @@  static uint32_t operand_vzimm10(rv_inst inst)
     return (inst << 34) >> 54;
 }
 
+static uint32_t operand_vzimm6(rv_inst inst)
+{
+    return ((inst << 37) >> 63) << 5 |
+        ((inst << 44) >> 59);
+}
+
 static uint32_t operand_bs(rv_inst inst)
 {
     return (inst << 32) >> 62;
@@ -4393,6 +4399,12 @@  static void decode_inst_operands(rv_decode *dec, rv_isa isa)
         dec->imm = operand_vimm(inst);
         dec->vm = operand_vm(inst);
         break;
+    case rv_codec_vror_vi:
+        dec->rd = operand_rd(inst);
+        dec->rs2 = operand_rs2(inst);
+        dec->imm = operand_vzimm6(inst);
+        dec->vm = operand_vm(inst);
+        break;
     case rv_codec_vsetvli:
         dec->rd = operand_rd(inst);
         dec->rs1 = operand_rs1(inst);
@@ -4677,7 +4689,7 @@  static void format_inst(char *buf, size_t buflen, size_t tab, rv_decode *dec)
             append(buf, tmp, buflen);
             break;
         case 'u':
-            snprintf(tmp, sizeof(tmp), "%u", ((uint32_t)dec->imm & 0b11111));
+            snprintf(tmp, sizeof(tmp), "%u", ((uint32_t)dec->imm & 0b111111));
             append(buf, tmp, buflen);
             break;
         case 'j':
diff --git a/disas/riscv.h b/disas/riscv.h
index b242d73b25e..19e5ed2ce63 100644
--- a/disas/riscv.h
+++ b/disas/riscv.h
@@ -152,6 +152,7 @@  typedef enum {
     rv_codec_v_i,
     rv_codec_vsetvli,
     rv_codec_vsetivli,
+    rv_codec_vror_vi,
     rv_codec_zcb_ext,
     rv_codec_zcb_mul,
     rv_codec_zcb_lb,