Message ID | 20231026151828.754279-12-max.chou@sifive.com |
---|---|
State | New |
Headers | show |
Series | Update RISC-V vector crypto to ratified v1.0.0 | expand |
On Fri, Oct 27, 2023 at 1:21 AM Max Chou <max.chou@sifive.com> wrote: > > Add rv_fmt_vd_vs2_uimm format for vector crypto instructions. > > Signed-off-by: Max Chou <max.chou@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > disas/riscv.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/disas/riscv.h b/disas/riscv.h > index 8abb578b515..b242d73b25e 100644 > --- a/disas/riscv.h > +++ b/disas/riscv.h > @@ -274,6 +274,7 @@ enum { > #define rv_fmt_vd_vs2_fs1_vm "O\tD,F,4m" > #define rv_fmt_vd_vs2_imm_vl "O\tD,F,il" > #define rv_fmt_vd_vs2_imm_vm "O\tD,F,im" > +#define rv_fmt_vd_vs2_uimm "O\tD,F,u" > #define rv_fmt_vd_vs2_uimm_vm "O\tD,F,um" > #define rv_fmt_vd_vs1_vs2_vm "O\tD,E,Fm" > #define rv_fmt_vd_rs1_vs2_vm "O\tD,1,Fm" > -- > 2.34.1 > >
diff --git a/disas/riscv.h b/disas/riscv.h index 8abb578b515..b242d73b25e 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -274,6 +274,7 @@ enum { #define rv_fmt_vd_vs2_fs1_vm "O\tD,F,4m" #define rv_fmt_vd_vs2_imm_vl "O\tD,F,il" #define rv_fmt_vd_vs2_imm_vm "O\tD,F,im" +#define rv_fmt_vd_vs2_uimm "O\tD,F,u" #define rv_fmt_vd_vs2_uimm_vm "O\tD,F,um" #define rv_fmt_vd_vs1_vs2_vm "O\tD,E,Fm" #define rv_fmt_vd_rs1_vs2_vm "O\tD,1,Fm"
Add rv_fmt_vd_vs2_uimm format for vector crypto instructions. Signed-off-by: Max Chou <max.chou@sifive.com> --- disas/riscv.h | 1 + 1 file changed, 1 insertion(+)