Message ID | 20230728131520.110394-3-dbarboza@ventanamicro.com |
---|---|
State | New |
Headers | show |
Series | riscv: detecting user choice in TCG extensions | expand |
On Fri, Jul 28, 2023 at 9:20 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > The RISC-V KVM driver uses a CPUCFG() macro that calculates the offset > of a certain field in the struct RISCVCPUConfig. We're going to use this > macro in target/riscv/cpu.c as well in the next patches. Make it public. > > Rename it to CPU_CFG_OFFSET() for more clarity while we're at it. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/cpu.c | 2 +- > target/riscv/cpu.h | 2 ++ > target/riscv/kvm.c | 8 +++----- > 3 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 644ce7a018..3e62881d85 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -48,7 +48,7 @@ struct isa_ext_data { > }; > > #define ISA_EXT_DATA_ENTRY(_name, _min_ver, _prop) \ > - {#_name, _min_ver, offsetof(struct RISCVCPUConfig, _prop)} > + {#_name, _min_ver, CPU_CFG_OFFSET(_prop)} > > /* > * From vector_helper.c > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > index 6ea22e0eea..577abcd724 100644 > --- a/target/riscv/cpu.h > +++ b/target/riscv/cpu.h > @@ -62,6 +62,8 @@ > const char *riscv_get_misa_ext_name(uint32_t bit); > const char *riscv_get_misa_ext_description(uint32_t bit); > > +#define CPU_CFG_OFFSET(_prop) offsetof(struct RISCVCPUConfig, _prop) > + > /* Privileged specification version */ > enum { > PRIV_VERSION_1_10_0 = 0, > diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c > index 9d8a8982f9..9b8565d809 100644 > --- a/target/riscv/kvm.c > +++ b/target/riscv/kvm.c > @@ -198,10 +198,8 @@ static void kvm_riscv_update_cpu_misa_ext(RISCVCPU *cpu, CPUState *cs) > } > } > > -#define CPUCFG(_prop) offsetof(struct RISCVCPUConfig, _prop) > - > #define KVM_EXT_CFG(_name, _prop, _reg_id) \ > - {.name = _name, .offset = CPUCFG(_prop), \ > + {.name = _name, .offset = CPU_CFG_OFFSET(_prop), \ > .kvm_reg_id = _reg_id} > > static KVMCPUConfig kvm_multi_ext_cfgs[] = { > @@ -278,13 +276,13 @@ static void kvm_cpu_set_multi_ext_cfg(Object *obj, Visitor *v, > > static KVMCPUConfig kvm_cbom_blocksize = { > .name = "cbom_blocksize", > - .offset = CPUCFG(cbom_blocksize), > + .offset = CPU_CFG_OFFSET(cbom_blocksize), > .kvm_reg_id = KVM_REG_RISCV_CONFIG_REG(zicbom_block_size) > }; > > static KVMCPUConfig kvm_cboz_blocksize = { > .name = "cboz_blocksize", > - .offset = CPUCFG(cboz_blocksize), > + .offset = CPU_CFG_OFFSET(cboz_blocksize), > .kvm_reg_id = KVM_REG_RISCV_CONFIG_REG(zicboz_block_size) > }; > > -- > 2.41.0 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 644ce7a018..3e62881d85 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -48,7 +48,7 @@ struct isa_ext_data { }; #define ISA_EXT_DATA_ENTRY(_name, _min_ver, _prop) \ - {#_name, _min_ver, offsetof(struct RISCVCPUConfig, _prop)} + {#_name, _min_ver, CPU_CFG_OFFSET(_prop)} /* * From vector_helper.c diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 6ea22e0eea..577abcd724 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -62,6 +62,8 @@ const char *riscv_get_misa_ext_name(uint32_t bit); const char *riscv_get_misa_ext_description(uint32_t bit); +#define CPU_CFG_OFFSET(_prop) offsetof(struct RISCVCPUConfig, _prop) + /* Privileged specification version */ enum { PRIV_VERSION_1_10_0 = 0, diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index 9d8a8982f9..9b8565d809 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -198,10 +198,8 @@ static void kvm_riscv_update_cpu_misa_ext(RISCVCPU *cpu, CPUState *cs) } } -#define CPUCFG(_prop) offsetof(struct RISCVCPUConfig, _prop) - #define KVM_EXT_CFG(_name, _prop, _reg_id) \ - {.name = _name, .offset = CPUCFG(_prop), \ + {.name = _name, .offset = CPU_CFG_OFFSET(_prop), \ .kvm_reg_id = _reg_id} static KVMCPUConfig kvm_multi_ext_cfgs[] = { @@ -278,13 +276,13 @@ static void kvm_cpu_set_multi_ext_cfg(Object *obj, Visitor *v, static KVMCPUConfig kvm_cbom_blocksize = { .name = "cbom_blocksize", - .offset = CPUCFG(cbom_blocksize), + .offset = CPU_CFG_OFFSET(cbom_blocksize), .kvm_reg_id = KVM_REG_RISCV_CONFIG_REG(zicbom_block_size) }; static KVMCPUConfig kvm_cboz_blocksize = { .name = "cboz_blocksize", - .offset = CPUCFG(cboz_blocksize), + .offset = CPU_CFG_OFFSET(cboz_blocksize), .kvm_reg_id = KVM_REG_RISCV_CONFIG_REG(zicboz_block_size) };
The RISC-V KVM driver uses a CPUCFG() macro that calculates the offset of a certain field in the struct RISCVCPUConfig. We're going to use this macro in target/riscv/cpu.c as well in the next patches. Make it public. Rename it to CPU_CFG_OFFSET() for more clarity while we're at it. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/cpu.c | 2 +- target/riscv/cpu.h | 2 ++ target/riscv/kvm.c | 8 +++----- 3 files changed, 6 insertions(+), 6 deletions(-)