Message ID | 20230613205857.495165-11-dbarboza@ventanamicro.com |
---|---|
State | New |
Headers | show |
Series | target/riscv, KVM: fixes and enhancements | expand |
On Wed, Jun 14, 2023 at 7:00 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > At this moment we're retrieving env->misa_ext during > kvm_arch_init_cpu(), leaving env->misa_ext_mask behind. > > We want to set env->misa_ext_mask, and we want to set it as early as > possible. The reason is that we're going to use it in the validation > process of the KVM MISA properties we're going to add next. Setting it > during arch_init_cpu() is too late for user validation. > > Move the code to a new helper that is going to be called during init() > time, via kvm_riscv_init_user_properties(), like we're already doing for > the machine ID properties. Set both misa_ext and misa_ext_mask to the > same value retrieved by the 'isa' config reg. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/kvm.c | 34 +++++++++++++++++++++++----------- > 1 file changed, 23 insertions(+), 11 deletions(-) > > diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c > index 602727cdfd..4d0808cb9a 100644 > --- a/target/riscv/kvm.c > +++ b/target/riscv/kvm.c > @@ -396,6 +396,28 @@ static void kvm_riscv_init_machine_ids(RISCVCPU *cpu, KVMScratchCPU *kvmcpu) > } > } > > +static void kvm_riscv_init_misa_ext_mask(RISCVCPU *cpu, > + KVMScratchCPU *kvmcpu) > +{ > + CPURISCVState *env = &cpu->env; > + struct kvm_one_reg reg; > + int ret; > + > + reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, > + KVM_REG_RISCV_CONFIG_REG(isa)); > + reg.addr = (uint64_t)&env->misa_ext_mask; > + ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); > + > + if (ret) { > + error_report("Unable to fetch ISA register from KVM, " > + "error %d", ret); > + kvm_riscv_destroy_scratch_vcpu(kvmcpu); > + exit(EXIT_FAILURE); > + } > + > + env->misa_ext = env->misa_ext_mask; > +} > + > void kvm_riscv_init_user_properties(Object *cpu_obj) > { > RISCVCPU *cpu = RISCV_CPU(cpu_obj); > @@ -406,6 +428,7 @@ void kvm_riscv_init_user_properties(Object *cpu_obj) > } > > kvm_riscv_init_machine_ids(cpu, &kvmcpu); > + kvm_riscv_init_misa_ext_mask(cpu, &kvmcpu); > > kvm_riscv_destroy_scratch_vcpu(&kvmcpu); > } > @@ -525,21 +548,10 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, CPUState *cs) > int kvm_arch_init_vcpu(CPUState *cs) > { > int ret = 0; > - target_ulong isa; > RISCVCPU *cpu = RISCV_CPU(cs); > - CPURISCVState *env = &cpu->env; > - uint64_t id; > > qemu_add_vm_change_state_handler(kvm_riscv_vm_state_change, cs); > > - id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, > - KVM_REG_RISCV_CONFIG_REG(isa)); > - ret = kvm_get_one_reg(cs, id, &isa); > - if (ret) { > - return ret; > - } > - env->misa_ext = isa; > - > if (!object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) { > ret = kvm_vcpu_set_machine_ids(cpu, cs); > } > -- > 2.40.1 > >
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index 602727cdfd..4d0808cb9a 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -396,6 +396,28 @@ static void kvm_riscv_init_machine_ids(RISCVCPU *cpu, KVMScratchCPU *kvmcpu) } } +static void kvm_riscv_init_misa_ext_mask(RISCVCPU *cpu, + KVMScratchCPU *kvmcpu) +{ + CPURISCVState *env = &cpu->env; + struct kvm_one_reg reg; + int ret; + + reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, + KVM_REG_RISCV_CONFIG_REG(isa)); + reg.addr = (uint64_t)&env->misa_ext_mask; + ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); + + if (ret) { + error_report("Unable to fetch ISA register from KVM, " + "error %d", ret); + kvm_riscv_destroy_scratch_vcpu(kvmcpu); + exit(EXIT_FAILURE); + } + + env->misa_ext = env->misa_ext_mask; +} + void kvm_riscv_init_user_properties(Object *cpu_obj) { RISCVCPU *cpu = RISCV_CPU(cpu_obj); @@ -406,6 +428,7 @@ void kvm_riscv_init_user_properties(Object *cpu_obj) } kvm_riscv_init_machine_ids(cpu, &kvmcpu); + kvm_riscv_init_misa_ext_mask(cpu, &kvmcpu); kvm_riscv_destroy_scratch_vcpu(&kvmcpu); } @@ -525,21 +548,10 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, CPUState *cs) int kvm_arch_init_vcpu(CPUState *cs) { int ret = 0; - target_ulong isa; RISCVCPU *cpu = RISCV_CPU(cs); - CPURISCVState *env = &cpu->env; - uint64_t id; qemu_add_vm_change_state_handler(kvm_riscv_vm_state_change, cs); - id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(isa)); - ret = kvm_get_one_reg(cs, id, &isa); - if (ret) { - return ret; - } - env->misa_ext = isa; - if (!object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) { ret = kvm_vcpu_set_machine_ids(cpu, cs); }