diff mbox series

[RFC,1/4] target/riscv: Use xl instead of mxl for disassemble

Message ID 20220824130331.21315-2-zhiwei_liu@linux.alibaba.com
State New
Headers show
Series Support multiple deocde path for RISC-V | expand

Commit Message

LIU Zhiwei Aug. 24, 2022, 1:03 p.m. UTC 
Disassemble function(plugin_disas, target_disas, monitor_disas) will
always call set_disas_info before disassembling instructions.

plugin_disas  and target_disas will always be called under a TB, which
has the same XLEN.

We can't ensure that monitor_disas will always be called under a TB,
but current XLEN will still be a better choice, thus we can ensure at
least the disassemble of the nearest one TB is right.

Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
---
 target/riscv/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Richard Henderson Aug. 24, 2022, 4:30 p.m. UTC | #1 
On 8/24/22 06:03, LIU Zhiwei wrote:
> Disassemble function(plugin_disas, target_disas, monitor_disas) will
> always call set_disas_info before disassembling instructions.
> 
> plugin_disas  and target_disas will always be called under a TB, which
> has the same XLEN.
> 
> We can't ensure that monitor_disas will always be called under a TB,
> but current XLEN will still be a better choice, thus we can ensure at
> least the disassemble of the nearest one TB is right.
> 
> Signed-off-by: LIU Zhiwei<zhiwei_liu@linux.alibaba.com>
> ---
>   target/riscv/cpu.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
Alistair Francis Aug. 29, 2022, 10:08 a.m. UTC | #2 
On Wed, Aug 24, 2022 at 5:43 PM LIU Zhiwei <zhiwei_liu@linux.alibaba.com> wrote:
>
> Disassemble function(plugin_disas, target_disas, monitor_disas) will
> always call set_disas_info before disassembling instructions.
>
> plugin_disas  and target_disas will always be called under a TB, which
> has the same XLEN.
>
> We can't ensure that monitor_disas will always be called under a TB,
> but current XLEN will still be a better choice, thus we can ensure at
> least the disassemble of the nearest one TB is right.
>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index ac6f82ebd0..a5f84f211d 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -507,8 +507,9 @@ static void riscv_cpu_reset(DeviceState *dev)
>  static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info)
>  {
>      RISCVCPU *cpu = RISCV_CPU(s);
> +    CPURISCVState *env = &cpu->env;
>
> -    switch (riscv_cpu_mxl(&cpu->env)) {
> +    switch (env->xl) {
>      case MXL_RV32:
>          info->print_insn = print_insn_riscv32;
>          break;
> --
> 2.25.1
>
>
diff mbox series

Patch

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index ac6f82ebd0..a5f84f211d 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -507,8 +507,9 @@  static void riscv_cpu_reset(DeviceState *dev)
 static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info)
 {
     RISCVCPU *cpu = RISCV_CPU(s);
+    CPURISCVState *env = &cpu->env;
 
-    switch (riscv_cpu_mxl(&cpu->env)) {
+    switch (env->xl) {
     case MXL_RV32:
         info->print_insn = print_insn_riscv32;
         break;