diff mbox series

[v4,03/20] target/riscv: Ignore the pc bits above XLEN

Message ID 20211111155149.58172-4-zhiwei_liu@c-sky.com
State New
Headers show
Series Support UXL filed in xstatus | expand

Commit Message

LIU Zhiwei Nov. 11, 2021, 3:51 p.m. UTC 
The read from PC for translation is in cpu_get_tb_cpu_state, before translation.

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/riscv/cpu_helper.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

Alistair Francis Nov. 15, 2021, 4:27 a.m. UTC | #1 
On Fri, Nov 12, 2021 at 1:54 AM LIU Zhiwei <zhiwei_liu@c-sky.com> wrote:
>
> The read from PC for translation is in cpu_get_tb_cpu_state, before translation.
>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu_helper.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 9eeed38c7e..4c048cc266 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -70,8 +70,9 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
>                            target_ulong *cs_base, uint32_t *pflags)
>  {
>      uint32_t flags = 0;
> +    RISCVMXL xl = cpu_get_xl(env);
>
> -    *pc = env->pc;
> +    *pc = xl == MXL_RV32 ? env->pc & UINT32_MAX : env->pc;
>      *cs_base = 0;
>
>      if (riscv_has_ext(env, RVV)) {
> @@ -127,7 +128,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
>      }
>  #endif
>
> -    flags = FIELD_DP32(flags, TB_FLAGS, XL, cpu_get_xl(env));
> +    flags = FIELD_DP32(flags, TB_FLAGS, XL, xl);
>
>      *pflags = flags;
>  }
> --
> 2.25.1
>
>
diff mbox series

Patch

diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 9eeed38c7e..4c048cc266 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -70,8 +70,9 @@  void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
                           target_ulong *cs_base, uint32_t *pflags)
 {
     uint32_t flags = 0;
+    RISCVMXL xl = cpu_get_xl(env);
 
-    *pc = env->pc;
+    *pc = xl == MXL_RV32 ? env->pc & UINT32_MAX : env->pc;
     *cs_base = 0;
 
     if (riscv_has_ext(env, RVV)) {
@@ -127,7 +128,7 @@  void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
     }
 #endif
 
-    flags = FIELD_DP32(flags, TB_FLAGS, XL, cpu_get_xl(env));
+    flags = FIELD_DP32(flags, TB_FLAGS, XL, xl);
 
     *pflags = flags;
 }