| Message ID | 1593746511-19517-1-git-send-email-bmeng.cn@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | hw/riscv: virt: Sort the SoC memmap table entries | expand |
On Thu, Jul 2, 2020 at 8:23 PM Bin Meng <bmeng.cn@gmail.com> wrote: > > From: Bin Meng <bin.meng@windriver.com> > > Adjust the PCIe memory maps to follow the order. > > Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > > hw/riscv/virt.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 5ca49c5..aacfbda 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -57,14 +57,14 @@ static const struct MemmapEntry { > [VIRT_TEST] = { 0x100000, 0x1000 }, > [VIRT_RTC] = { 0x101000, 0x1000 }, > [VIRT_CLINT] = { 0x2000000, 0x10000 }, > + [VIRT_PCIE_PIO] = { 0x3000000, 0x10000 }, > [VIRT_PLIC] = { 0xc000000, 0x4000000 }, > [VIRT_UART0] = { 0x10000000, 0x100 }, > [VIRT_VIRTIO] = { 0x10001000, 0x1000 }, > [VIRT_FLASH] = { 0x20000000, 0x4000000 }, > - [VIRT_DRAM] = { 0x80000000, 0x0 }, > - [VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 }, > - [VIRT_PCIE_PIO] = { 0x03000000, 0x00010000 }, > [VIRT_PCIE_ECAM] = { 0x30000000, 0x10000000 }, > + [VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 }, > + [VIRT_DRAM] = { 0x80000000, 0x0 }, > }; > > #define VIRT_FLASH_SECTOR_SIZE (256 * KiB) > -- > 2.7.4 > >
On Thu, Jul 2, 2020 at 8:23 PM Bin Meng <bmeng.cn@gmail.com> wrote: > > From: Bin Meng <bin.meng@windriver.com> > > Adjust the PCIe memory maps to follow the order. > > Signed-off-by: Bin Meng <bin.meng@windriver.com> Thanks! Applied to riscv-to-apply.next Alistair > --- > > hw/riscv/virt.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 5ca49c5..aacfbda 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -57,14 +57,14 @@ static const struct MemmapEntry { > [VIRT_TEST] = { 0x100000, 0x1000 }, > [VIRT_RTC] = { 0x101000, 0x1000 }, > [VIRT_CLINT] = { 0x2000000, 0x10000 }, > + [VIRT_PCIE_PIO] = { 0x3000000, 0x10000 }, > [VIRT_PLIC] = { 0xc000000, 0x4000000 }, > [VIRT_UART0] = { 0x10000000, 0x100 }, > [VIRT_VIRTIO] = { 0x10001000, 0x1000 }, > [VIRT_FLASH] = { 0x20000000, 0x4000000 }, > - [VIRT_DRAM] = { 0x80000000, 0x0 }, > - [VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 }, > - [VIRT_PCIE_PIO] = { 0x03000000, 0x00010000 }, > [VIRT_PCIE_ECAM] = { 0x30000000, 0x10000000 }, > + [VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 }, > + [VIRT_DRAM] = { 0x80000000, 0x0 }, > }; > > #define VIRT_FLASH_SECTOR_SIZE (256 * KiB) > -- > 2.7.4 > >
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 5ca49c5..aacfbda 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -57,14 +57,14 @@ static const struct MemmapEntry { [VIRT_TEST] = { 0x100000, 0x1000 }, [VIRT_RTC] = { 0x101000, 0x1000 }, [VIRT_CLINT] = { 0x2000000, 0x10000 }, + [VIRT_PCIE_PIO] = { 0x3000000, 0x10000 }, [VIRT_PLIC] = { 0xc000000, 0x4000000 }, [VIRT_UART0] = { 0x10000000, 0x100 }, [VIRT_VIRTIO] = { 0x10001000, 0x1000 }, [VIRT_FLASH] = { 0x20000000, 0x4000000 }, - [VIRT_DRAM] = { 0x80000000, 0x0 }, - [VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 }, - [VIRT_PCIE_PIO] = { 0x03000000, 0x00010000 }, [VIRT_PCIE_ECAM] = { 0x30000000, 0x10000000 }, + [VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 }, + [VIRT_DRAM] = { 0x80000000, 0x0 }, }; #define VIRT_FLASH_SECTOR_SIZE (256 * KiB)