mbox series

[v3,0/2] Support for print to log vector extension registers

Message ID 20230410124451.15929-1-ivan.klokov@syntacore.com
Headers show
Series Support for print to log vector extension registers | expand

Message

Ivan Klokov April 10, 2023, 12:44 p.m. UTC 
The patch added an ability to include VPU registers in the 'cpu' logging.
---
v3:
   - split of the patch into two parts: general and RISC-V specific
---

Ivan Klokov (2):
  util/log: Add vector registers to log
  target/riscv: Add RVV registers to log

 accel/tcg/cpu-exec.c  |  3 +++
 include/hw/core/cpu.h |  2 ++
 include/qemu/log.h    |  1 +
 target/riscv/cpu.c    | 56 ++++++++++++++++++++++++++++++++++++++++++-
 util/log.c            |  2 ++
 5 files changed, 63 insertions(+), 1 deletion(-)

Comments

Alistair Francis June 2, 2023, 3:40 a.m. UTC | #1 
On Mon, Apr 10, 2023 at 10:46 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>
> The patch added an ability to include VPU registers in the 'cpu' logging.
> ---
> v3:
>    - split of the patch into two parts: general and RISC-V specific
> ---
>
> Ivan Klokov (2):
>   util/log: Add vector registers to log
>   target/riscv: Add RVV registers to log

I'm going to go ahead and merge this

Applied to riscv-to-apply.next

Alistair

>
>  accel/tcg/cpu-exec.c  |  3 +++
>  include/hw/core/cpu.h |  2 ++
>  include/qemu/log.h    |  1 +
>  target/riscv/cpu.c    | 56 ++++++++++++++++++++++++++++++++++++++++++-
>  util/log.c            |  2 ++
>  5 files changed, 63 insertions(+), 1 deletion(-)
>
> --
> 2.34.1
>
>