| Message ID | 20240207122256.902627-1-christoph.muellner@vrull.eu |
|---|---|
| Headers | show |
| Series | RISC-V: Add Ztso extension | expand |
On 2/7/24 09:22, Christoph Müllner wrote: > The first patch of this series picks up an earlier v2 Ztso patch from Palmer, > which can be found here: > https://patchwork.kernel.org/project/qemu-devel/patch/20220917072635.11616-1-palmer@rivosinc.com/ > This patch did not apply cleanly but the necessary changes were trivial. > There was a request to extend the commit message, which is part of the > posted patch of this series. As this patch was reviewed a year ago, > I believe it could be merged. > > The second patch simply exposes Ztso via hwprobe. It's also worth mentioning that the second patch relies on: "[PATCH 0/2] linux-user/riscv: Sync hwprobe keys with kernel" To be applied beforehand. Thanks, Daniel > > Relevant in this context might be also, that Richard's patch to improve > TCG's memory barrier selection depending on host and guest memory ordering > landed in June 2023: > https://lore.kernel.org/all/a313b36b-dcc1-f812-ccbd-afed1cbd523b@linaro.org/T/ > > The first patch was already sent as part of an RFC series for Ssdtso: > https://lists.nongnu.org/archive/html/qemu-devel/2023-11/msg02962.html > Since I don't want to keep this patch until the ratification of Ssdtso, > I would like to get this merged independent of Ssdtso. > > This series is based on today's riscv-to-apply.next with my other series > that adds the new hwprobe keys > (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). > > This series can also be found here: > https://github.com/cmuellner/qemu/tree/ztso > > Christoph Müllner (1): > linux-user/riscv: Add Ztso extension to hwprobe > > Palmer Dabbelt (1): > RISC-V: Add support for Ztso > > linux-user/syscall.c | 3 +++ > target/riscv/cpu.c | 2 ++ > target/riscv/cpu_cfg.h | 1 + > target/riscv/insn_trans/trans_rva.c.inc | 11 ++++++++--- > target/riscv/insn_trans/trans_rvi.c.inc | 16 ++++++++++++++-- > target/riscv/insn_trans/trans_rvv.c.inc | 20 ++++++++++++++++++++ > target/riscv/translate.c | 3 +++ > 7 files changed, 51 insertions(+), 5 deletions(-) >
On Wed, Feb 14, 2024 at 2:35 PM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > > > On 2/7/24 09:22, Christoph Müllner wrote: > > The first patch of this series picks up an earlier v2 Ztso patch from Palmer, > > which can be found here: > > https://patchwork.kernel.org/project/qemu-devel/patch/20220917072635.11616-1-palmer@rivosinc.com/ > > This patch did not apply cleanly but the necessary changes were trivial. > > There was a request to extend the commit message, which is part of the > > posted patch of this series. As this patch was reviewed a year ago, > > I believe it could be merged. > > > > The second patch simply exposes Ztso via hwprobe. > > It's also worth mentioning that the second patch relies on: > > "[PATCH 0/2] linux-user/riscv: Sync hwprobe keys with kernel" > > To be applied beforehand. Indeed! Therefore, the end of the cover letter contains the following paragraph: """ This series is based on today's riscv-to-apply.next with my other series that adds the new hwprobe keys (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). """ To ease reviewing and testing for others, I've also created a remote branch on GitHub. Thanks for reviewing! > > > > Thanks, > > Daniel > > > > > > Relevant in this context might be also, that Richard's patch to improve > > TCG's memory barrier selection depending on host and guest memory ordering > > landed in June 2023: > > https://lore.kernel.org/all/a313b36b-dcc1-f812-ccbd-afed1cbd523b@linaro.org/T/ > > > > The first patch was already sent as part of an RFC series for Ssdtso: > > https://lists.nongnu.org/archive/html/qemu-devel/2023-11/msg02962.html > > Since I don't want to keep this patch until the ratification of Ssdtso, > > I would like to get this merged independent of Ssdtso. > > > > This series is based on today's riscv-to-apply.next with my other series > > that adds the new hwprobe keys > > (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). > > > > This series can also be found here: > > https://github.com/cmuellner/qemu/tree/ztso > > > > Christoph Müllner (1): > > linux-user/riscv: Add Ztso extension to hwprobe > > > > Palmer Dabbelt (1): > > RISC-V: Add support for Ztso > > > > linux-user/syscall.c | 3 +++ > > target/riscv/cpu.c | 2 ++ > > target/riscv/cpu_cfg.h | 1 + > > target/riscv/insn_trans/trans_rva.c.inc | 11 ++++++++--- > > target/riscv/insn_trans/trans_rvi.c.inc | 16 ++++++++++++++-- > > target/riscv/insn_trans/trans_rvv.c.inc | 20 ++++++++++++++++++++ > > target/riscv/translate.c | 3 +++ > > 7 files changed, 51 insertions(+), 5 deletions(-) > >
On 2/14/24 10:38, Christoph Müllner wrote: > On Wed, Feb 14, 2024 at 2:35 PM Daniel Henrique Barboza > <dbarboza@ventanamicro.com> wrote: >> >> >> >> On 2/7/24 09:22, Christoph Müllner wrote: >>> The first patch of this series picks up an earlier v2 Ztso patch from Palmer, >>> which can be found here: >>> https://patchwork.kernel.org/project/qemu-devel/patch/20220917072635.11616-1-palmer@rivosinc.com/ >>> This patch did not apply cleanly but the necessary changes were trivial. >>> There was a request to extend the commit message, which is part of the >>> posted patch of this series. As this patch was reviewed a year ago, >>> I believe it could be merged. >>> >>> The second patch simply exposes Ztso via hwprobe. >> >> It's also worth mentioning that the second patch relies on: >> >> "[PATCH 0/2] linux-user/riscv: Sync hwprobe keys with kernel" >> >> To be applied beforehand. > > Indeed! Therefore, the end of the cover letter contains the following paragraph: > """ > This series is based on today's riscv-to-apply.next with my other series > that adds the new hwprobe keys > (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). > """ I guess it's also worth mentioning that I didn't pay enough attention to the cover letter :skull: Thanks, Daniel > > To ease reviewing and testing for others, I've also created a remote > branch on GitHub. > > Thanks for reviewing! > >> >> >> >> Thanks, >> >> Daniel >> >> >>> >>> Relevant in this context might be also, that Richard's patch to improve >>> TCG's memory barrier selection depending on host and guest memory ordering >>> landed in June 2023: >>> https://lore.kernel.org/all/a313b36b-dcc1-f812-ccbd-afed1cbd523b@linaro.org/T/ >>> >>> The first patch was already sent as part of an RFC series for Ssdtso: >>> https://lists.nongnu.org/archive/html/qemu-devel/2023-11/msg02962.html >>> Since I don't want to keep this patch until the ratification of Ssdtso, >>> I would like to get this merged independent of Ssdtso. >>> >>> This series is based on today's riscv-to-apply.next with my other series >>> that adds the new hwprobe keys >>> (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). >>> >>> This series can also be found here: >>> https://github.com/cmuellner/qemu/tree/ztso >>> >>> Christoph Müllner (1): >>> linux-user/riscv: Add Ztso extension to hwprobe >>> >>> Palmer Dabbelt (1): >>> RISC-V: Add support for Ztso >>> >>> linux-user/syscall.c | 3 +++ >>> target/riscv/cpu.c | 2 ++ >>> target/riscv/cpu_cfg.h | 1 + >>> target/riscv/insn_trans/trans_rva.c.inc | 11 ++++++++--- >>> target/riscv/insn_trans/trans_rvi.c.inc | 16 ++++++++++++++-- >>> target/riscv/insn_trans/trans_rvv.c.inc | 20 ++++++++++++++++++++ >>> target/riscv/translate.c | 3 +++ >>> 7 files changed, 51 insertions(+), 5 deletions(-) >>>
On Wed, Feb 14, 2024 at 02:38:34PM +0100, Christoph Müllner wrote: > On Wed, Feb 14, 2024 at 2:35 PM Daniel Henrique Barboza > <dbarboza@ventanamicro.com> wrote: > > > > > > > > On 2/7/24 09:22, Christoph Müllner wrote: > > > The first patch of this series picks up an earlier v2 Ztso patch from Palmer, > > > which can be found here: > > > https://patchwork.kernel.org/project/qemu-devel/patch/20220917072635.11616-1-palmer@rivosinc.com/ > > > This patch did not apply cleanly but the necessary changes were trivial. > > > There was a request to extend the commit message, which is part of the > > > posted patch of this series. As this patch was reviewed a year ago, > > > I believe it could be merged. > > > > > > The second patch simply exposes Ztso via hwprobe. > > > > It's also worth mentioning that the second patch relies on: > > > > "[PATCH 0/2] linux-user/riscv: Sync hwprobe keys with kernel" > > > > To be applied beforehand. > > Indeed! Therefore, the end of the cover letter contains the following paragraph: > """ > This series is based on today's riscv-to-apply.next with my other series > that adds the new hwprobe keys > (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). > """ I think a line like Based-on: 20240207115926.887816-1-christoph.muellner@vrull.eu in the cover letter would allow the automated tools to green-light this series too. Thanks, drew > > To ease reviewing and testing for others, I've also created a remote > branch on GitHub. > > Thanks for reviewing! > > > > > > > > > Thanks, > > > > Daniel > > > > > > > > > > Relevant in this context might be also, that Richard's patch to improve > > > TCG's memory barrier selection depending on host and guest memory ordering > > > landed in June 2023: > > > https://lore.kernel.org/all/a313b36b-dcc1-f812-ccbd-afed1cbd523b@linaro.org/T/ > > > > > > The first patch was already sent as part of an RFC series for Ssdtso: > > > https://lists.nongnu.org/archive/html/qemu-devel/2023-11/msg02962.html > > > Since I don't want to keep this patch until the ratification of Ssdtso, > > > I would like to get this merged independent of Ssdtso. > > > > > > This series is based on today's riscv-to-apply.next with my other series > > > that adds the new hwprobe keys > > > (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). > > > > > > This series can also be found here: > > > https://github.com/cmuellner/qemu/tree/ztso > > > > > > Christoph Müllner (1): > > > linux-user/riscv: Add Ztso extension to hwprobe > > > > > > Palmer Dabbelt (1): > > > RISC-V: Add support for Ztso > > > > > > linux-user/syscall.c | 3 +++ > > > target/riscv/cpu.c | 2 ++ > > > target/riscv/cpu_cfg.h | 1 + > > > target/riscv/insn_trans/trans_rva.c.inc | 11 ++++++++--- > > > target/riscv/insn_trans/trans_rvi.c.inc | 16 ++++++++++++++-- > > > target/riscv/insn_trans/trans_rvv.c.inc | 20 ++++++++++++++++++++ > > > target/riscv/translate.c | 3 +++ > > > 7 files changed, 51 insertions(+), 5 deletions(-) > > >
On Wed, Feb 14, 2024 at 5:25 PM Andrew Jones <ajones@ventanamicro.com> wrote: > > On Wed, Feb 14, 2024 at 02:38:34PM +0100, Christoph Müllner wrote: > > On Wed, Feb 14, 2024 at 2:35 PM Daniel Henrique Barboza > > <dbarboza@ventanamicro.com> wrote: > > > > > > > > > > > > On 2/7/24 09:22, Christoph Müllner wrote: > > > > The first patch of this series picks up an earlier v2 Ztso patch from Palmer, > > > > which can be found here: > > > > https://patchwork.kernel.org/project/qemu-devel/patch/20220917072635.11616-1-palmer@rivosinc.com/ > > > > This patch did not apply cleanly but the necessary changes were trivial. > > > > There was a request to extend the commit message, which is part of the > > > > posted patch of this series. As this patch was reviewed a year ago, > > > > I believe it could be merged. > > > > > > > > The second patch simply exposes Ztso via hwprobe. > > > > > > It's also worth mentioning that the second patch relies on: > > > > > > "[PATCH 0/2] linux-user/riscv: Sync hwprobe keys with kernel" > > > > > > To be applied beforehand. > > > > Indeed! Therefore, the end of the cover letter contains the following paragraph: > > """ > > This series is based on today's riscv-to-apply.next with my other series > > that adds the new hwprobe keys > > (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). > > """ > > I think a line like > > Based-on: 20240207115926.887816-1-christoph.muellner@vrull.eu > > in the cover letter would allow the automated tools to green-light this > series too. Should I resend? > > Thanks, > drew > > > > > > To ease reviewing and testing for others, I've also created a remote > > branch on GitHub. > > > > Thanks for reviewing! > > > > > > > > > > > > > > Thanks, > > > > > > Daniel > > > > > > > > > > > > > > Relevant in this context might be also, that Richard's patch to improve > > > > TCG's memory barrier selection depending on host and guest memory ordering > > > > landed in June 2023: > > > > https://lore.kernel.org/all/a313b36b-dcc1-f812-ccbd-afed1cbd523b@linaro.org/T/ > > > > > > > > The first patch was already sent as part of an RFC series for Ssdtso: > > > > https://lists.nongnu.org/archive/html/qemu-devel/2023-11/msg02962.html > > > > Since I don't want to keep this patch until the ratification of Ssdtso, > > > > I would like to get this merged independent of Ssdtso. > > > > > > > > This series is based on today's riscv-to-apply.next with my other series > > > > that adds the new hwprobe keys > > > > (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). > > > > > > > > This series can also be found here: > > > > https://github.com/cmuellner/qemu/tree/ztso > > > > > > > > Christoph Müllner (1): > > > > linux-user/riscv: Add Ztso extension to hwprobe > > > > > > > > Palmer Dabbelt (1): > > > > RISC-V: Add support for Ztso > > > > > > > > linux-user/syscall.c | 3 +++ > > > > target/riscv/cpu.c | 2 ++ > > > > target/riscv/cpu_cfg.h | 1 + > > > > target/riscv/insn_trans/trans_rva.c.inc | 11 ++++++++--- > > > > target/riscv/insn_trans/trans_rvi.c.inc | 16 ++++++++++++++-- > > > > target/riscv/insn_trans/trans_rvv.c.inc | 20 ++++++++++++++++++++ > > > > target/riscv/translate.c | 3 +++ > > > > 7 files changed, 51 insertions(+), 5 deletions(-) > > > >
On 2/15/24 06:53, Christoph Müllner wrote: > On Wed, Feb 14, 2024 at 5:25 PM Andrew Jones <ajones@ventanamicro.com> wrote: >> >> On Wed, Feb 14, 2024 at 02:38:34PM +0100, Christoph Müllner wrote: >>> On Wed, Feb 14, 2024 at 2:35 PM Daniel Henrique Barboza >>> <dbarboza@ventanamicro.com> wrote: >>>> >>>> >>>> >>>> On 2/7/24 09:22, Christoph Müllner wrote: >>>>> The first patch of this series picks up an earlier v2 Ztso patch from Palmer, >>>>> which can be found here: >>>>> https://patchwork.kernel.org/project/qemu-devel/patch/20220917072635.11616-1-palmer@rivosinc.com/ >>>>> This patch did not apply cleanly but the necessary changes were trivial. >>>>> There was a request to extend the commit message, which is part of the >>>>> posted patch of this series. As this patch was reviewed a year ago, >>>>> I believe it could be merged. >>>>> >>>>> The second patch simply exposes Ztso via hwprobe. >>>> >>>> It's also worth mentioning that the second patch relies on: >>>> >>>> "[PATCH 0/2] linux-user/riscv: Sync hwprobe keys with kernel" >>>> >>>> To be applied beforehand. >>> >>> Indeed! Therefore, the end of the cover letter contains the following paragraph: >>> """ >>> This series is based on today's riscv-to-apply.next with my other series >>> that adds the new hwprobe keys >>> (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). >>> """ >> >> I think a line like >> >> Based-on: 20240207115926.887816-1-christoph.muellner@vrull.eu >> >> in the cover letter would allow the automated tools to green-light this >> series too. > > Should I resend? You can add the "Based-on" line as Drew said in case a second version is needed. Don't worry about it. Thanks, Daniel > >> >> Thanks, >> drew >> >> >>> >>> To ease reviewing and testing for others, I've also created a remote >>> branch on GitHub. >>> >>> Thanks for reviewing! >>> >>>> >>>> >>>> >>>> Thanks, >>>> >>>> Daniel >>>> >>>> >>>>> >>>>> Relevant in this context might be also, that Richard's patch to improve >>>>> TCG's memory barrier selection depending on host and guest memory ordering >>>>> landed in June 2023: >>>>> https://lore.kernel.org/all/a313b36b-dcc1-f812-ccbd-afed1cbd523b@linaro.org/T/ >>>>> >>>>> The first patch was already sent as part of an RFC series for Ssdtso: >>>>> https://lists.nongnu.org/archive/html/qemu-devel/2023-11/msg02962.html >>>>> Since I don't want to keep this patch until the ratification of Ssdtso, >>>>> I would like to get this merged independent of Ssdtso. >>>>> >>>>> This series is based on today's riscv-to-apply.next with my other series >>>>> that adds the new hwprobe keys >>>>> (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). >>>>> >>>>> This series can also be found here: >>>>> https://github.com/cmuellner/qemu/tree/ztso >>>>> >>>>> Christoph Müllner (1): >>>>> linux-user/riscv: Add Ztso extension to hwprobe >>>>> >>>>> Palmer Dabbelt (1): >>>>> RISC-V: Add support for Ztso >>>>> >>>>> linux-user/syscall.c | 3 +++ >>>>> target/riscv/cpu.c | 2 ++ >>>>> target/riscv/cpu_cfg.h | 1 + >>>>> target/riscv/insn_trans/trans_rva.c.inc | 11 ++++++++--- >>>>> target/riscv/insn_trans/trans_rvi.c.inc | 16 ++++++++++++++-- >>>>> target/riscv/insn_trans/trans_rvv.c.inc | 20 ++++++++++++++++++++ >>>>> target/riscv/translate.c | 3 +++ >>>>> 7 files changed, 51 insertions(+), 5 deletions(-) >>>>>
On Wed, Feb 7, 2024 at 10:24 PM Christoph Müllner <christoph.muellner@vrull.eu> wrote: > > The first patch of this series picks up an earlier v2 Ztso patch from Palmer, > which can be found here: > https://patchwork.kernel.org/project/qemu-devel/patch/20220917072635.11616-1-palmer@rivosinc.com/ > This patch did not apply cleanly but the necessary changes were trivial. > There was a request to extend the commit message, which is part of the > posted patch of this series. As this patch was reviewed a year ago, > I believe it could be merged. > > The second patch simply exposes Ztso via hwprobe. > > Relevant in this context might be also, that Richard's patch to improve > TCG's memory barrier selection depending on host and guest memory ordering > landed in June 2023: > https://lore.kernel.org/all/a313b36b-dcc1-f812-ccbd-afed1cbd523b@linaro.org/T/ > > The first patch was already sent as part of an RFC series for Ssdtso: > https://lists.nongnu.org/archive/html/qemu-devel/2023-11/msg02962.html > Since I don't want to keep this patch until the ratification of Ssdtso, > I would like to get this merged independent of Ssdtso. > > This series is based on today's riscv-to-apply.next with my other series > that adds the new hwprobe keys > (https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html). > > This series can also be found here: > https://github.com/cmuellner/qemu/tree/ztso > > Christoph Müllner (1): > linux-user/riscv: Add Ztso extension to hwprobe > > Palmer Dabbelt (1): > RISC-V: Add support for Ztso Thanks! Applied to riscv-to-apply.next Alistair > > linux-user/syscall.c | 3 +++ > target/riscv/cpu.c | 2 ++ > target/riscv/cpu_cfg.h | 1 + > target/riscv/insn_trans/trans_rva.c.inc | 11 ++++++++--- > target/riscv/insn_trans/trans_rvi.c.inc | 16 ++++++++++++++-- > target/riscv/insn_trans/trans_rvv.c.inc | 20 ++++++++++++++++++++ > target/riscv/translate.c | 3 +++ > 7 files changed, 51 insertions(+), 5 deletions(-) > > -- > 2.43.0 > >