| Message ID | 20231218125334.37184-18-dbarboza@ventanamicro.com |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: RVA22 profiles support | expand |
On Mon, Dec 18, 2023 at 10:56 PM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > Expose all profile flags for all CPUs when executing > query-cpu-model-expansion. This will allow callers to quickly determine > if a certain profile is implemented by a given CPU. This includes vendor > CPUs - the fact that they don't have profile user flags doesn't mean > that they don't implement the profile. > > After this change it's possible to quickly determine if our stock CPUs > implement the existing rva22u64 profile. Here's a few examples: > > $ ./build/qemu-system-riscv64 -S -M virt -display none > -qmp tcp:localhost:1234,server,wait=off > > $ ./scripts/qmp/qmp-shell localhost:1234 > Welcome to the QMP low-level shell! > Connected to QEMU 8.1.50 > > - As expected, the 'max' CPU implements the rva22u64 profile. > > (QEMU) query-cpu-model-expansion type=full model={"name":"max"} > {"return": {"model": > {"name": "rv64", "props": {... "rva22u64": true, ...}}}} > > - rv64 is missing "zba", "zbb", "zbs", "zkt" and "zfhmin": > > query-cpu-model-expansion type=full model={"name":"rv64"} > {"return": {"model": > {"name": "rv64", "props": {... "rva22u64": false, ...}}}} > > query-cpu-model-expansion type=full model={"name":"rv64", > "props":{"zba":true,"zbb":true,"zbs":true,"zkt":true,"zfhmin":true}} > {"return": {"model": > {"name": "rv64", "props": {... "rva22u64": true, ...}}}} > > We have no vendor CPUs that supports rva22u64 (veyron-v1 is the closest > - it is missing just 'zkt'). > > In short, aside from the 'max' CPU, we have no CPUs that supports > rva22u64 by default. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/riscv-qmp-cmds.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/target/riscv/riscv-qmp-cmds.c b/target/riscv/riscv-qmp-cmds.c > index 5ada279776..205aaabeb9 100644 > --- a/target/riscv/riscv-qmp-cmds.c > +++ b/target/riscv/riscv-qmp-cmds.c > @@ -116,6 +116,19 @@ static void riscv_obj_add_named_feats_qdict(Object *obj, QDict *qdict_out) > } > } > > +static void riscv_obj_add_profiles_qdict(Object *obj, QDict *qdict_out) > +{ > + RISCVCPUProfile *profile; > + QObject *value; > + > + for (int i = 0; riscv_profiles[i] != NULL; i++) { > + profile = riscv_profiles[i]; > + value = QOBJECT(qbool_from_bool(profile->enabled)); > + > + qdict_put_obj(qdict_out, profile->name, value); > + } > +} > + > static void riscv_cpuobj_validate_qdict_in(Object *obj, QObject *props, > const QDict *qdict_in, > Error **errp) > @@ -220,6 +233,7 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, > riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_experimental_exts); > riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_vendor_exts); > riscv_obj_add_named_feats_qdict(obj, qdict_out); > + riscv_obj_add_profiles_qdict(obj, qdict_out); > > /* Add our CPU boolean options too */ > riscv_obj_add_qdict_prop(obj, qdict_out, "mmu"); > -- > 2.43.0 > >
diff --git a/target/riscv/riscv-qmp-cmds.c b/target/riscv/riscv-qmp-cmds.c index 5ada279776..205aaabeb9 100644 --- a/target/riscv/riscv-qmp-cmds.c +++ b/target/riscv/riscv-qmp-cmds.c @@ -116,6 +116,19 @@ static void riscv_obj_add_named_feats_qdict(Object *obj, QDict *qdict_out) } } +static void riscv_obj_add_profiles_qdict(Object *obj, QDict *qdict_out) +{ + RISCVCPUProfile *profile; + QObject *value; + + for (int i = 0; riscv_profiles[i] != NULL; i++) { + profile = riscv_profiles[i]; + value = QOBJECT(qbool_from_bool(profile->enabled)); + + qdict_put_obj(qdict_out, profile->name, value); + } +} + static void riscv_cpuobj_validate_qdict_in(Object *obj, QObject *props, const QDict *qdict_in, Error **errp) @@ -220,6 +233,7 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_experimental_exts); riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_vendor_exts); riscv_obj_add_named_feats_qdict(obj, qdict_out); + riscv_obj_add_profiles_qdict(obj, qdict_out); /* Add our CPU boolean options too */ riscv_obj_add_qdict_prop(obj, qdict_out, "mmu");
Expose all profile flags for all CPUs when executing query-cpu-model-expansion. This will allow callers to quickly determine if a certain profile is implemented by a given CPU. This includes vendor CPUs - the fact that they don't have profile user flags doesn't mean that they don't implement the profile. After this change it's possible to quickly determine if our stock CPUs implement the existing rva22u64 profile. Here's a few examples: $ ./build/qemu-system-riscv64 -S -M virt -display none -qmp tcp:localhost:1234,server,wait=off $ ./scripts/qmp/qmp-shell localhost:1234 Welcome to the QMP low-level shell! Connected to QEMU 8.1.50 - As expected, the 'max' CPU implements the rva22u64 profile. (QEMU) query-cpu-model-expansion type=full model={"name":"max"} {"return": {"model": {"name": "rv64", "props": {... "rva22u64": true, ...}}}} - rv64 is missing "zba", "zbb", "zbs", "zkt" and "zfhmin": query-cpu-model-expansion type=full model={"name":"rv64"} {"return": {"model": {"name": "rv64", "props": {... "rva22u64": false, ...}}}} query-cpu-model-expansion type=full model={"name":"rv64", "props":{"zba":true,"zbb":true,"zbs":true,"zkt":true,"zfhmin":true}} {"return": {"model": {"name": "rv64", "props": {... "rva22u64": true, ...}}}} We have no vendor CPUs that supports rva22u64 (veyron-v1 is the closest - it is missing just 'zkt'). In short, aside from the 'max' CPU, we have no CPUs that supports rva22u64 by default. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> --- target/riscv/riscv-qmp-cmds.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)