| Message ID | 20230926183109.165878-2-dbarboza@ventanamicro.com |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: add extension properties for all cpus | expand |
On Wed, Sep 27, 2023 at 5:35 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > We'll introduce generic errors that will output a CPU type name via its > RISCVCPU pointer. Create a helper for that. > > Use the helper in tcg_cpu_realizefn() instead of hardcoding the 'host' > CPU name. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/cpu.c | 11 +++++++++++ > target/riscv/cpu.h | 1 + > target/riscv/tcg/tcg-cpu.c | 4 +++- > 3 files changed, 15 insertions(+), 1 deletion(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index eeeb08a35a..521bb88538 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -643,6 +643,17 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) > return oc; > } > > +char *riscv_cpu_get_name(RISCVCPU *cpu) > +{ > + RISCVCPUClass *rcc = RISCV_CPU_GET_CLASS(cpu); > + const char *typename = object_class_get_name(OBJECT_CLASS(rcc)); > + > + g_assert(g_str_has_suffix(typename, RISCV_CPU_TYPE_SUFFIX)); > + > + return g_strndup(typename, > + strlen(typename) - strlen(RISCV_CPU_TYPE_SUFFIX)); > +} > + > static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags) > { > RISCVCPU *cpu = RISCV_CPU(cs); > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > index 219fe2e9b5..3f11e69223 100644 > --- a/target/riscv/cpu.h > +++ b/target/riscv/cpu.h > @@ -730,6 +730,7 @@ typedef struct isa_ext_data { > int ext_enable_offset; > } RISCVIsaExtData; > extern const RISCVIsaExtData isa_edata_arr[]; > +char *riscv_cpu_get_name(RISCVCPU *cpu); > > void riscv_add_satp_mode_properties(Object *obj); > > diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c > index 8c052d6fcd..f31aa9bcc4 100644 > --- a/target/riscv/tcg/tcg-cpu.c > +++ b/target/riscv/tcg/tcg-cpu.c > @@ -563,7 +563,9 @@ static bool tcg_cpu_realizefn(CPUState *cs, Error **errp) > Error *local_err = NULL; > > if (object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) { > - error_setg(errp, "'host' CPU is not compatible with TCG acceleration"); > + g_autofree char *name = riscv_cpu_get_name(cpu); > + error_setg(errp, "'%s' CPU is not compatible with TCG acceleration", > + name); > return false; > } > > -- > 2.41.0 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index eeeb08a35a..521bb88538 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -643,6 +643,17 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) return oc; } +char *riscv_cpu_get_name(RISCVCPU *cpu) +{ + RISCVCPUClass *rcc = RISCV_CPU_GET_CLASS(cpu); + const char *typename = object_class_get_name(OBJECT_CLASS(rcc)); + + g_assert(g_str_has_suffix(typename, RISCV_CPU_TYPE_SUFFIX)); + + return g_strndup(typename, + strlen(typename) - strlen(RISCV_CPU_TYPE_SUFFIX)); +} + static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags) { RISCVCPU *cpu = RISCV_CPU(cs); diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 219fe2e9b5..3f11e69223 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -730,6 +730,7 @@ typedef struct isa_ext_data { int ext_enable_offset; } RISCVIsaExtData; extern const RISCVIsaExtData isa_edata_arr[]; +char *riscv_cpu_get_name(RISCVCPU *cpu); void riscv_add_satp_mode_properties(Object *obj); diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 8c052d6fcd..f31aa9bcc4 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -563,7 +563,9 @@ static bool tcg_cpu_realizefn(CPUState *cs, Error **errp) Error *local_err = NULL; if (object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) { - error_setg(errp, "'host' CPU is not compatible with TCG acceleration"); + g_autofree char *name = riscv_cpu_get_name(cpu); + error_setg(errp, "'%s' CPU is not compatible with TCG acceleration", + name); return false; }
We'll introduce generic errors that will output a CPU type name via its RISCVCPU pointer. Create a helper for that. Use the helper in tcg_cpu_realizefn() instead of hardcoding the 'host' CPU name. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/cpu.c | 11 +++++++++++ target/riscv/cpu.h | 1 + target/riscv/tcg/tcg-cpu.c | 4 +++- 3 files changed, 15 insertions(+), 1 deletion(-)