Message ID | 20240217005738.3744121-17-atishp@rivosinc.com |
---|---|
State | Changes Requested |
Headers | show
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Fri, 16 Feb 2024 16:58:56 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d188-20020a6336c5000000b005dc89957e06sm487655pga.71.2024.02.16.16.58.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 16:58:55 -0800 (PST) From: Atish Patra <atishp@rivosinc.com> To: linux-kernel@vger.kernel.org Cc: Atish Patra <atishp@rivosinc.com>, Adrian Hunter <adrian.hunter@intel.com>, Alexander Shishkin <alexander.shishkin@linux.intel.com>, Alexandre Ghiti <alexghiti@rivosinc.com>, Andrew Jones <ajones@ventanamicro.com>, Anup Patel <anup@brainfault.org>, Arnaldo Carvalho de Melo <acme@kernel.org>, Atish Patra <atishp@atishpatra.org>, Christian Brauner <brauner@kernel.org>, =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= <cleger@rivosinc.com>, Conor Dooley <conor@kernel.org>, devicetree@vger.kernel.org, Evan Green <evan@rivosinc.com>, Guo Ren <guoren@kernel.org>, Heiko Stuebner <heiko@sntech.de>, Ian Rogers <irogers@google.com>, Ingo Molnar <mingo@redhat.com>, James Clark <james.clark@arm.com>, Jing Zhang <renyu.zj@linux.alibaba.com>, Jiri Olsa <jolsa@kernel.org>, Ji Sheng Teoh <jisheng.teoh@starfivetech.com>, John Garry <john.g.garry@oracle.com>, Jonathan Corbet <corbet@lwn.net>, Kan Liang <kan.liang@linux.intel.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, Ley Foon Tan <leyfoon.tan@starfivetech.com>, linux-doc@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland <mark.rutland@arm.com>, Namhyung Kim <namhyung@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Peter Zijlstra <peterz@infradead.org>, Rob Herring <robh+dt@kernel.org>, Samuel Holland <samuel.holland@sifive.com>, Weilin Wang <weilin.wang@intel.com>, Will Deacon <will@kernel.org>, kaiwenxue1@gmail.com, Yang Jihong <yangjihong1@huawei.com> Subject: [PATCH RFC 16/20] tools/perf: Pass the Counter constraint values in the pmu events Date: Fri, 16 Feb 2024 16:57:34 -0800 Message-Id: <20240217005738.3744121-17-atishp@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240217005738.3744121-1-atishp@rivosinc.com> References: <20240217005738.3744121-1-atishp@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240217_005904_877562_421AD1D3 X-CRM114-Status: GOOD ( 11.38 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 4.0.0 on casper.infradead.org summary: Content analysis details: (-1.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2001:4860:4864:20:0:0:0:32 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 T_SCC_BODY_TEXT_LINE No description available. X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <kvm-riscv.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/kvm-riscv>, <mailto:kvm-riscv-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/kvm-riscv/> List-Post: <mailto:kvm-riscv@lists.infradead.org> List-Help: <mailto:kvm-riscv-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/kvm-riscv>, <mailto:kvm-riscv-request@lists.infradead.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "kvm-riscv" <kvm-riscv-bounces@lists.infradead.org> Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org |
Series |
Add Counter delegation ISA extension support
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expand
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diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py index 30934a490109..f1e320077695 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -278,6 +278,11 @@ class JsonEvent: return fixed[name.lower()] return event + def counter_list_to_bitmask(counterlist): + counter_ids = list(map(int, counterlist.split(','))) + bitmask = sum(1 << pos for pos in counter_ids) + return bitmask + def unit_to_pmu(unit: str) -> Optional[str]: """Convert a JSON Unit to Linux PMU name.""" if not unit: @@ -401,6 +406,10 @@ class JsonEvent: else: raise argparse.ArgumentTypeError('Cannot find arch std event:', arch_std) + if self.counter: + bitmask = counter_list_to_bitmask(self.counter) + event += f',counterid_mask={bitmask:#x}' + self.event = real_event(self.name, event) def __repr__(self) -> str:
RISC-V doesn't have any standard event to counter mapping discovery mechanism in the ISA. The ISA defines 29 programmable counters and platforms can choose to implement any number of them and map any events to any counters. Thus, the perf tool need to inform the driver about the counter mapping of each events. The current perf infrastructure only parses the 'Counter' constraints in metrics. This patch extends that to pass in the pmu events so that any driver can retrieve those values via perf attributes if defined accordingly. Signed-off-by: Atish Patra <atishp@rivosinc.com> --- tools/perf/pmu-events/jevents.py | 9 +++++++++ 1 file changed, 9 insertions(+)