diff mbox series

[RFC,2/9] drivers/perf: riscv: Add a flag to indicate SBI v2.0 support

Message ID 20231205024310.1593100-3-atishp@rivosinc.com
State Superseded
Headers show
Series RISC-V SBI v2.0 PMU improvements and Perf sampling in KVM guest | expand

Commit Message

Atish Kumar Patra Dec. 5, 2023, 2:43 a.m. UTC
SBI v2.0 added few functions to improve SBI PMU extension. In order
to be backward compatible, the driver must use these functions only
if SBI v2.0 is available.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 drivers/perf/riscv_pmu_sbi.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Conor Dooley Dec. 7, 2023, 12:07 p.m. UTC | #1
On Mon, Dec 04, 2023 at 06:43:03PM -0800, Atish Patra wrote:
> SBI v2.0 added few functions to improve SBI PMU extension. In order
> to be backward compatible, the driver must use these functions only
> if SBI v2.0 is available.
> 
> Signed-off-by: Atish Patra <atishp@rivosinc.com>

IMO this does not make sense in a patch of its own and should probably
be squashed with the first user for it.

> ---
>  drivers/perf/riscv_pmu_sbi.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index 16acd4dcdb96..40a335350d08 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -35,6 +35,8 @@
>  PMU_FORMAT_ATTR(event, "config:0-47");
>  PMU_FORMAT_ATTR(firmware, "config:63");
>  
> +static bool sbi_v2_available;
> +
>  static struct attribute *riscv_arch_formats_attr[] = {
>  	&format_attr_event.attr,
>  	&format_attr_firmware.attr,
> @@ -1108,6 +1110,9 @@ static int __init pmu_sbi_devinit(void)
>  		return 0;
>  	}
>  
> +	if (sbi_spec_version >= sbi_mk_version(2, 0))
> +		sbi_v2_available = true;
> +
>  	ret = cpuhp_setup_state_multi(CPUHP_AP_PERF_RISCV_STARTING,
>  				      "perf/riscv/pmu:starting",
>  				      pmu_sbi_starting_cpu, pmu_sbi_dying_cpu);
> -- 
> 2.34.1
>
Anup Patel Dec. 14, 2023, 12:15 p.m. UTC | #2
On Thu, Dec 7, 2023 at 5:39 PM Conor Dooley <conor.dooley@microchip.com> wrote:
>
> On Mon, Dec 04, 2023 at 06:43:03PM -0800, Atish Patra wrote:
> > SBI v2.0 added few functions to improve SBI PMU extension. In order
> > to be backward compatible, the driver must use these functions only
> > if SBI v2.0 is available.
> >
> > Signed-off-by: Atish Patra <atishp@rivosinc.com>
>
> IMO this does not make sense in a patch of its own and should probably
> be squashed with the first user for it.

I agree. This patch should be squashed into patch4 where the
flag is first used.

Regards,
Anup

>
> > ---
> >  drivers/perf/riscv_pmu_sbi.c | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> > index 16acd4dcdb96..40a335350d08 100644
> > --- a/drivers/perf/riscv_pmu_sbi.c
> > +++ b/drivers/perf/riscv_pmu_sbi.c
> > @@ -35,6 +35,8 @@
> >  PMU_FORMAT_ATTR(event, "config:0-47");
> >  PMU_FORMAT_ATTR(firmware, "config:63");
> >
> > +static bool sbi_v2_available;
> > +
> >  static struct attribute *riscv_arch_formats_attr[] = {
> >       &format_attr_event.attr,
> >       &format_attr_firmware.attr,
> > @@ -1108,6 +1110,9 @@ static int __init pmu_sbi_devinit(void)
> >               return 0;
> >       }
> >
> > +     if (sbi_spec_version >= sbi_mk_version(2, 0))
> > +             sbi_v2_available = true;
> > +
> >       ret = cpuhp_setup_state_multi(CPUHP_AP_PERF_RISCV_STARTING,
> >                                     "perf/riscv/pmu:starting",
> >                                     pmu_sbi_starting_cpu, pmu_sbi_dying_cpu);
> > --
> > 2.34.1
> >
Atish Kumar Patra Dec. 16, 2023, 11:54 p.m. UTC | #3
On Thu, Dec 14, 2023 at 4:16 AM Anup Patel <anup@brainfault.org> wrote:
>
> On Thu, Dec 7, 2023 at 5:39 PM Conor Dooley <conor.dooley@microchip.com> wrote:
> >
> > On Mon, Dec 04, 2023 at 06:43:03PM -0800, Atish Patra wrote:
> > > SBI v2.0 added few functions to improve SBI PMU extension. In order
> > > to be backward compatible, the driver must use these functions only
> > > if SBI v2.0 is available.
> > >
> > > Signed-off-by: Atish Patra <atishp@rivosinc.com>
> >
> > IMO this does not make sense in a patch of its own and should probably
> > be squashed with the first user for it.
>
> I agree. This patch should be squashed into patch4 where the
> flag is first used.
>

Done. Thanks.


> Regards,
> Anup
>
> >
> > > ---
> > >  drivers/perf/riscv_pmu_sbi.c | 5 +++++
> > >  1 file changed, 5 insertions(+)
> > >
> > > diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> > > index 16acd4dcdb96..40a335350d08 100644
> > > --- a/drivers/perf/riscv_pmu_sbi.c
> > > +++ b/drivers/perf/riscv_pmu_sbi.c
> > > @@ -35,6 +35,8 @@
> > >  PMU_FORMAT_ATTR(event, "config:0-47");
> > >  PMU_FORMAT_ATTR(firmware, "config:63");
> > >
> > > +static bool sbi_v2_available;
> > > +
> > >  static struct attribute *riscv_arch_formats_attr[] = {
> > >       &format_attr_event.attr,
> > >       &format_attr_firmware.attr,
> > > @@ -1108,6 +1110,9 @@ static int __init pmu_sbi_devinit(void)
> > >               return 0;
> > >       }
> > >
> > > +     if (sbi_spec_version >= sbi_mk_version(2, 0))
> > > +             sbi_v2_available = true;
> > > +
> > >       ret = cpuhp_setup_state_multi(CPUHP_AP_PERF_RISCV_STARTING,
> > >                                     "perf/riscv/pmu:starting",
> > >                                     pmu_sbi_starting_cpu, pmu_sbi_dying_cpu);
> > > --
> > > 2.34.1
> > >
diff mbox series

Patch

diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 16acd4dcdb96..40a335350d08 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -35,6 +35,8 @@ 
 PMU_FORMAT_ATTR(event, "config:0-47");
 PMU_FORMAT_ATTR(firmware, "config:63");
 
+static bool sbi_v2_available;
+
 static struct attribute *riscv_arch_formats_attr[] = {
 	&format_attr_event.attr,
 	&format_attr_firmware.attr,
@@ -1108,6 +1110,9 @@  static int __init pmu_sbi_devinit(void)
 		return 0;
 	}
 
+	if (sbi_spec_version >= sbi_mk_version(2, 0))
+		sbi_v2_available = true;
+
 	ret = cpuhp_setup_state_multi(CPUHP_AP_PERF_RISCV_STARTING,
 				      "perf/riscv/pmu:starting",
 				      pmu_sbi_starting_cpu, pmu_sbi_dying_cpu);