Message ID | 20230419221716.3603068-48-atishp@rivosinc.com |
---|---|
State | Changes Requested |
Headers | show
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Wed, 19 Apr 2023 15:19:13 -0700 (PDT) From: Atish Patra <atishp@rivosinc.com> To: linux-kernel@vger.kernel.org Cc: Rajnesh Kanwal <rkanwal@rivosinc.com>, Atish Patra <atishp@rivosinc.com>, Alexandre Ghiti <alex@ghiti.fr>, Andrew Jones <ajones@ventanamicro.com>, Andrew Morton <akpm@linux-foundation.org>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org>, =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= <bjorn@rivosinc.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>, Sean Christopherson <seanjc@google.com>, linux-coco@lists.linux.dev, Dylan Reid <dylan@rivosinc.com>, abrestic@rivosinc.com, Samuel Ortiz <sameo@rivosinc.com>, Christoph Hellwig <hch@infradead.org>, Conor Dooley <conor.dooley@microchip.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Guo Ren <guoren@kernel.org>, Heiko Stuebner <heiko@sntech.de>, Jiri Slaby <jirislaby@kernel.org>, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, Mayuresh Chitale <mchitale@ventanamicro.com>, Palmer Dabbelt <palmer@dabbelt.com>, Paolo Bonzini <pbonzini@redhat.com>, Paul Walmsley <paul.walmsley@sifive.com>, Uladzislau Rezki <urezki@gmail.com> Subject: [RFC 47/48] RISC-V: Add shared bounce buffer to support DBCN for CoVE Guest. Date: Wed, 19 Apr 2023 15:17:15 -0700 Message-Id: <20230419221716.3603068-48-atishp@rivosinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230419221716.3603068-1-atishp@rivosinc.com> References: <20230419221716.3603068-1-atishp@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230419_231917_006190_49DC9A59 X-CRM114-Status: GOOD ( 16.27 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.6 on casper.infradead.org summary: Content analysis details: (-1.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.214.169 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.214.169 listed in list.dnswl.org] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.0 T_SCC_BODY_TEXT_LINE No description available. 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <kvm-riscv.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/kvm-riscv>, <mailto:kvm-riscv-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/kvm-riscv/> List-Post: <mailto:kvm-riscv@lists.infradead.org> List-Help: <mailto:kvm-riscv-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/kvm-riscv>, <mailto:kvm-riscv-request@lists.infradead.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "kvm-riscv" <kvm-riscv-bounces@lists.infradead.org> Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org |
Series |
RISC-V CoVE support
|
expand
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diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c index 311a4f8..9033cca 100644 --- a/drivers/tty/serial/earlycon-riscv-sbi.c +++ b/drivers/tty/serial/earlycon-riscv-sbi.c @@ -9,6 +9,14 @@ #include <linux/init.h> #include <linux/serial_core.h> #include <asm/sbi.h> +#include <asm/cove.h> +#include <asm/covg_sbi.h> +#include <linux/memblock.h> + +#ifdef CONFIG_RISCV_COVE_GUEST +#define DBCN_BOUNCE_BUF_SIZE (PAGE_SIZE) +static char dbcn_buf[DBCN_BOUNCE_BUF_SIZE] __aligned(PAGE_SIZE); +#endif #ifdef CONFIG_RISCV_SBI_V01 static void sbi_putc(struct uart_port *port, unsigned char c) @@ -24,6 +32,33 @@ static void sbi_0_1_console_write(struct console *con, } #endif +#ifdef CONFIG_RISCV_COVE_GUEST +static void sbi_dbcn_console_write_cove(struct console *con, const char *s, + unsigned int n) +{ + phys_addr_t pa = __pa(dbcn_buf); + unsigned int off = 0; + + while (off < n) { + const unsigned int rem = n - off; + const unsigned int size = + rem > DBCN_BOUNCE_BUF_SIZE ? DBCN_BOUNCE_BUF_SIZE : rem; + + memcpy(dbcn_buf, &s[off], size); + + sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE, +#ifdef CONFIG_32BIT + size, pa, (u64)pa >> 32, +#else + size, pa, 0, +#endif + 0, 0, 0); + + off += size; + } +} +#endif + static void sbi_dbcn_console_write(struct console *con, const char *s, unsigned n) { @@ -45,14 +80,26 @@ static int __init early_sbi_setup(struct earlycon_device *device, /* TODO: Check for SBI debug console (DBCN) extension */ if ((sbi_spec_version >= sbi_mk_version(1, 0)) && - (sbi_probe_extension(SBI_EXT_DBCN) > 0)) + (sbi_probe_extension(SBI_EXT_DBCN) > 0)) { +#ifdef CONFIG_RISCV_COVE_GUEST + if (is_cove_guest()) { + ret = sbi_covg_share_memory(__pa(dbcn_buf), + DBCN_BOUNCE_BUF_SIZE); + if (ret) + return ret; + + device->con->write = sbi_dbcn_console_write_cove; + return 0; + } +#endif device->con->write = sbi_dbcn_console_write; - else + } else { #ifdef CONFIG_RISCV_SBI_V01 device->con->write = sbi_0_1_console_write; #else ret = -ENODEV; #endif + } return ret; }