[v1,2/2] RISC-V: Add testcases for form 4 of scalar signed SAT_TRUNC

From: Pan Li <pan2.li@intel.com>

Form 4:
  #define DEF_SAT_S_TRUNC_FMT_4(NT, WT, NT_MIN, NT_MAX) \
  NT __attribute__((noinline))                          \
  sat_s_trunc_##WT##_to_##NT##_fmt_4 (WT x)             \
  {                                                     \
    NT trunc = (NT)x;                                   \
    return (WT)NT_MIN <= x && x < (WT)NT_MAX            \
      ? trunc                                           \
      : x < 0 ? NT_MIN : NT_MAX;                        \
  }

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat_arith.h: Add test helper macros.
	* gcc.target/riscv/sat_s_trunc-4-i16-to-i8.c: New test.
	* gcc.target/riscv/sat_s_trunc-4-i32-to-i16.c: New test.
	* gcc.target/riscv/sat_s_trunc-4-i32-to-i8.c: New test.
	* gcc.target/riscv/sat_s_trunc-4-i64-to-i16.c: New test.
	* gcc.target/riscv/sat_s_trunc-4-i64-to-i32.c: New test.
	* gcc.target/riscv/sat_s_trunc-4-i64-to-i8.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-4-i16-to-i8.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-4-i32-to-i16.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-4-i32-to-i8.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-4-i64-to-i16.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-4-i64-to-i32.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-4-i64-to-i8.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
---
 gcc/testsuite/gcc.target/riscv/sat_arith.h    | 15 ++++++++++
 .../riscv/sat_s_trunc-4-i16-to-i8.c           | 26 +++++++++++++++++
 .../riscv/sat_s_trunc-4-i32-to-i16.c          | 28 +++++++++++++++++++
 .../riscv/sat_s_trunc-4-i32-to-i8.c           | 26 +++++++++++++++++
 .../riscv/sat_s_trunc-4-i64-to-i16.c          | 28 +++++++++++++++++++
 .../riscv/sat_s_trunc-4-i64-to-i32.c          | 26 +++++++++++++++++
 .../riscv/sat_s_trunc-4-i64-to-i8.c           | 26 +++++++++++++++++
 .../riscv/sat_s_trunc-run-4-i16-to-i8.c       | 16 +++++++++++
 .../riscv/sat_s_trunc-run-4-i32-to-i16.c      | 16 +++++++++++
 .../riscv/sat_s_trunc-run-4-i32-to-i8.c       | 16 +++++++++++
 .../riscv/sat_s_trunc-run-4-i64-to-i16.c      | 16 +++++++++++
 .../riscv/sat_s_trunc-run-4-i64-to-i32.c      | 16 +++++++++++
 .../riscv/sat_s_trunc-run-4-i64-to-i8.c       | 16 +++++++++++
 13 files changed, 271 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i16-to-i8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i32-to-i16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i32-to-i8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i16-to-i8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i32-to-i16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i32-to-i8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i8.c

lgtm



juzhe.zhong@rivai.ai
 
From: pan2.li
Date: 2024-10-10 14:53
To: gcc-patches
CC: richard.guenther; Tamar.Christina; juzhe.zhong; kito.cheng; jeffreyalaw; rdapp.gcc; Pan Li
Subject: [PATCH v1 2/2] RISC-V: Add testcases for form 4 of scalar signed SAT_TRUNC
From: Pan Li <pan2.li@intel.com>
 
Form 4:
  #define DEF_SAT_S_TRUNC_FMT_4(NT, WT, NT_MIN, NT_MAX) \
  NT __attribute__((noinline))                          \
  sat_s_trunc_##WT##_to_##NT##_fmt_4 (WT x)             \
  {                                                     \
    NT trunc = (NT)x;                                   \
    return (WT)NT_MIN <= x && x < (WT)NT_MAX            \
      ? trunc                                           \
      : x < 0 ? NT_MIN : NT_MAX;                        \
  }
 
gcc/testsuite/ChangeLog:
 
* gcc.target/riscv/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat_s_trunc-4-i16-to-i8.c: New test.
* gcc.target/riscv/sat_s_trunc-4-i32-to-i16.c: New test.
* gcc.target/riscv/sat_s_trunc-4-i32-to-i8.c: New test.
* gcc.target/riscv/sat_s_trunc-4-i64-to-i16.c: New test.
* gcc.target/riscv/sat_s_trunc-4-i64-to-i32.c: New test.
* gcc.target/riscv/sat_s_trunc-4-i64-to-i8.c: New test.
* gcc.target/riscv/sat_s_trunc-run-4-i16-to-i8.c: New test.
* gcc.target/riscv/sat_s_trunc-run-4-i32-to-i16.c: New test.
* gcc.target/riscv/sat_s_trunc-run-4-i32-to-i8.c: New test.
* gcc.target/riscv/sat_s_trunc-run-4-i64-to-i16.c: New test.
* gcc.target/riscv/sat_s_trunc-run-4-i64-to-i32.c: New test.
* gcc.target/riscv/sat_s_trunc-run-4-i64-to-i8.c: New test.
 
Signed-off-by: Pan Li <pan2.li@intel.com>
---
gcc/testsuite/gcc.target/riscv/sat_arith.h    | 15 ++++++++++
.../riscv/sat_s_trunc-4-i16-to-i8.c           | 26 +++++++++++++++++
.../riscv/sat_s_trunc-4-i32-to-i16.c          | 28 +++++++++++++++++++
.../riscv/sat_s_trunc-4-i32-to-i8.c           | 26 +++++++++++++++++
.../riscv/sat_s_trunc-4-i64-to-i16.c          | 28 +++++++++++++++++++
.../riscv/sat_s_trunc-4-i64-to-i32.c          | 26 +++++++++++++++++
.../riscv/sat_s_trunc-4-i64-to-i8.c           | 26 +++++++++++++++++
.../riscv/sat_s_trunc-run-4-i16-to-i8.c       | 16 +++++++++++
.../riscv/sat_s_trunc-run-4-i32-to-i16.c      | 16 +++++++++++
.../riscv/sat_s_trunc-run-4-i32-to-i8.c       | 16 +++++++++++
.../riscv/sat_s_trunc-run-4-i64-to-i16.c      | 16 +++++++++++
.../riscv/sat_s_trunc-run-4-i64-to-i32.c      | 16 +++++++++++
.../riscv/sat_s_trunc-run-4-i64-to-i8.c       | 16 +++++++++++
13 files changed, 271 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i16-to-i8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i32-to-i16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i32-to-i8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i16-to-i8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i32-to-i16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i32-to-i8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i8.c
 
diff --git a/gcc/testsuite/gcc.target/riscv/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat_arith.h
index 607bc4fc82e..0b3d0ea7073 100644
--- a/gcc/testsuite/gcc.target/riscv/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat_arith.h
@@ -501,6 +501,18 @@ sat_s_trunc_##WT##_to_##NT##_fmt_3 (WT x)             \
#define DEF_SAT_S_TRUNC_FMT_3_WRAP(NT, WT, NT_MIN, NT_MAX) \
   DEF_SAT_S_TRUNC_FMT_3(NT, WT, NT_MIN, NT_MAX)
+#define DEF_SAT_S_TRUNC_FMT_4(NT, WT, NT_MIN, NT_MAX) \
+NT __attribute__((noinline))                          \
+sat_s_trunc_##WT##_to_##NT##_fmt_4 (WT x)             \
+{                                                     \
+  NT trunc = (NT)x;                                   \
+  return (WT)NT_MIN <= x && x < (WT)NT_MAX            \
+    ? trunc                                           \
+    : x < 0 ? NT_MIN : NT_MAX;                        \
+}
+#define DEF_SAT_S_TRUNC_FMT_4_WRAP(NT, WT, NT_MIN, NT_MAX) \
+  DEF_SAT_S_TRUNC_FMT_4(NT, WT, NT_MIN, NT_MAX)
+
#define RUN_SAT_S_TRUNC_FMT_1(NT, WT, x) sat_s_trunc_##WT##_to_##NT##_fmt_1 (x)
#define RUN_SAT_S_TRUNC_FMT_1_WRAP(NT, WT, x) RUN_SAT_S_TRUNC_FMT_1(NT, WT, x)
@@ -510,4 +522,7 @@ sat_s_trunc_##WT##_to_##NT##_fmt_3 (WT x)             \
#define RUN_SAT_S_TRUNC_FMT_3(NT, WT, x) sat_s_trunc_##WT##_to_##NT##_fmt_3 (x)
#define RUN_SAT_S_TRUNC_FMT_3_WRAP(NT, WT, x) RUN_SAT_S_TRUNC_FMT_3(NT, WT, x)
+#define RUN_SAT_S_TRUNC_FMT_4(NT, WT, x) sat_s_trunc_##WT##_to_##NT##_fmt_4 (x)
+#define RUN_SAT_S_TRUNC_FMT_4_WRAP(NT, WT, x) RUN_SAT_S_TRUNC_FMT_4(NT, WT, x)
+
#endif
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i16-to-i8.c
new file mode 100644
index 00000000000..f2c4a297bd6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i16-to-i8.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_trunc_int16_t_to_int8_t_fmt_4:
+** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
+** li\s+[atx][0-9]+,\s*-128
+** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*24
+** sraiw\s+a0,\s*a0,\s*24
+** ret
+*/
+DEF_SAT_S_TRUNC_FMT_4(int8_t, int16_t, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i32-to-i16.c
new file mode 100644
index 00000000000..5805ea07d6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i32-to-i16.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_trunc_int32_t_to_int16_t_fmt_4:
+** li\s+[atx][0-9]+,\s*32768
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** li\s+[atx][0-9]+,\s*-32768
+** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*16
+** sraiw\s+a0,\s*a0,\s*16
+** ret
+*/
+DEF_SAT_S_TRUNC_FMT_4(int16_t, int32_t, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i32-to-i8.c
new file mode 100644
index 00000000000..843d8eeecc5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i32-to-i8.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_trunc_int32_t_to_int8_t_fmt_4:
+** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
+** li\s+[atx][0-9]+,\s*-128
+** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*24
+** sraiw\s+a0,\s*a0,\s*24
+** ret
+*/
+DEF_SAT_S_TRUNC_FMT_4(int8_t, int32_t, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i16.c
new file mode 100644
index 00000000000..b98cb6eab46
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i16.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_trunc_int64_t_to_int16_t_fmt_4:
+** li\s+[atx][0-9]+,\s*32768
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** li\s+[atx][0-9]+,\s*-32768
+** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*16
+** sraiw\s+a0,\s*a0,\s*16
+** ret
+*/
+DEF_SAT_S_TRUNC_FMT_4(int16_t, int64_t, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i32.c
new file mode 100644
index 00000000000..99c42c15cdc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i32.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_trunc_int64_t_to_int32_t_fmt_4:
+** li\s+[atx][0-9]+,\s*-2147483648
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** sext\.w\s+a0,\s*a0
+** ret
+*/
+DEF_SAT_S_TRUNC_FMT_4(int32_t, int64_t, INT32_MIN, INT32_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i8.c
new file mode 100644
index 00000000000..03bc326a060
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-4-i64-to-i8.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_trunc_int64_t_to_int8_t_fmt_4:
+** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
+** li\s+[atx][0-9]+,\s*-128
+** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*24
+** sraiw\s+a0,\s*a0,\s*24
+** ret
+*/
+DEF_SAT_S_TRUNC_FMT_4(int8_t, int64_t, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i16-to-i8.c
new file mode 100644
index 00000000000..6dfdd4bd633
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i16-to-i8.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int8_t
+#define T2 int16_t
+
+DEF_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, INT8_MIN, INT8_MAX)
+
+#define DATA           TEST_UNARY_DATA_WRAP(T1, T2)
+#define T              TEST_UNARY_STRUCT_DECL(T1, T2)
+#define RUN_UNARY(x)   RUN_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, x)
+
+#include "scalar_sat_unary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i32-to-i16.c
new file mode 100644
index 00000000000..fcf8e477bab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i32-to-i16.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int16_t
+#define T2 int32_t
+
+DEF_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, INT16_MIN, INT16_MAX)
+
+#define DATA           TEST_UNARY_DATA_WRAP(T1, T2)
+#define T              TEST_UNARY_STRUCT_DECL(T1, T2)
+#define RUN_UNARY(x)   RUN_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, x)
+
+#include "scalar_sat_unary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i32-to-i8.c
new file mode 100644
index 00000000000..9d911a4515e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i32-to-i8.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int8_t
+#define T2 int32_t
+
+DEF_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, INT8_MIN, INT8_MAX)
+
+#define DATA           TEST_UNARY_DATA_WRAP(T1, T2)
+#define T              TEST_UNARY_STRUCT_DECL(T1, T2)
+#define RUN_UNARY(x)   RUN_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, x)
+
+#include "scalar_sat_unary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i16.c
new file mode 100644
index 00000000000..3cc2498a1a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i16.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int16_t
+#define T2 int64_t
+
+DEF_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, INT16_MIN, INT16_MAX)
+
+#define DATA           TEST_UNARY_DATA_WRAP(T1, T2)
+#define T              TEST_UNARY_STRUCT_DECL(T1, T2)
+#define RUN_UNARY(x)   RUN_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, x)
+
+#include "scalar_sat_unary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i32.c
new file mode 100644
index 00000000000..b9abf50fdf4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int32_t
+#define T2 int64_t
+
+DEF_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, INT32_MIN, INT32_MAX)
+
+#define DATA           TEST_UNARY_DATA_WRAP(T1, T2)
+#define T              TEST_UNARY_STRUCT_DECL(T1, T2)
+#define RUN_UNARY(x)   RUN_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, x)
+
+#include "scalar_sat_unary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i8.c
new file mode 100644
index 00000000000..d90682f0248
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_trunc-run-4-i64-to-i8.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int8_t
+#define T2 int64_t
+
+DEF_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, INT8_MIN, INT8_MAX)
+
+#define DATA           TEST_UNARY_DATA_WRAP(T1, T2)
+#define T              TEST_UNARY_STRUCT_DECL(T1, T2)
+#define RUN_UNARY(x)   RUN_SAT_S_TRUNC_FMT_4_WRAP(T1, T2, x)
+
+#include "scalar_sat_unary.h"