diff mbox series

[v1,1/2] RISC-V: Add testcases for form 3 of signed scalar SAT_ADD

Message ID 20240920021720.582761-1-pan2.li@intel.com
State New
Headers show
Series [v1,1/2] RISC-V: Add testcases for form 3 of signed scalar SAT_ADD | expand

Commit Message

Li, Pan2 Sept. 20, 2024, 2:17 a.m. UTC 
From: Pan Li <pan2.li@intel.com>

This patch would like to add testcases of the signed scalar SAT_ADD
for form 3.  Aka:

Form 3:
  #define DEF_SAT_S_ADD_FMT_3(T, UT, MIN, MAX)           \
  T __attribute__((noinline))                            \
  sat_s_add_##T##_fmt_3 (T x, T y)                       \
  {                                                      \
    T sum;                                               \
    bool overflow = __builtin_add_overflow (x, y, &sum); \
    return overflow ? x < 0 ? MIN : MAX : sum;           \
  }

DEF_SAT_S_ADD_FMT_3 (int64_t, uint64_t, INT64_MIN, INT64_MAX)

The below test are passed for this patch.
* The rv64gcv fully regression test.

It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat_arith.h: Add test helper macros.
	* gcc.target/riscv/sat_s_add-10.c: New test.
	* gcc.target/riscv/sat_s_add-11.c: New test.
	* gcc.target/riscv/sat_s_add-12.c: New test.
	* gcc.target/riscv/sat_s_add-9.c: New test.
	* gcc.target/riscv/sat_s_add-run-10.c: New test.
	* gcc.target/riscv/sat_s_add-run-11.c: New test.
	* gcc.target/riscv/sat_s_add-run-12.c: New test.
	* gcc.target/riscv/sat_s_add-run-9.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
---
 gcc/testsuite/gcc.target/riscv/sat_arith.h    | 14 ++++++++
 gcc/testsuite/gcc.target/riscv/sat_s_add-10.c | 32 +++++++++++++++++++
 gcc/testsuite/gcc.target/riscv/sat_s_add-11.c | 31 ++++++++++++++++++
 gcc/testsuite/gcc.target/riscv/sat_s_add-12.c | 29 +++++++++++++++++
 gcc/testsuite/gcc.target/riscv/sat_s_add-9.c  | 30 +++++++++++++++++
 .../gcc.target/riscv/sat_s_add-run-10.c       | 16 ++++++++++
 .../gcc.target/riscv/sat_s_add-run-11.c       | 16 ++++++++++
 .../gcc.target/riscv/sat_s_add-run-12.c       | 16 ++++++++++
 .../gcc.target/riscv/sat_s_add-run-9.c        | 16 ++++++++++
 9 files changed, 200 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-10.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-11.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-12.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-9.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-run-10.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-run-11.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-run-12.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-run-9.c
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat_arith.h
index b4fbf5dc662..ab141bb1779 100644
--- a/gcc/testsuite/gcc.target/riscv/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat_arith.h
@@ -142,12 +142,26 @@  sat_s_add_##T##_fmt_2 (T x, T y)             \
   return x < 0 ? MIN : MAX;                  \
 }
 
+#define DEF_SAT_S_ADD_FMT_3(T, UT, MIN, MAX)           \
+T __attribute__((noinline))                            \
+sat_s_add_##T##_fmt_3 (T x, T y)                       \
+{                                                      \
+  T sum;                                               \
+  bool overflow = __builtin_add_overflow (x, y, &sum); \
+  return overflow ? x < 0 ? MIN : MAX : sum;           \
+}
+#define DEF_SAT_S_ADD_FMT_3_WRAP(T, UT, MIN, MAX) \
+  DEF_SAT_S_ADD_FMT_3(T, UT, MIN, MAX)
+
 #define RUN_SAT_S_ADD_FMT_1(T, x, y) sat_s_add_##T##_fmt_1(x, y)
 #define RUN_SAT_S_ADD_FMT_1_WRAP(T, x, y) RUN_SAT_S_ADD_FMT_1(T, x, y)
 
 #define RUN_SAT_S_ADD_FMT_2(T, x, y) sat_s_add_##T##_fmt_2(x, y)
 #define RUN_SAT_S_ADD_FMT_2_WRAP(T, x, y) RUN_SAT_S_ADD_FMT_2(T, x, y)
 
+#define RUN_SAT_S_ADD_FMT_3(T, x, y) sat_s_add_##T##_fmt_3(x, y)
+#define RUN_SAT_S_ADD_FMT_3_WRAP(T, x, y) RUN_SAT_S_ADD_FMT_3(T, x, y)
+
 /******************************************************************************/
 /* Saturation Sub (Unsigned and Signed)                                       */
 /******************************************************************************/
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add-10.c b/gcc/testsuite/gcc.target/riscv/sat_s_add-10.c
new file mode 100644
index 00000000000..45329619f9d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add-10.c
@@ -0,0 +1,32 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_int16_t_fmt_3:
+** add\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** li\s+[atx][0-9]+,\s*32768
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*16
+** sraiw\s+a0,\s*a0,\s*16
+** ret
+*/
+DEF_SAT_S_ADD_FMT_3(int16_t, uint16_t, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add-11.c b/gcc/testsuite/gcc.target/riscv/sat_s_add-11.c
new file mode 100644
index 00000000000..e12bc2c042f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add-11.c
@@ -0,0 +1,31 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_int32_t_fmt_3:
+** add\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** li\s+[atx][0-9]+,\s*-2147483648
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** sext\.w\s+a0,\s*a0
+** ret
+*/
+DEF_SAT_S_ADD_FMT_3(int32_t, uint32_t, INT32_MIN, INT32_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add-12.c b/gcc/testsuite/gcc.target/riscv/sat_s_add-12.c
new file mode 100644
index 00000000000..9146193493b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add-12.c
@@ -0,0 +1,29 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_int64_t_fmt_3:
+** add\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** li\s+[atx][0-9]+,\s*-1
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** ret
+*/
+DEF_SAT_S_ADD_FMT_3(int64_t, uint64_t, INT64_MIN, INT64_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add-9.c b/gcc/testsuite/gcc.target/riscv/sat_s_add-9.c
new file mode 100644
index 00000000000..4526eb700ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add-9.c
@@ -0,0 +1,30 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_int8_t_fmt_3:
+** add\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*24
+** sraiw\s+a0,\s*a0,\s*24
+** ret
+*/
+DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add-run-10.c b/gcc/testsuite/gcc.target/riscv/sat_s_add-run-10.c
new file mode 100644
index 00000000000..08b961a6689
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add-run-10.c
@@ -0,0 +1,16 @@ 
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int16_t
+#define T2 uint16_t
+
+DEF_SAT_S_ADD_FMT_3_WRAP(T1, T2, INT16_MIN, INT16_MAX)
+
+#define DATA             TEST_BINARY_DATA_WRAP(T1, ssadd)
+#define T                TEST_BINARY_STRUCT_DECL(T1, ssadd)
+#define RUN_BINARY(x, y) RUN_SAT_S_ADD_FMT_3_WRAP(T1, x, y)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add-run-11.c b/gcc/testsuite/gcc.target/riscv/sat_s_add-run-11.c
new file mode 100644
index 00000000000..3611b6e2788
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add-run-11.c
@@ -0,0 +1,16 @@ 
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int32_t
+#define T2 uint32_t
+
+DEF_SAT_S_ADD_FMT_3_WRAP(T1, T2, INT32_MIN, INT32_MAX)
+
+#define DATA             TEST_BINARY_DATA_WRAP(T1, ssadd)
+#define T                TEST_BINARY_STRUCT_DECL(T1, ssadd)
+#define RUN_BINARY(x, y) RUN_SAT_S_ADD_FMT_3_WRAP(T1, x, y)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add-run-12.c b/gcc/testsuite/gcc.target/riscv/sat_s_add-run-12.c
new file mode 100644
index 00000000000..3eaa6c2d7ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add-run-12.c
@@ -0,0 +1,16 @@ 
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int64_t
+#define T2 uint64_t
+
+DEF_SAT_S_ADD_FMT_3_WRAP(T1, T2, INT64_MIN, INT64_MAX)
+
+#define DATA             TEST_BINARY_DATA_WRAP(T1, ssadd)
+#define T                TEST_BINARY_STRUCT_DECL(T1, ssadd)
+#define RUN_BINARY(x, y) RUN_SAT_S_ADD_FMT_3_WRAP(T1, x, y)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add-run-9.c b/gcc/testsuite/gcc.target/riscv/sat_s_add-run-9.c
new file mode 100644
index 00000000000..6d38e5f1092
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add-run-9.c
@@ -0,0 +1,16 @@ 
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int8_t
+#define T2 uint8_t
+
+DEF_SAT_S_ADD_FMT_3_WRAP(T1, T2, INT8_MIN, INT8_MAX)
+
+#define DATA             TEST_BINARY_DATA_WRAP(T1, ssadd)
+#define T                TEST_BINARY_STRUCT_DECL(T1, ssadd)
+#define RUN_BINARY(x, y) RUN_SAT_S_ADD_FMT_3_WRAP(T1, x, y)
+
+#include "scalar_sat_binary_run_xxx.h"