diff mbox series

[v5,3/4] Match: Support form 3 for scalar signed integer .SAT_ADD

Message ID 20240919041102.3796986-1-pan2.li@intel.com
State New
Headers show
Series [v5,1/4] Match: Add interface match_cond_with_binary_phi for true/false arg | expand

Commit Message

Li, Pan2 Sept. 19, 2024, 4:11 a.m. UTC 
From: Pan Li <pan2.li@intel.com>

This patch would like to support the form 3 of the scalar signed
integer .SAT_ADD.  Aka below example:

Form 3:
  #define DEF_SAT_S_ADD_FMT_3(T, UT, MIN, MAX)           \
  T __attribute__((noinline))                            \
  sat_s_add_##T##_fmt_3 (T x, T y)                       \
  {                                                      \
    T sum;                                               \
    bool overflow = __builtin_add_overflow (x, y, &sum); \
    return overflow ? x < 0 ? MIN : MAX : sum;           \
  }

DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX)

We can tell the difference before and after this patch if backend
implemented the ssadd<m>3 pattern similar as below.

Before this patch:
   4   │ __attribute__((noinline))
   5   │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y)
   6   │ {
   7   │   signed char _1;
   8   │   signed char _2;
   9   │   int8_t _3;
  10   │   __complex__ signed char _6;
  11   │   _Bool _8;
  12   │   signed char _9;
  13   │   signed char _10;
  14   │   signed char _11;
  15   │
  16   │ ;;   basic block 2, loop depth 0
  17   │ ;;    pred:       ENTRY
  18   │   _6 = .ADD_OVERFLOW (x_4(D), y_5(D));
  19   │   _2 = IMAGPART_EXPR <_6>;
  20   │   if (_2 != 0)
  21   │     goto <bb 4>; [50.00%]
  22   │   else
  23   │     goto <bb 3>; [50.00%]
  24   │ ;;    succ:       4
  25   │ ;;                3
  26   │
  27   │ ;;   basic block 3, loop depth 0
  28   │ ;;    pred:       2
  29   │   _1 = REALPART_EXPR <_6>;
  30   │   goto <bb 5>; [100.00%]
  31   │ ;;    succ:       5
  32   │
  33   │ ;;   basic block 4, loop depth 0
  34   │ ;;    pred:       2
  35   │   _8 = x_4(D) < 0;
  36   │   _9 = (signed char) _8;
  37   │   _10 = -_9;
  38   │   _11 = _10 ^ 127;
  39   │ ;;    succ:       5
  40   │
  41   │ ;;   basic block 5, loop depth 0
  42   │ ;;    pred:       3
  43   │ ;;                4
  44   │   # _3 = PHI <_1(3), _11(4)>
  45   │   return _3;
  46   │ ;;    succ:       EXIT
  47   │
  48   │ }

After this patch:
   4   │ __attribute__((noinline))
   5   │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y)
   6   │ {
   7   │   int8_t _3;
   8   │
   9   │ ;;   basic block 2, loop depth 0
  10   │ ;;    pred:       ENTRY
  11   │   _3 = .SAT_ADD (x_4(D), y_5(D)); [tail call]
  12   │   return _3;
  13   │ ;;    succ:       EXIT
  14   │
  15   │ }

The below test suites are passed for this patch.
* The rv64gcv fully regression test.
* The x86 bootstrap test.
* The x86 fully regression test.

gcc/ChangeLog:

	* match.pd: Add the form 3 of signed .SAT_ADD matching.

Signed-off-by: Pan Li <pan2.li@intel.com>
---
 gcc/match.pd | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Richard Biener Sept. 19, 2024, 6:23 a.m. UTC | #1 
On Thu, Sep 19, 2024 at 6:12 AM <pan2.li@intel.com> wrote:
>
> From: Pan Li <pan2.li@intel.com>
>
> This patch would like to support the form 3 of the scalar signed
> integer .SAT_ADD.  Aka below example:
>
> Form 3:
>   #define DEF_SAT_S_ADD_FMT_3(T, UT, MIN, MAX)           \
>   T __attribute__((noinline))                            \
>   sat_s_add_##T##_fmt_3 (T x, T y)                       \
>   {                                                      \
>     T sum;                                               \
>     bool overflow = __builtin_add_overflow (x, y, &sum); \
>     return overflow ? x < 0 ? MIN : MAX : sum;           \
>   }
>
> DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX)
>
> We can tell the difference before and after this patch if backend
> implemented the ssadd<m>3 pattern similar as below.

OK.

> Before this patch:
>    4   │ __attribute__((noinline))
>    5   │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y)
>    6   │ {
>    7   │   signed char _1;
>    8   │   signed char _2;
>    9   │   int8_t _3;
>   10   │   __complex__ signed char _6;
>   11   │   _Bool _8;
>   12   │   signed char _9;
>   13   │   signed char _10;
>   14   │   signed char _11;
>   15   │
>   16   │ ;;   basic block 2, loop depth 0
>   17   │ ;;    pred:       ENTRY
>   18   │   _6 = .ADD_OVERFLOW (x_4(D), y_5(D));
>   19   │   _2 = IMAGPART_EXPR <_6>;
>   20   │   if (_2 != 0)
>   21   │     goto <bb 4>; [50.00%]
>   22   │   else
>   23   │     goto <bb 3>; [50.00%]
>   24   │ ;;    succ:       4
>   25   │ ;;                3
>   26   │
>   27   │ ;;   basic block 3, loop depth 0
>   28   │ ;;    pred:       2
>   29   │   _1 = REALPART_EXPR <_6>;
>   30   │   goto <bb 5>; [100.00%]
>   31   │ ;;    succ:       5
>   32   │
>   33   │ ;;   basic block 4, loop depth 0
>   34   │ ;;    pred:       2
>   35   │   _8 = x_4(D) < 0;
>   36   │   _9 = (signed char) _8;
>   37   │   _10 = -_9;
>   38   │   _11 = _10 ^ 127;
>   39   │ ;;    succ:       5
>   40   │
>   41   │ ;;   basic block 5, loop depth 0
>   42   │ ;;    pred:       3
>   43   │ ;;                4
>   44   │   # _3 = PHI <_1(3), _11(4)>
>   45   │   return _3;
>   46   │ ;;    succ:       EXIT
>   47   │
>   48   │ }
>
> After this patch:
>    4   │ __attribute__((noinline))
>    5   │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y)
>    6   │ {
>    7   │   int8_t _3;
>    8   │
>    9   │ ;;   basic block 2, loop depth 0
>   10   │ ;;    pred:       ENTRY
>   11   │   _3 = .SAT_ADD (x_4(D), y_5(D)); [tail call]
>   12   │   return _3;
>   13   │ ;;    succ:       EXIT
>   14   │
>   15   │ }
>
> The below test suites are passed for this patch.
> * The rv64gcv fully regression test.
> * The x86 bootstrap test.
> * The x86 fully regression test.
>
> gcc/ChangeLog:
>
>         * match.pd: Add the form 3 of signed .SAT_ADD matching.
>
> Signed-off-by: Pan Li <pan2.li@intel.com>
> ---
>  gcc/match.pd | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/gcc/match.pd b/gcc/match.pd
> index 4aa610e2270..fdb59ff0d44 100644
> --- a/gcc/match.pd
> +++ b/gcc/match.pd
> @@ -3241,6 +3241,16 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
>         @2)
>   (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type))))
>
> +/* Signed saturation add, case 4:
> +   Z = .ADD_OVERFLOW (X, Y)
> +   SAT_S_ADD = IMAGPART_EXPR (Z) != 0 ? (-(T)(X < 0) ^ MAX) : sum;  */
> +(match (signed_integer_sat_add @0 @1)
> + (cond^ (ne (imagpart (IFN_ADD_OVERFLOW:c@2 @0 @1)) integer_zerop)
> +       (bit_xor:c (negate (convert (lt @0 integer_zerop))) max_value)
> +       (realpart @2))
> + (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type)
> +      && types_match (type, @0, @1))))
> +
>  /* Unsigned saturation sub, case 1 (branch with gt):
>     SAT_U_SUB = X > Y ? X - Y : 0  */
>  (match (unsigned_integer_sat_sub @0 @1)
> --
> 2.43.0
>
diff mbox series

Patch

diff --git a/gcc/match.pd b/gcc/match.pd
index 4aa610e2270..fdb59ff0d44 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -3241,6 +3241,16 @@  DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 	@2)
  (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type))))
 
+/* Signed saturation add, case 4:
+   Z = .ADD_OVERFLOW (X, Y)
+   SAT_S_ADD = IMAGPART_EXPR (Z) != 0 ? (-(T)(X < 0) ^ MAX) : sum;  */
+(match (signed_integer_sat_add @0 @1)
+ (cond^ (ne (imagpart (IFN_ADD_OVERFLOW:c@2 @0 @1)) integer_zerop)
+	(bit_xor:c (negate (convert (lt @0 integer_zerop))) max_value)
+	(realpart @2))
+ (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type)
+      && types_match (type, @0, @1))))
+
 /* Unsigned saturation sub, case 1 (branch with gt):
    SAT_U_SUB = X > Y ? X - Y : 0  */
 (match (unsigned_integer_sat_sub @0 @1)