| Message ID | 20240818061029.845813-1-pan2.li@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v1,1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 | expand |
On 8/18/24 12:10 AM, pan2.li@intel.com wrote: > From: Pan Li <pan2.li@intel.com> > > This patch would like to add test cases for the unsigned scalar quad and > oct .SAT_TRUNC form 2. Aka: > > Form 2: > #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ > NT __attribute__((noinline)) \ > sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ > { \ > WT max = (WT)(NT)-1; \ > return x > max ? (NT) max : (NT)x; \ > } > > QUAD: > DEF_SAT_U_TRUC_FMT_2 (uint16_t, uint64_t) > DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint32_t) > > OCT: > DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint64_t) > > The below test is passed for this patch. > * The rv64gcv regression test. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/sat_u_trunc-10.c: New test. > * gcc.target/riscv/sat_u_trunc-11.c: New test. > * gcc.target/riscv/sat_u_trunc-12.c: New test. > * gcc.target/riscv/sat_u_trunc-run-10.c: New test. > * gcc.target/riscv/sat_u_trunc-run-11.c: New test. > * gcc.target/riscv/sat_u_trunc-run-12.c: New test. Looks like they're failing in the upstream pre-commit tester: > https://github.com/ewlu/gcc-precommit-ci/issues/2066#issuecomment-2295137578 jeff
Opps, let me double check what happened to my local tester. Pan -----Original Message----- From: Jeff Law <jeffreyalaw@gmail.com> Sent: Sunday, August 18, 2024 11:21 PM To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com Subject: Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 On 8/18/24 12:10 AM, pan2.li@intel.com wrote: > From: Pan Li <pan2.li@intel.com> > > This patch would like to add test cases for the unsigned scalar quad and > oct .SAT_TRUNC form 2. Aka: > > Form 2: > #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ > NT __attribute__((noinline)) \ > sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ > { \ > WT max = (WT)(NT)-1; \ > return x > max ? (NT) max : (NT)x; \ > } > > QUAD: > DEF_SAT_U_TRUC_FMT_2 (uint16_t, uint64_t) > DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint32_t) > > OCT: > DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint64_t) > > The below test is passed for this patch. > * The rv64gcv regression test. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/sat_u_trunc-10.c: New test. > * gcc.target/riscv/sat_u_trunc-11.c: New test. > * gcc.target/riscv/sat_u_trunc-12.c: New test. > * gcc.target/riscv/sat_u_trunc-run-10.c: New test. > * gcc.target/riscv/sat_u_trunc-run-11.c: New test. > * gcc.target/riscv/sat_u_trunc-run-12.c: New test. Looks like they're failing in the upstream pre-commit tester: > https://github.com/ewlu/gcc-precommit-ci/issues/2066#issuecomment-2295137578 jeff
Turn out that the pre-commit doesn't pick up the newest upstream when testing this patch. Pan -----Original Message----- From: Li, Pan2 <pan2.li@intel.com> Sent: Monday, August 19, 2024 9:25 AM To: Jeff Law <jeffreyalaw@gmail.com>; gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com Subject: RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 Opps, let me double check what happened to my local tester. Pan -----Original Message----- From: Jeff Law <jeffreyalaw@gmail.com> Sent: Sunday, August 18, 2024 11:21 PM To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com Subject: Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 On 8/18/24 12:10 AM, pan2.li@intel.com wrote: > From: Pan Li <pan2.li@intel.com> > > This patch would like to add test cases for the unsigned scalar quad and > oct .SAT_TRUNC form 2. Aka: > > Form 2: > #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ > NT __attribute__((noinline)) \ > sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ > { \ > WT max = (WT)(NT)-1; \ > return x > max ? (NT) max : (NT)x; \ > } > > QUAD: > DEF_SAT_U_TRUC_FMT_2 (uint16_t, uint64_t) > DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint32_t) > > OCT: > DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint64_t) > > The below test is passed for this patch. > * The rv64gcv regression test. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/sat_u_trunc-10.c: New test. > * gcc.target/riscv/sat_u_trunc-11.c: New test. > * gcc.target/riscv/sat_u_trunc-12.c: New test. > * gcc.target/riscv/sat_u_trunc-run-10.c: New test. > * gcc.target/riscv/sat_u_trunc-run-11.c: New test. > * gcc.target/riscv/sat_u_trunc-run-12.c: New test. Looks like they're failing in the upstream pre-commit tester: > https://github.com/ewlu/gcc-precommit-ci/issues/2066#issuecomment-2295137578 jeff
Hi Pan, Once the postcommit baseline moves forward (trunk is currently failing to build linux targets [1] [2]) I'll re-trigger precommit for you. Thanks, Patrick [1]: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116409 [2]: https://github.com/patrick-rivos/gcc-postcommit-ci/issues/1564 On 8/18/24 19:49, Li, Pan2 wrote: > Turn out that the pre-commit doesn't pick up the newest upstream when testing this patch. > > Pan > > -----Original Message----- > From: Li, Pan2 <pan2.li@intel.com> > Sent: Monday, August 19, 2024 9:25 AM > To: Jeff Law <jeffreyalaw@gmail.com>; gcc-patches@gcc.gnu.org > Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com > Subject: RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 > > Opps, let me double check what happened to my local tester. > > Pan > > -----Original Message----- > From: Jeff Law <jeffreyalaw@gmail.com> > Sent: Sunday, August 18, 2024 11:21 PM > To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org > Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com > Subject: Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 > > > > On 8/18/24 12:10 AM, pan2.li@intel.com wrote: >> From: Pan Li <pan2.li@intel.com> >> >> This patch would like to add test cases for the unsigned scalar quad and >> oct .SAT_TRUNC form 2. Aka: >> >> Form 2: >> #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ >> NT __attribute__((noinline)) \ >> sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ >> { \ >> WT max = (WT)(NT)-1; \ >> return x > max ? (NT) max : (NT)x; \ >> } >> >> QUAD: >> DEF_SAT_U_TRUC_FMT_2 (uint16_t, uint64_t) >> DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint32_t) >> >> OCT: >> DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint64_t) >> >> The below test is passed for this patch. >> * The rv64gcv regression test. >> >> gcc/testsuite/ChangeLog: >> >> * gcc.target/riscv/sat_u_trunc-10.c: New test. >> * gcc.target/riscv/sat_u_trunc-11.c: New test. >> * gcc.target/riscv/sat_u_trunc-12.c: New test. >> * gcc.target/riscv/sat_u_trunc-run-10.c: New test. >> * gcc.target/riscv/sat_u_trunc-run-11.c: New test. >> * gcc.target/riscv/sat_u_trunc-run-12.c: New test. > Looks like they're failing in the upstream pre-commit tester: > >> https://github.com/ewlu/gcc-precommit-ci/issues/2066#issuecomment-2295137578 > > jeff
Great! Thanks Patrick. Pan -----Original Message----- From: Patrick O'Neill <patrick@rivosinc.com> Sent: Tuesday, August 20, 2024 12:14 AM To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com; Jeff Law <jeffreyalaw@gmail.com> Subject: Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 Hi Pan, Once the postcommit baseline moves forward (trunk is currently failing to build linux targets [1] [2]) I'll re-trigger precommit for you. Thanks, Patrick [1]: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116409 [2]: https://github.com/patrick-rivos/gcc-postcommit-ci/issues/1564 On 8/18/24 19:49, Li, Pan2 wrote: > Turn out that the pre-commit doesn't pick up the newest upstream when testing this patch. > > Pan > > -----Original Message----- > From: Li, Pan2 <pan2.li@intel.com> > Sent: Monday, August 19, 2024 9:25 AM > To: Jeff Law <jeffreyalaw@gmail.com>; gcc-patches@gcc.gnu.org > Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com > Subject: RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 > > Opps, let me double check what happened to my local tester. > > Pan > > -----Original Message----- > From: Jeff Law <jeffreyalaw@gmail.com> > Sent: Sunday, August 18, 2024 11:21 PM > To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org > Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com > Subject: Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 > > > > On 8/18/24 12:10 AM, pan2.li@intel.com wrote: >> From: Pan Li <pan2.li@intel.com> >> >> This patch would like to add test cases for the unsigned scalar quad and >> oct .SAT_TRUNC form 2. Aka: >> >> Form 2: >> #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ >> NT __attribute__((noinline)) \ >> sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ >> { \ >> WT max = (WT)(NT)-1; \ >> return x > max ? (NT) max : (NT)x; \ >> } >> >> QUAD: >> DEF_SAT_U_TRUC_FMT_2 (uint16_t, uint64_t) >> DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint32_t) >> >> OCT: >> DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint64_t) >> >> The below test is passed for this patch. >> * The rv64gcv regression test. >> >> gcc/testsuite/ChangeLog: >> >> * gcc.target/riscv/sat_u_trunc-10.c: New test. >> * gcc.target/riscv/sat_u_trunc-11.c: New test. >> * gcc.target/riscv/sat_u_trunc-12.c: New test. >> * gcc.target/riscv/sat_u_trunc-run-10.c: New test. >> * gcc.target/riscv/sat_u_trunc-run-11.c: New test. >> * gcc.target/riscv/sat_u_trunc-run-12.c: New test. > Looks like they're failing in the upstream pre-commit tester: > >> https://github.com/ewlu/gcc-precommit-ci/issues/2066#issuecomment-2295137578 > > jeff
Hi Patrick, Could you please help to re-trigger the pre-commit? Thanks in advance! Pan -----Original Message----- From: Patrick O'Neill <patrick@rivosinc.com> Sent: Tuesday, August 20, 2024 12:14 AM To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com; Jeff Law <jeffreyalaw@gmail.com> Subject: Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 Hi Pan, Once the postcommit baseline moves forward (trunk is currently failing to build linux targets [1] [2]) I'll re-trigger precommit for you. Thanks, Patrick [1]: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116409 [2]: https://github.com/patrick-rivos/gcc-postcommit-ci/issues/1564 On 8/18/24 19:49, Li, Pan2 wrote: > Turn out that the pre-commit doesn't pick up the newest upstream when testing this patch. > > Pan > > -----Original Message----- > From: Li, Pan2 <pan2.li@intel.com> > Sent: Monday, August 19, 2024 9:25 AM > To: Jeff Law <jeffreyalaw@gmail.com>; gcc-patches@gcc.gnu.org > Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com > Subject: RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 > > Opps, let me double check what happened to my local tester. > > Pan > > -----Original Message----- > From: Jeff Law <jeffreyalaw@gmail.com> > Sent: Sunday, August 18, 2024 11:21 PM > To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org > Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com > Subject: Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 > > > > On 8/18/24 12:10 AM, pan2.li@intel.com wrote: >> From: Pan Li <pan2.li@intel.com> >> >> This patch would like to add test cases for the unsigned scalar quad and >> oct .SAT_TRUNC form 2. Aka: >> >> Form 2: >> #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ >> NT __attribute__((noinline)) \ >> sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ >> { \ >> WT max = (WT)(NT)-1; \ >> return x > max ? (NT) max : (NT)x; \ >> } >> >> QUAD: >> DEF_SAT_U_TRUC_FMT_2 (uint16_t, uint64_t) >> DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint32_t) >> >> OCT: >> DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint64_t) >> >> The below test is passed for this patch. >> * The rv64gcv regression test. >> >> gcc/testsuite/ChangeLog: >> >> * gcc.target/riscv/sat_u_trunc-10.c: New test. >> * gcc.target/riscv/sat_u_trunc-11.c: New test. >> * gcc.target/riscv/sat_u_trunc-12.c: New test. >> * gcc.target/riscv/sat_u_trunc-run-10.c: New test. >> * gcc.target/riscv/sat_u_trunc-run-11.c: New test. >> * gcc.target/riscv/sat_u_trunc-run-12.c: New test. > Looks like they're failing in the upstream pre-commit tester: > >> https://github.com/ewlu/gcc-precommit-ci/issues/2066#issuecomment-2295137578 > > jeff
Thanks for the ping - It's running now: https://github.com/ewlu/gcc-precommit-ci/issues/2146 Patrick On 8/27/24 18:22, Li, Pan2 wrote: > Hi Patrick, > > Could you please help to re-trigger the pre-commit? > Thanks in advance! > > Pan > > -----Original Message----- > From: Patrick O'Neill <patrick@rivosinc.com> > Sent: Tuesday, August 20, 2024 12:14 AM > To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org > Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com; Jeff Law <jeffreyalaw@gmail.com> > Subject: Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 > > Hi Pan, > > Once the postcommit baseline moves forward (trunk is currently failing > to build linux targets [1] [2]) I'll re-trigger precommit for you. > > Thanks, > Patrick > > [1]: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116409 > [2]: https://github.com/patrick-rivos/gcc-postcommit-ci/issues/1564 > > On 8/18/24 19:49, Li, Pan2 wrote: >> Turn out that the pre-commit doesn't pick up the newest upstream when testing this patch. >> >> Pan >> >> -----Original Message----- >> From: Li, Pan2 <pan2.li@intel.com> >> Sent: Monday, August 19, 2024 9:25 AM >> To: Jeff Law <jeffreyalaw@gmail.com>; gcc-patches@gcc.gnu.org >> Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com >> Subject: RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 >> >> Opps, let me double check what happened to my local tester. >> >> Pan >> >> -----Original Message----- >> From: Jeff Law <jeffreyalaw@gmail.com> >> Sent: Sunday, August 18, 2024 11:21 PM >> To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org >> Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com >> Subject: Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2 >> >> >> >> On 8/18/24 12:10 AM, pan2.li@intel.com wrote: >>> From: Pan Li <pan2.li@intel.com> >>> >>> This patch would like to add test cases for the unsigned scalar quad and >>> oct .SAT_TRUNC form 2. Aka: >>> >>> Form 2: >>> #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ >>> NT __attribute__((noinline)) \ >>> sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ >>> { \ >>> WT max = (WT)(NT)-1; \ >>> return x > max ? (NT) max : (NT)x; \ >>> } >>> >>> QUAD: >>> DEF_SAT_U_TRUC_FMT_2 (uint16_t, uint64_t) >>> DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint32_t) >>> >>> OCT: >>> DEF_SAT_U_TRUC_FMT_2 (uint8_t, uint64_t) >>> >>> The below test is passed for this patch. >>> * The rv64gcv regression test. >>> >>> gcc/testsuite/ChangeLog: >>> >>> * gcc.target/riscv/sat_u_trunc-10.c: New test. >>> * gcc.target/riscv/sat_u_trunc-11.c: New test. >>> * gcc.target/riscv/sat_u_trunc-12.c: New test. >>> * gcc.target/riscv/sat_u_trunc-run-10.c: New test. >>> * gcc.target/riscv/sat_u_trunc-run-11.c: New test. >>> * gcc.target/riscv/sat_u_trunc-run-12.c: New test. >> Looks like they're failing in the upstream pre-commit tester: >> >>> https://github.com/ewlu/gcc-precommit-ci/issues/2066#issuecomment-2295137578 >> jeff
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-10.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-10.c new file mode 100644 index 00000000000..7dfc740c54f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-10.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_u_truc_uint32_t_to_uint8_t_fmt_2: +** sltiu\s+[atx][0-9]+,\s*a0,\s*255 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff +** ret +*/ +DEF_SAT_U_TRUC_FMT_2(uint8_t, uint32_t) + +/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-11.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-11.c new file mode 100644 index 00000000000..c50ae96f47d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-11.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_u_truc_uint64_t_to_uint8_t_fmt_2: +** sltiu\s+[atx][0-9]+,\s*a0,\s*255 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff +** ret +*/ +DEF_SAT_U_TRUC_FMT_2(uint8_t, uint64_t) + +/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-12.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-12.c new file mode 100644 index 00000000000..61331cee6fa --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-12.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_u_truc_uint64_t_to_uint16_t_fmt_2: +** li\s+[atx][0-9]+,\s*65536 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** slli\s+a0,\s*a0,\s*48 +** srli\s+a0,\s*a0,\s*48 +** ret +*/ +DEF_SAT_U_TRUC_FMT_2(uint16_t, uint64_t) + +/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-10.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-10.c new file mode 100644 index 00000000000..4bc9303e457 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-10.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint8_t +#define T2 uint32_t + +DEF_SAT_U_TRUC_FMT_2_WRAP(T1, T2) + +#define DATA TEST_UNARY_DATA_WRAP(T1, T2) +#define T TEST_UNARY_STRUCT_DECL(T1, T2) +#define RUN_UNARY(x) RUN_SAT_U_TRUC_FMT_2_WRAP(T1, T2, x) + +#include "scalar_sat_unary.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-11.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-11.c new file mode 100644 index 00000000000..a2afdb9ab22 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-11.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint8_t +#define T2 uint64_t + +DEF_SAT_U_TRUC_FMT_2_WRAP(T1, T2) + +#define DATA TEST_UNARY_DATA_WRAP(T1, T2) +#define T TEST_UNARY_STRUCT_DECL(T1, T2) +#define RUN_UNARY(x) RUN_SAT_U_TRUC_FMT_2_WRAP(T1, T2, x) + +#include "scalar_sat_unary.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-12.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-12.c new file mode 100644 index 00000000000..699485cf139 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-12.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint16_t +#define T2 uint64_t + +DEF_SAT_U_TRUC_FMT_2_WRAP(T1, T2) + +#define DATA TEST_UNARY_DATA_WRAP(T1, T2) +#define T TEST_UNARY_STRUCT_DECL(T1, T2) +#define RUN_UNARY(x) RUN_SAT_U_TRUC_FMT_2_WRAP(T1, T2, x) + +#include "scalar_sat_unary.h"