| Message ID | 20240806125937.779220-1-pan2.li@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] Vect: Make sure the lhs type of .SAT_TRUNC has its mode precision [PR116202] | expand |
On Tue, Aug 6, 2024 at 2:59 PM <pan2.li@intel.com> wrote: > > From: Pan Li <pan2.li@intel.com> > > The .SAT_TRUNC vect pattern recog is valid when the lhs type has > its mode precision. For example as below, QImode with 1 bit precision > like _Bool is invalid here. > > g_12 = (long unsigned int) _2; > _13 = MIN_EXPR <g_12, 1>; > _3 = (_Bool) _13; > > The above pattern cannot be recog as .SAT_TRUNC (g_12) because the dest > only has 1 bit precision with QImode mode. Aka the type doesn't have > the mode precision. > > The below tests are passed for this patch. > 1. The rv64gcv fully regression tests. > 2. The x86 bootstrap tests. > 3. The x86 fully regression tests. OK > PR target/116202 > > gcc/ChangeLog: > > * tree-vect-patterns.cc (vect_recog_sat_trunc_pattern): Add the > type_has_mode_precision_p check for the lhs type. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/base/pr116202-run-1.c: New test. > > Signed-off-by: Pan Li <pan2.li@intel.com> > --- > .../riscv/rvv/base/pr116202-run-1.c | 24 +++++++++++++++++++ > gcc/tree-vect-patterns.cc | 5 ++-- > 2 files changed, 27 insertions(+), 2 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c > > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c > new file mode 100644 > index 00000000000..d150f20b5d9 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c > @@ -0,0 +1,24 @@ > +/* { dg-do run } */ > +/* { dg-options "-O3 -march=rv64gcv_zvl256b -fdump-rtl-expand-details" } */ > + > +int b[24]; > +_Bool c[24]; > + > +int main() { > + for (int f = 0; f < 4; ++f) > + b[f] = 6; > + > + for (int f = 0; f < 24; f += 4) > + c[f] = ({ > + int g = ({ > + unsigned long g = -b[f]; > + 1 < g ? 1 : g; > + }); > + g; > + }); > + > + if (c[0] != 1) > + __builtin_abort (); > +} > + > +/* { dg-final { scan-rtl-dump-not ".SAT_TRUNC " "expand" } } */ > diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc > index 4674a16d15f..74f80587b0e 100644 > --- a/gcc/tree-vect-patterns.cc > +++ b/gcc/tree-vect-patterns.cc > @@ -4695,11 +4695,12 @@ vect_recog_sat_trunc_pattern (vec_info *vinfo, stmt_vec_info stmt_vinfo, > > tree ops[1]; > tree lhs = gimple_assign_lhs (last_stmt); > + tree otype = TREE_TYPE (lhs); > > - if (gimple_unsigned_integer_sat_trunc (lhs, ops, NULL)) > + if (gimple_unsigned_integer_sat_trunc (lhs, ops, NULL) > + && type_has_mode_precision_p (otype)) > { > tree itype = TREE_TYPE (ops[0]); > - tree otype = TREE_TYPE (lhs); > tree v_itype = get_vectype_for_scalar_type (vinfo, itype); > tree v_otype = get_vectype_for_scalar_type (vinfo, otype); > internal_fn fn = IFN_SAT_TRUNC; > -- > 2.43.0 >
> OK. Thanks Richard. Just notice we can put type_has_mode_precision_p as the first condition to avoid unnecessary pattern matching (which is heavy), will commit with this change if no surprise from test suite. From: > + if (gimple_unsigned_integer_sat_trunc (lhs, ops, NULL) > + && type_has_mode_precision_p (otype)) To: > + if (type_has_mode_precision_p (otype) > + && gimple_unsigned_integer_sat_trunc (lhs, ops, NULL)) Pan -----Original Message----- From: Richard Biener <richard.guenther@gmail.com> Sent: Tuesday, August 6, 2024 9:26 PM To: Li, Pan2 <pan2.li@intel.com> Cc: gcc-patches@gcc.gnu.org; juzhe.zhong@rivai.ai; kito.cheng@gmail.com; jeffreyalaw@gmail.com; rdapp.gcc@gmail.com Subject: Re: [PATCH v2] Vect: Make sure the lhs type of .SAT_TRUNC has its mode precision [PR116202] On Tue, Aug 6, 2024 at 2:59 PM <pan2.li@intel.com> wrote: > > From: Pan Li <pan2.li@intel.com> > > The .SAT_TRUNC vect pattern recog is valid when the lhs type has > its mode precision. For example as below, QImode with 1 bit precision > like _Bool is invalid here. > > g_12 = (long unsigned int) _2; > _13 = MIN_EXPR <g_12, 1>; > _3 = (_Bool) _13; > > The above pattern cannot be recog as .SAT_TRUNC (g_12) because the dest > only has 1 bit precision with QImode mode. Aka the type doesn't have > the mode precision. > > The below tests are passed for this patch. > 1. The rv64gcv fully regression tests. > 2. The x86 bootstrap tests. > 3. The x86 fully regression tests. OK > PR target/116202 > > gcc/ChangeLog: > > * tree-vect-patterns.cc (vect_recog_sat_trunc_pattern): Add the > type_has_mode_precision_p check for the lhs type. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/base/pr116202-run-1.c: New test. > > Signed-off-by: Pan Li <pan2.li@intel.com> > --- > .../riscv/rvv/base/pr116202-run-1.c | 24 +++++++++++++++++++ > gcc/tree-vect-patterns.cc | 5 ++-- > 2 files changed, 27 insertions(+), 2 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c > > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c > new file mode 100644 > index 00000000000..d150f20b5d9 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c > @@ -0,0 +1,24 @@ > +/* { dg-do run } */ > +/* { dg-options "-O3 -march=rv64gcv_zvl256b -fdump-rtl-expand-details" } */ > + > +int b[24]; > +_Bool c[24]; > + > +int main() { > + for (int f = 0; f < 4; ++f) > + b[f] = 6; > + > + for (int f = 0; f < 24; f += 4) > + c[f] = ({ > + int g = ({ > + unsigned long g = -b[f]; > + 1 < g ? 1 : g; > + }); > + g; > + }); > + > + if (c[0] != 1) > + __builtin_abort (); > +} > + > +/* { dg-final { scan-rtl-dump-not ".SAT_TRUNC " "expand" } } */ > diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc > index 4674a16d15f..74f80587b0e 100644 > --- a/gcc/tree-vect-patterns.cc > +++ b/gcc/tree-vect-patterns.cc > @@ -4695,11 +4695,12 @@ vect_recog_sat_trunc_pattern (vec_info *vinfo, stmt_vec_info stmt_vinfo, > > tree ops[1]; > tree lhs = gimple_assign_lhs (last_stmt); > + tree otype = TREE_TYPE (lhs); > > - if (gimple_unsigned_integer_sat_trunc (lhs, ops, NULL)) > + if (gimple_unsigned_integer_sat_trunc (lhs, ops, NULL) > + && type_has_mode_precision_p (otype)) > { > tree itype = TREE_TYPE (ops[0]); > - tree otype = TREE_TYPE (lhs); > tree v_itype = get_vectype_for_scalar_type (vinfo, itype); > tree v_otype = get_vectype_for_scalar_type (vinfo, otype); > internal_fn fn = IFN_SAT_TRUNC; > -- > 2.43.0 >
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c new file mode 100644 index 00000000000..d150f20b5d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=rv64gcv_zvl256b -fdump-rtl-expand-details" } */ + +int b[24]; +_Bool c[24]; + +int main() { + for (int f = 0; f < 4; ++f) + b[f] = 6; + + for (int f = 0; f < 24; f += 4) + c[f] = ({ + int g = ({ + unsigned long g = -b[f]; + 1 < g ? 1 : g; + }); + g; + }); + + if (c[0] != 1) + __builtin_abort (); +} + +/* { dg-final { scan-rtl-dump-not ".SAT_TRUNC " "expand" } } */ diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc index 4674a16d15f..74f80587b0e 100644 --- a/gcc/tree-vect-patterns.cc +++ b/gcc/tree-vect-patterns.cc @@ -4695,11 +4695,12 @@ vect_recog_sat_trunc_pattern (vec_info *vinfo, stmt_vec_info stmt_vinfo, tree ops[1]; tree lhs = gimple_assign_lhs (last_stmt); + tree otype = TREE_TYPE (lhs); - if (gimple_unsigned_integer_sat_trunc (lhs, ops, NULL)) + if (gimple_unsigned_integer_sat_trunc (lhs, ops, NULL) + && type_has_mode_precision_p (otype)) { tree itype = TREE_TYPE (ops[0]); - tree otype = TREE_TYPE (lhs); tree v_itype = get_vectype_for_scalar_type (vinfo, itype); tree v_otype = get_vectype_for_scalar_type (vinfo, otype); internal_fn fn = IFN_SAT_TRUNC;