| Message ID | 20240112025215.1776738-1-pan2.li@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v1] RISC-V: Update the comments of riscv_v_ext_mode_p [NFC] | expand |
OK juzhe.zhong@rivai.ai From: pan2.li Date: 2024-01-12 10:52 To: gcc-patches CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng Subject: [PATCH v1] RISC-V: Update the comments of riscv_v_ext_mode_p [NFC] From: Pan Li <pan2.li@intel.com> gcc/ChangeLog: * config/riscv/riscv.cc (riscv_v_ext_mode_p): Update the comments of predicate func riscv_v_ext_mode_p. Signed-off-by: Pan Li <pan2.li@intel.com> --- gcc/config/riscv/riscv.cc | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index df9799d9c5e..f829014a589 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -1361,7 +1361,10 @@ riscv_v_ext_vls_mode_p (machine_mode mode) return false; } -/* Return true if it is either RVV vector mode or RVV tuple mode. */ +/* Return true if it is either of below modes. + 1. RVV vector mode. + 2. RVV tuple mode. + 3. RVV vls mode. */ static bool riscv_v_ext_mode_p (machine_mode mode)
Committed, thanks Juzhe.
Pan
From: juzhe.zhong@rivai.ai <juzhe.zhong@rivai.ai>
Sent: Friday, January 12, 2024 10:54 AM
To: Li, Pan2 <pan2.li@intel.com>; gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Li, Pan2 <pan2.li@intel.com>; Wang, Yanzhang <yanzhang.wang@intel.com>; kito.cheng <kito.cheng@gmail.com>
Subject: Re: [PATCH v1] RISC-V: Update the comments of riscv_v_ext_mode_p [NFC]
OK
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index df9799d9c5e..f829014a589 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -1361,7 +1361,10 @@ riscv_v_ext_vls_mode_p (machine_mode mode) return false; } -/* Return true if it is either RVV vector mode or RVV tuple mode. */ +/* Return true if it is either of below modes. + 1. RVV vector mode. + 2. RVV tuple mode. + 3. RVV vls mode. */ static bool riscv_v_ext_mode_p (machine_mode mode)