Message ID | 20231013022224.3837020-1-pan2.li@intel.com |
---|---|
State | New |
Headers | show |
Series | [v1] RISC-V: Leverage stdint-gcc.h for RVV test cases | expand |
LGTM。 juzhe.zhong@rivai.ai From: pan2.li Date: 2023-10-13 10:22 To: gcc-patches CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng Subject: [PATCH v1] RISC-V: Leverage stdint-gcc.h for RVV test cases From: Pan Li <pan2.li@intel.com> Leverage stdint-gcc.h for the int64_t types instead of typedef. Or we may have conflict with stdint-gcc.h in somewhere else. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c: Include stdint-gcc.h for int types. * gcc.target/riscv/rvv/autovec/unop/math-llrint-run-0.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/test-math.h: Remove int64_t typedef. Signed-off-by: Pan Li <pan2.li@intel.com> --- gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c | 1 + .../gcc.target/riscv/rvv/autovec/unop/math-llrint-run-0.c | 1 + gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h | 2 -- 3 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c index 2d90d232ba1..4bf125f8cc8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c @@ -2,6 +2,7 @@ /* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */ /* { dg-final { check-function-bodies "**" "" } } */ +#include <stdint-gcc.h> #include "test-math.h" /* diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-run-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-run-0.c index 6b69f5568e9..409175a8dff 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-run-0.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-run-0.c @@ -1,6 +1,7 @@ /* { dg-do run { target { riscv_v && rv64 } } } */ /* { dg-additional-options "-std=c99 -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math" } */ +#include <stdint-gcc.h> #include "test-math.h" #define ARRAY_SIZE 128 diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h index 3867bc50a14..a1c9d55bd48 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h @@ -68,8 +68,6 @@ #define FRM_RMM 4 #define FRM_DYN 7 -typedef long long int64_t; - static inline void set_rm (unsigned rm) {
Committed, thanks Juzhe.
Pan
From: juzhe.zhong@rivai.ai <juzhe.zhong@rivai.ai>
Sent: Friday, October 13, 2023 10:26 AM
To: Li, Pan2 <pan2.li@intel.com>; gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Li, Pan2 <pan2.li@intel.com>; Wang, Yanzhang <yanzhang.wang@intel.com>; kito.cheng <kito.cheng@gmail.com>
Subject: Re: [PATCH v1] RISC-V: Leverage stdint-gcc.h for RVV test cases
LGTM。
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c index 2d90d232ba1..4bf125f8cc8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c @@ -2,6 +2,7 @@ /* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */ /* { dg-final { check-function-bodies "**" "" } } */ +#include <stdint-gcc.h> #include "test-math.h" /* diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-run-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-run-0.c index 6b69f5568e9..409175a8dff 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-run-0.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-run-0.c @@ -1,6 +1,7 @@ /* { dg-do run { target { riscv_v && rv64 } } } */ /* { dg-additional-options "-std=c99 -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math" } */ +#include <stdint-gcc.h> #include "test-math.h" #define ARRAY_SIZE 128 diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h index 3867bc50a14..a1c9d55bd48 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h @@ -68,8 +68,6 @@ #define FRM_RMM 4 #define FRM_DYN 7 -typedef long long int64_t; - static inline void set_rm (unsigned rm) {