Message ID | 20230926031256.2692187-1-pan2.li@intel.com |
---|---|
State | New |
Headers | show |
Series | [v1] RISC-V: Rename rounding const fp function for refactor | expand |
LGTM. juzhe.zhong@rivai.ai From: pan2.li Date: 2023-09-26 11:12 To: gcc-patches CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng Subject: [PATCH v1] RISC-V: Rename rounding const fp function for refactor From: Pan Li <pan2.li@intel.com> The rounding related API shared one const, rename it to avoid unnecessary redundant code. gcc/ChangeLog: * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove. (get_fp_rounding_coefficient): Rename. (gen_floor_const_fp): Remove. (expand_vec_ceil): Take renamed func. (expand_vec_floor): Ditto. Signed-off-by: Pan Li <pan2.li@intel.com> --- gcc/config/riscv/riscv-v.cc | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index a1ffefb23f3..9a1df950d58 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -3548,7 +3548,7 @@ cmp_lmul_gt_one (machine_mode mode) greater than and equal to 4503599627370496. */ static rtx -gen_ceil_const_fp (machine_mode inner_mode) +get_fp_rounding_coefficient (machine_mode inner_mode) { REAL_VALUE_TYPE real; @@ -3564,13 +3564,6 @@ gen_ceil_const_fp (machine_mode inner_mode) return const_double_from_real_value (real, inner_mode); } -static rtx -gen_floor_const_fp (machine_mode inner_mode) -{ - /* The floor needs the same floating point const as ceil. */ - return gen_ceil_const_fp (inner_mode); -} - static rtx emit_vec_float_cmp_mask (rtx fp_vector, rtx_code code, rtx fp_scalar, machine_mode vec_fp_mode) @@ -3637,7 +3630,7 @@ expand_vec_ceil (rtx op_0, rtx op_1, machine_mode vec_fp_mode, emit_vec_abs (op_0, op_1, vec_fp_mode); /* Step-2: Generate the mask on const fp. */ - rtx const_fp = gen_ceil_const_fp (GET_MODE_INNER (vec_fp_mode)); + rtx const_fp = get_fp_rounding_coefficient (GET_MODE_INNER (vec_fp_mode)); rtx mask = emit_vec_float_cmp_mask (op_0, LT, const_fp, vec_fp_mode); /* Step-3: Convert to integer on mask, with rounding up (aka ceil). */ @@ -3662,7 +3655,7 @@ expand_vec_floor (rtx op_0, rtx op_1, machine_mode vec_fp_mode, emit_vec_abs (op_0, op_1, vec_fp_mode); /* Step-2: Generate the mask on const fp. */ - rtx const_fp = gen_floor_const_fp (GET_MODE_INNER (vec_fp_mode)); + rtx const_fp = get_fp_rounding_coefficient (GET_MODE_INNER (vec_fp_mode)); rtx mask = emit_vec_float_cmp_mask (op_0, LT, const_fp, vec_fp_mode); /* Step-3: Convert to integer on mask, with rounding down (aka floor). */
Committed, thanks Juzhe.
Pan
From: juzhe.zhong@rivai.ai <juzhe.zhong@rivai.ai>
Sent: Tuesday, September 26, 2023 11:18 AM
To: Li, Pan2 <pan2.li@intel.com>; gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Li, Pan2 <pan2.li@intel.com>; Wang, Yanzhang <yanzhang.wang@intel.com>; kito.cheng <kito.cheng@gmail.com>
Subject: Re: [PATCH v1] RISC-V: Rename rounding const fp function for refactor
LGTM.
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index a1ffefb23f3..9a1df950d58 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -3548,7 +3548,7 @@ cmp_lmul_gt_one (machine_mode mode) greater than and equal to 4503599627370496. */ static rtx -gen_ceil_const_fp (machine_mode inner_mode) +get_fp_rounding_coefficient (machine_mode inner_mode) { REAL_VALUE_TYPE real; @@ -3564,13 +3564,6 @@ gen_ceil_const_fp (machine_mode inner_mode) return const_double_from_real_value (real, inner_mode); } -static rtx -gen_floor_const_fp (machine_mode inner_mode) -{ - /* The floor needs the same floating point const as ceil. */ - return gen_ceil_const_fp (inner_mode); -} - static rtx emit_vec_float_cmp_mask (rtx fp_vector, rtx_code code, rtx fp_scalar, machine_mode vec_fp_mode) @@ -3637,7 +3630,7 @@ expand_vec_ceil (rtx op_0, rtx op_1, machine_mode vec_fp_mode, emit_vec_abs (op_0, op_1, vec_fp_mode); /* Step-2: Generate the mask on const fp. */ - rtx const_fp = gen_ceil_const_fp (GET_MODE_INNER (vec_fp_mode)); + rtx const_fp = get_fp_rounding_coefficient (GET_MODE_INNER (vec_fp_mode)); rtx mask = emit_vec_float_cmp_mask (op_0, LT, const_fp, vec_fp_mode); /* Step-3: Convert to integer on mask, with rounding up (aka ceil). */ @@ -3662,7 +3655,7 @@ expand_vec_floor (rtx op_0, rtx op_1, machine_mode vec_fp_mode, emit_vec_abs (op_0, op_1, vec_fp_mode); /* Step-2: Generate the mask on const fp. */ - rtx const_fp = gen_floor_const_fp (GET_MODE_INNER (vec_fp_mode)); + rtx const_fp = get_fp_rounding_coefficient (GET_MODE_INNER (vec_fp_mode)); rtx mask = emit_vec_float_cmp_mask (op_0, LT, const_fp, vec_fp_mode); /* Step-3: Convert to integer on mask, with rounding down (aka floor). */