diff mbox series

[v1] RISC-V: Fix SAT_* dump check failure due to middle-end change.

Message ID 20240905020106.2433599-1-pan2.li@intel.com
State New
Headers show
Series [v1] RISC-V: Fix SAT_* dump check failure due to middle-end change. | expand

Commit Message

Li, Pan2 Sept. 5, 2024, 2:01 a.m. UTC 
From: Pan Li <pan2.li@intel.com>

Some middl-end change may effect on the times of .SAT_*.  Thus,
refine the dump check for SAT_*, from the scan-times to scan as
we only care about the .SAT_* exist or not.  And there will an
other PATCH to perform similar refinement and this PATCH only
fix the failed test cases.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c: Refine
	the dump check from times to exist.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-1.c: Diito.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-10.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-13.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-14.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-15.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-9.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
---
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c       | 2 +-
 .../riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-1.c     | 2 +-
 .../riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-10.c    | 2 +-
 .../riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-13.c    | 2 +-
 .../riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-14.c    | 2 +-
 .../riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-15.c    | 2 +-
 .../riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-2.c     | 2 +-
 .../riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-5.c     | 2 +-
 .../riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-6.c     | 2 +-
 .../riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-9.c     | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c       | 2 +-
 .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c        | 2 +-
 43 files changed, 43 insertions(+), 43 deletions(-)

Comments

Jeff Law Sept. 5, 2024, 2:10 a.m. UTC | #1 
On 9/4/24 8:01 PM, pan2.li@intel.com wrote:
> From: Pan Li <pan2.li@intel.com>
> 
> Some middl-end change may effect on the times of .SAT_*.  Thus,
> refine the dump check for SAT_*, from the scan-times to scan as
> we only care about the .SAT_* exist or not.  And there will an
> other PATCH to perform similar refinement and this PATCH only
> fix the failed test cases.
This won't apply as I've already updated those tests.  I think verifying 
the number of SAT_ADDs is useful to ensure we don't regress as some of 
these tests detect > 1 SAT_ADD idiom.

jeff
Li, Pan2 Sept. 5, 2024, 2:14 a.m. UTC | #2 
> This won't apply as I've already updated those tests.  I think verifying 
> the number of SAT_ADDs is useful to ensure we don't regress as some of 
> these tests detect > 1 SAT_ADD idiom.

I see, thanks Jeff. Then drop this patch.

Pan

-----Original Message-----
From: Jeff Law <jeffreyalaw@gmail.com> 
Sent: Thursday, September 5, 2024 10:10 AM
To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org
Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com; rdapp.gcc@gmail.com
Subject: Re: [PATCH v1] RISC-V: Fix SAT_* dump check failure due to middle-end change.



On 9/4/24 8:01 PM, pan2.li@intel.com wrote:
> From: Pan Li <pan2.li@intel.com>
> 
> Some middl-end change may effect on the times of .SAT_*.  Thus,
> refine the dump check for SAT_*, from the scan-times to scan as
> we only care about the .SAT_* exist or not.  And there will an
> other PATCH to perform similar refinement and this PATCH only
> fix the failed test cases.
This won't apply as I've already updated those tests.  I think verifying 
the number of SAT_ADDs is useful to ensure we don't regress as some of 
these tests detect > 1 SAT_ADD idiom.

jeff
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c
index c22787b4d94..2b6895ad4de 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c
@@ -16,4 +16,4 @@ 
 */
 DEF_VEC_SAT_U_ADD_FMT_4(uint8_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c
index ced40d41c77..794fe357eb8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_ADD_FMT_4(uint16_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c
index 3c9162ce700..e8b36191f98 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_ADD_FMT_4(uint32_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c
index f689440030f..5f356ec7c8f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_ADD_FMT_4(uint64_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c
index 3f2c409a587..952b4e8fa0f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c
@@ -16,4 +16,4 @@ 
 */
 DEF_VEC_SAT_U_ADD_FMT_5(uint8_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c
index 5432cdc73de..47a1b22a9e4 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_ADD_FMT_5(uint16_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c
index ee8813f0372..9cefa1f498a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_ADD_FMT_5(uint32_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c
index 5f867a2c26f..bc0b7d3950c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_ADD_FMT_5(uint64_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c
index 2e77b067cf3..a838493bb49 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c
@@ -16,4 +16,4 @@ 
 */
 DEF_VEC_SAT_U_ADD_FMT_6(uint8_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c
index 2e824049874..400fab4cc05 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_ADD_FMT_6(uint16_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-1.c
index 74feae0db03..8073b573453 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-1.c
@@ -6,4 +6,4 @@ 
 
 DEF_VEC_SAT_U_ADD_IMM_FMT_3(uint8_t, 9u)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-10.c
index 41140955032..19cd883e199 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-10.c
@@ -6,4 +6,4 @@ 
 
 DEF_VEC_SAT_U_ADD_IMM_FMT_3(uint32_t, 4294967205u)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-13.c
index ff1136a2d31..5ea8ab6ec5a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-13.c
@@ -6,4 +6,4 @@ 
 
 DEF_VEC_SAT_U_ADD_IMM_FMT_3(uint64_t, 119u)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-14.c
index 2157ed71fab..d3451935c39 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-14.c
@@ -6,4 +6,4 @@ 
 
 DEF_VEC_SAT_U_ADD_IMM_FMT_3(uint64_t, 18446744073709551615ull)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-15.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-15.c
index 2fcf951a5eb..500c84e2310 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-15.c
@@ -6,4 +6,4 @@ 
 
 DEF_VEC_SAT_U_ADD_IMM_FMT_3(uint64_t, 9223372036854775807ull)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-2.c
index 46dc6dc9606..9448c07faed 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-2.c
@@ -6,4 +6,4 @@ 
 
 DEF_VEC_SAT_U_ADD_IMM_FMT_3(uint8_t, 219)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-5.c
index 4b4f70da15e..4aecacc8786 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-5.c
@@ -6,4 +6,4 @@ 
 
 DEF_VEC_SAT_U_ADD_IMM_FMT_3(uint16_t, 9u)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-6.c
index ce6c46b7242..03e27827264 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-6.c
@@ -6,4 +6,4 @@ 
 
 DEF_VEC_SAT_U_ADD_IMM_FMT_3(uint16_t, 65530)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-9.c
index ef552b94830..87245a7ca4b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-9.c
@@ -6,4 +6,4 @@ 
 
 DEF_VEC_SAT_U_ADD_IMM_FMT_3(uint32_t, 911u)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c
index b40d004c561..496006195d5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_3(uint16_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c
index cb83e007d03..729b56dc1e1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_3(uint32_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c
index b9d1b4f406e..df25bf1cc4f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_3(uint64_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c
index 503d0206439..10e12989c11 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c
@@ -16,4 +16,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_4(uint8_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c
index 850279db715..2231e3a3789 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_4(uint16_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c
index 0a6d4231543..6f670969f72 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_4(uint32_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c
index 72be3b5187e..8171a688eb2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_4(uint64_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c
index 15e5038212b..62a8e3f4ca9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c
@@ -16,4 +16,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_5(uint8_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c
index a1294611f70..3533fec1f49 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_5(uint16_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c
index d2ebad7713e..6f350efb1b3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_5(uint32_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c
index 0a755a3f612..851948a85e6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_5(uint64_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c
index f4c1d950080..c23cd9c8939 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c
@@ -16,4 +16,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_6(uint8_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c
index a0eeb3ed6a3..0beebe19774 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_6(uint16_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c
index e758dd01908..eb6496af6c6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_6(uint32_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c
index f4f9127e4b7..f19cad6e795 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_6(uint64_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c
index 2c66b5abf16..cc9477c8b88 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c
@@ -16,4 +16,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_9(uint8_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c
index 84212c7100a..4a7d7e55c9f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_9(uint16_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 4 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c
index 8eb4712917e..a4727171777 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_9(uint32_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c
index 4c6064d1892..e8ab4b2336b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_9(uint64_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c
index f9646bea88e..3dd11881e42 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c
@@ -16,4 +16,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_10(uint8_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c
index 5502d7f649d..682d7bcef01 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_10(uint16_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c
index c429af3f2b2..4d1758af337 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_10(uint32_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c
index 091edb624be..6d72841b829 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c
@@ -17,4 +17,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_10(uint64_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c
index 13034682d88..efb4e7d9552 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c
@@ -16,4 +16,4 @@ 
 */
 DEF_VEC_SAT_U_SUB_FMT_3(uint8_t)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump ".SAT_SUB " "expand" } } */