Message ID | 20231013080643.1813480-1-pan2.li@intel.com |
---|---|
State | New |
Headers | show |
Series | [v1] RISC-V: Add test for FP iceil auto vectorization | expand |
Ok juzhe.zhong@rivai.ai From: pan2.li Date: 2023-10-13 16:06 To: gcc-patches CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng Subject: [PATCH v1] RISC-V: Add test for FP iceil auto vectorization From: Pan Li <pan2.li@intel.com> The below FP API are supported already by sharing the same standard name, as well as the machine mode. int iceil (float); This patch would like to add the test cases for ensuring the correctness. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c: New test. * gcc.target/riscv/rvv/autovec/unop/math-iceil-run-0.c: New test. * gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com> --- .../riscv/rvv/autovec/unop/math-iceil-0.c | 19 ++++++ .../riscv/rvv/autovec/unop/math-iceil-run-0.c | 63 +++++++++++++++++++ .../riscv/rvv/autovec/vls/math-iceil-0.c | 30 +++++++++ 3 files changed, 112 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-run-0.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c new file mode 100644 index 00000000000..2d4a1d163d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "test-math.h" + +/* +** test_float_int___builtin_iceilf: +** frrm\s+[atx][0-9]+ +** ... +** fsrmi\s+3 +** ... +** vsetvli\s+[atx][0-9]+,\s*zero,\s*e32,\s*m1,\s*ta,\s*ma +** vfcvt\.x\.f\.v\s+v[0-9]+,\s*v[0-9]+ +** ... +** fsrm\s+[atx][0-9]+ +** ret +*/ +TEST_UNARY_CALL_CVT (float, int, __builtin_iceilf) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-run-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-run-0.c new file mode 100644 index 00000000000..714173a7f8b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-run-0.c @@ -0,0 +1,63 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math" } */ + +#include "test-math.h" + +#define ARRAY_SIZE 128 + +float in[ARRAY_SIZE]; +int out[ARRAY_SIZE]; +int ref[ARRAY_SIZE]; + +TEST_UNARY_CALL_CVT (float, int, __builtin_iceilf) +TEST_ASSERT (int) + +TEST_INIT_CVT (float, 1.2, int, __builtin_iceilf (1.2), 1) +TEST_INIT_CVT (float, -1.2, int, __builtin_iceilf (-1.2), 2) +TEST_INIT_CVT (float, 0.5, int, __builtin_iceilf (0.5), 3) +TEST_INIT_CVT (float, -0.5, int, __builtin_iceilf (-0.5), 4) +TEST_INIT_CVT (float, 0.1, int, __builtin_iceilf (0.1), 5) +TEST_INIT_CVT (float, -0.1, int, __builtin_iceilf (-0.1), 6) +TEST_INIT_CVT (float, 3.0, int, __builtin_iceilf (3.0), 7) +TEST_INIT_CVT (float, -3.0, int, __builtin_iceilf (-3.0), 8) +TEST_INIT_CVT (float, 8388607.5, int, __builtin_iceilf (8388607.5), 9) +TEST_INIT_CVT (float, 8388609.0, int, __builtin_iceilf (8388609.0), 10) +TEST_INIT_CVT (float, -8388607.5, int, __builtin_iceilf (-8388607.5), 11) +TEST_INIT_CVT (float, -8388609.0, int, __builtin_iceilf (-8388609.0), 12) +TEST_INIT_CVT (float, 0.0, int, __builtin_iceilf (-0.0), 13) +TEST_INIT_CVT (float, -0.0, int, __builtin_iceilf (-0.0), 14) +TEST_INIT_CVT (float, 2147483520.0, int, __builtin_iceilf (2147483520.0), 15) +TEST_INIT_CVT (float, 2147483648.0, int, 0x7fffffff, 16) +TEST_INIT_CVT (float, -2147483648.0, int, __builtin_iceilf (-2147483648.0), 17) +TEST_INIT_CVT (float, -2147483904.0, int, 0x80000000, 18) +TEST_INIT_CVT (float, __builtin_inf (), int, __builtin_iceilf (__builtin_inff ()), 19) +TEST_INIT_CVT (float, -__builtin_inf (), int, __builtin_iceilf (-__builtin_inff ()), 20) +TEST_INIT_CVT (float, __builtin_nanf (""), int, 0x7fffffff, 21) + +int +main () +{ + RUN_TEST_CVT (float, int, 1, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 2, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 3, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 4, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 5, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 6, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 7, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 8, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 9, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 10, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 11, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 12, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 13, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 14, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 15, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 16, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 17, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 18, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 19, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 20, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 21, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c new file mode 100644 index 00000000000..f8877a1d564 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */ + +#include "def.h" + +DEF_OP_V_CVT (iceilf, 1, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 2, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 4, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 8, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 16, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 32, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 64, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 128, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 256, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 512, float, int, __builtin_iceilf) + +/* { dg-final { scan-assembler-not {csrr} } } */ +/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */ +/* { dg-final { scan-assembler-times {vfcvt\.x\.f\.v\s+v[0-9]+,\s*v[0-9]+} 9 } } */
Committed, thanks Juzhe.
Pan
From: juzhe.zhong@rivai.ai <juzhe.zhong@rivai.ai>
Sent: Friday, October 13, 2023 4:08 PM
To: Li, Pan2 <pan2.li@intel.com>; gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Li, Pan2 <pan2.li@intel.com>; Wang, Yanzhang <yanzhang.wang@intel.com>; kito.cheng <kito.cheng@gmail.com>
Subject: Re: [PATCH v1] RISC-V: Add test for FP iceil auto vectorization
Ok
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c new file mode 100644 index 00000000000..2d4a1d163d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "test-math.h" + +/* +** test_float_int___builtin_iceilf: +** frrm\s+[atx][0-9]+ +** ... +** fsrmi\s+3 +** ... +** vsetvli\s+[atx][0-9]+,\s*zero,\s*e32,\s*m1,\s*ta,\s*ma +** vfcvt\.x\.f\.v\s+v[0-9]+,\s*v[0-9]+ +** ... +** fsrm\s+[atx][0-9]+ +** ret +*/ +TEST_UNARY_CALL_CVT (float, int, __builtin_iceilf) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-run-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-run-0.c new file mode 100644 index 00000000000..714173a7f8b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-run-0.c @@ -0,0 +1,63 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math" } */ + +#include "test-math.h" + +#define ARRAY_SIZE 128 + +float in[ARRAY_SIZE]; +int out[ARRAY_SIZE]; +int ref[ARRAY_SIZE]; + +TEST_UNARY_CALL_CVT (float, int, __builtin_iceilf) +TEST_ASSERT (int) + +TEST_INIT_CVT (float, 1.2, int, __builtin_iceilf (1.2), 1) +TEST_INIT_CVT (float, -1.2, int, __builtin_iceilf (-1.2), 2) +TEST_INIT_CVT (float, 0.5, int, __builtin_iceilf (0.5), 3) +TEST_INIT_CVT (float, -0.5, int, __builtin_iceilf (-0.5), 4) +TEST_INIT_CVT (float, 0.1, int, __builtin_iceilf (0.1), 5) +TEST_INIT_CVT (float, -0.1, int, __builtin_iceilf (-0.1), 6) +TEST_INIT_CVT (float, 3.0, int, __builtin_iceilf (3.0), 7) +TEST_INIT_CVT (float, -3.0, int, __builtin_iceilf (-3.0), 8) +TEST_INIT_CVT (float, 8388607.5, int, __builtin_iceilf (8388607.5), 9) +TEST_INIT_CVT (float, 8388609.0, int, __builtin_iceilf (8388609.0), 10) +TEST_INIT_CVT (float, -8388607.5, int, __builtin_iceilf (-8388607.5), 11) +TEST_INIT_CVT (float, -8388609.0, int, __builtin_iceilf (-8388609.0), 12) +TEST_INIT_CVT (float, 0.0, int, __builtin_iceilf (-0.0), 13) +TEST_INIT_CVT (float, -0.0, int, __builtin_iceilf (-0.0), 14) +TEST_INIT_CVT (float, 2147483520.0, int, __builtin_iceilf (2147483520.0), 15) +TEST_INIT_CVT (float, 2147483648.0, int, 0x7fffffff, 16) +TEST_INIT_CVT (float, -2147483648.0, int, __builtin_iceilf (-2147483648.0), 17) +TEST_INIT_CVT (float, -2147483904.0, int, 0x80000000, 18) +TEST_INIT_CVT (float, __builtin_inf (), int, __builtin_iceilf (__builtin_inff ()), 19) +TEST_INIT_CVT (float, -__builtin_inf (), int, __builtin_iceilf (-__builtin_inff ()), 20) +TEST_INIT_CVT (float, __builtin_nanf (""), int, 0x7fffffff, 21) + +int +main () +{ + RUN_TEST_CVT (float, int, 1, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 2, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 3, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 4, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 5, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 6, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 7, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 8, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 9, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 10, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 11, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 12, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 13, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 14, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 15, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 16, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 17, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 18, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 19, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 20, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + RUN_TEST_CVT (float, int, 21, __builtin_iceilf, in, out, ref, ARRAY_SIZE); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c new file mode 100644 index 00000000000..f8877a1d564 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */ + +#include "def.h" + +DEF_OP_V_CVT (iceilf, 1, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 2, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 4, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 8, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 16, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 32, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 64, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 128, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 256, float, int, __builtin_iceilf) +DEF_OP_V_CVT (iceilf, 512, float, int, __builtin_iceilf) + +/* { dg-final { scan-assembler-not {csrr} } } */ +/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */ +/* { dg-final { scan-assembler-times {vfcvt\.x\.f\.v\s+v[0-9]+,\s*v[0-9]+} 9 } } */