Message ID | 20231009134123.30601-1-juzhe.zhong@rivai.ai |
---|---|
State | New |
Headers | show |
Series | RISC-V Regression test: Fix FAIL of slp-reduc-4.c for RVV | expand |
On 10/9/23 07:41, Juzhe-Zhong wrote: > RVV vectortizes this case with stride8 load_lanes. > > gcc/testsuite/ChangeLog: > > * gcc.dg/vect/slp-reduc-4.c: Adapt test for stride8 load_lanes. OK. Similar question as my last ack. Do we want a follow-up here which tests the .vect dump for the ! { vect_load_lanes && vec_strided8 } case? jeff
Committed, thanks Jeff. Pan -----Original Message----- From: Jeff Law <jeffreyalaw@gmail.com> Sent: Monday, October 9, 2023 9:52 PM To: Juzhe-Zhong <juzhe.zhong@rivai.ai>; gcc-patches@gcc.gnu.org Cc: rguenther@suse.de Subject: Re: [PATCH] RISC-V Regression test: Fix FAIL of slp-reduc-4.c for RVV On 10/9/23 07:41, Juzhe-Zhong wrote: > RVV vectortizes this case with stride8 load_lanes. > > gcc/testsuite/ChangeLog: > > * gcc.dg/vect/slp-reduc-4.c: Adapt test for stride8 load_lanes. OK. Similar question as my last ack. Do we want a follow-up here which tests the .vect dump for the ! { vect_load_lanes && vec_strided8 } case? jeff
diff --git a/gcc/testsuite/gcc.dg/vect/slp-reduc-4.c b/gcc/testsuite/gcc.dg/vect/slp-reduc-4.c index 15f5c259e98..e2fe01bb13d 100644 --- a/gcc/testsuite/gcc.dg/vect/slp-reduc-4.c +++ b/gcc/testsuite/gcc.dg/vect/slp-reduc-4.c @@ -60,6 +60,6 @@ int main (void) /* For variable-length SVE, the number of scalar statements in the reduction exceeds the number of elements in a 128-bit granule. */ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { ! vect_multiple_sizes } xfail { vect_no_int_min_max || { aarch64_sve && vect_variable_length } } } } } */ -/* { dg-final { scan-tree-dump "vectorizing stmts using SLP" "vect" { target { vect_multiple_sizes } } } } */ +/* { dg-final { scan-tree-dump "vectorizing stmts using SLP" "vect" { target { vect_multiple_sizes && { ! { vect_load_lanes && vect_strided8 } } } } } } */ /* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR" 0 "vect" { xfail { aarch64_sve && vect_variable_length } } } } */