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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52a90a2sm34906725e9.36.2024.12.04.12.26.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:11 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 01/20] exec/tswap: Rename target_words_bigendian -> qemu_binary_is_bigendian Date: Wed, 4 Dec 2024 21:25:43 +0100 Message-ID: <20241204202602.58083-2-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org target_words_bigendian() doesn't return whether a target vCPU expects data in big-endian order, but whether the *binary* has been compiled with big-endian flavor by default. Rename it appropriately to reduce confusion. Mechanical change doing: $ sed -i -e s/target_words_bigendian/qemu_binary_is_bigendian/ \ $(git grep -l target_words_bigendian) Signed-off-by: Philippe Mathieu-Daudé --- include/exec/tswap.h | 18 +++++++++--------- cpu-target.c | 2 +- disas/disas-common.c | 2 +- hw/core/cpu-sysemu.c | 2 +- hw/core/generic-loader.c | 2 +- hw/display/vga.c | 4 ++-- hw/virtio/virtio.c | 2 +- system/qtest.c | 2 +- 8 files changed, 17 insertions(+), 17 deletions(-) diff --git a/include/exec/tswap.h b/include/exec/tswap.h index ecd4faef015..0113ff88fcc 100644 --- a/include/exec/tswap.h +++ b/include/exec/tswap.h @@ -11,15 +11,15 @@ #include "qemu/bswap.h" /** - * target_words_bigendian: - * Returns true if the (default) endianness of the target is big endian, - * false otherwise. Note that in target-specific code, you can use - * TARGET_BIG_ENDIAN directly instead. On the other hand, common - * code should normally never need to know about the endianness of the - * target, so please do *not* use this function unless you know very well - * what you are doing! + * qemu_binary_is_bigendian: Returns QEMU binary default endianness + * + * Returns whether the QEMU binary is built for big endianness flavor + * by default. + * vCPUs use this flavor by default when their endianness is not specified. + * + * This is not a clear API so please do *not* use this function. */ -bool target_words_bigendian(void); +bool qemu_binary_is_bigendian(void); /* * If we're in target-specific code, we can hard-code the swapping @@ -28,7 +28,7 @@ bool target_words_bigendian(void); #ifdef COMPILING_PER_TARGET #define target_needs_bswap() (HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN) #else -#define target_needs_bswap() (HOST_BIG_ENDIAN != target_words_bigendian()) +#define target_needs_bswap() (HOST_BIG_ENDIAN != qemu_binary_is_bigendian()) #endif /* COMPILING_PER_TARGET */ static inline uint16_t tswap16(uint16_t s) diff --git a/cpu-target.c b/cpu-target.c index 499facf7747..ff8c55a810a 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -463,7 +463,7 @@ out: } #endif -bool target_words_bigendian(void) +bool qemu_binary_is_bigendian(void) { return TARGET_BIG_ENDIAN; } diff --git a/disas/disas-common.c b/disas/disas-common.c index de61f6d8a12..7377de0715c 100644 --- a/disas/disas-common.c +++ b/disas/disas-common.c @@ -61,7 +61,7 @@ void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu) s->cpu = cpu; s->info.print_address_func = print_address; - if (target_words_bigendian()) { + if (qemu_binary_is_bigendian()) { s->info.endian = BFD_ENDIAN_BIG; } else { s->info.endian = BFD_ENDIAN_LITTLE; diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index 2a9a2a4eb54..4b85face02b 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -129,7 +129,7 @@ bool cpu_virtio_is_big_endian(CPUState *cpu) if (cc->sysemu_ops->virtio_is_big_endian) { return cc->sysemu_ops->virtio_is_big_endian(cpu); } - return target_words_bigendian(); + return qemu_binary_is_bigendian(); } GuestPanicInformation *cpu_get_crash_info(CPUState *cpu) diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index ea8628b8926..abdd4c08a38 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -134,7 +134,7 @@ static void generic_loader_realize(DeviceState *dev, Error **errp) s->cpu = first_cpu; } - big_endian = target_words_bigendian(); + big_endian = qemu_binary_is_bigendian(); if (s->file) { AddressSpace *as = s->cpu ? s->cpu->as : NULL; diff --git a/hw/display/vga.c b/hw/display/vga.c index 6dbbbf49073..6be02006000 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -2116,7 +2116,7 @@ static bool vga_endian_state_needed(void *opaque) * default one, thus ensuring backward compatibility for * migration of the common case */ - return s->big_endian_fb != target_words_bigendian(); + return s->big_endian_fb != qemu_binary_is_bigendian(); } static const VMStateDescription vmstate_vga_endian = { @@ -2264,7 +2264,7 @@ bool vga_common_init(VGACommonState *s, Object *obj, Error **errp) * into a device attribute set by the machine/platform to remove * all target endian dependencies from this file. */ - s->big_endian_fb = target_words_bigendian(); + s->big_endian_fb = qemu_binary_is_bigendian(); vga_dirty_log_start(s); diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index f12c4aa81eb..b3dede476ed 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -2248,7 +2248,7 @@ int virtio_set_status(VirtIODevice *vdev, uint8_t val) static enum virtio_device_endian virtio_default_endian(void) { - if (target_words_bigendian()) { + if (qemu_binary_is_bigendian()) { return VIRTIO_DEVICE_ENDIAN_BIG; } else { return VIRTIO_DEVICE_ENDIAN_LITTLE; diff --git a/system/qtest.c b/system/qtest.c index 12703a20455..8675a0bd316 100644 --- a/system/qtest.c +++ b/system/qtest.c @@ -704,7 +704,7 @@ static void qtest_process_command(CharBackend *chr, gchar **words) qtest_send(chr, "OK\n"); } else if (strcmp(words[0], "endianness") == 0) { qtest_send_prefix(chr); - if (target_words_bigendian()) { + if (qemu_binary_is_bigendian()) { qtest_sendf(chr, "OK big\n"); } else { qtest_sendf(chr, "OK little\n"); From patchwork Wed Dec 4 20:25:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 2018430 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=dRqngvAN; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385faec0c9dsm6672009f8f.20.2024.12.04.12.26.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:17 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 02/20] hw/core/cpu: Introduce CPUClass::datapath_is_big_endian() handler Date: Wed, 4 Dec 2024 21:25:44 +0100 Message-ID: <20241204202602.58083-3-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce the CPUClass::datapath_is_big_endian() handler, which returns whether a vCPU expects data in memory to be in big endian order or not. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index c3ca0babcb3..91c6581f814 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -105,6 +105,8 @@ struct SysemuCPUOps; * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @has_work: Callback for checking if there is work to do. + * @datapath_is_big_endian: Callback returning whether the vCPU expects + * memory data in big endian order. * @mmu_index: Callback for choosing softmmu mmu index; * may be used internally by memory_rw_debug without TCG. * @memory_rw_debug: Callback for GDB memory access. @@ -151,6 +153,7 @@ struct CPUClass { ObjectClass *(*class_by_name)(const char *cpu_model); void (*parse_features)(const char *typename, char *str, Error **errp); + bool (*datapath_is_big_endian)(CPUState *cpu); bool (*has_work)(CPUState *cpu); int (*mmu_index)(CPUState *cpu, bool ifetch); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, @@ -750,7 +753,7 @@ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs); */ bool cpu_virtio_is_big_endian(CPUState *cpu); -#endif /* CONFIG_USER_ONLY */ +#endif /* !CONFIG_USER_ONLY */ /** * cpu_list_add: From patchwork Wed Dec 4 20:25:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 2018422 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=gvOyf5t2; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385d7611af2sm17657530f8f.22.2024.12.04.12.26.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:22 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 03/20] target/arm: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:45 +0100 Message-ID: <20241204202602.58083-4-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org arm_cpu_virtio_is_big_endian() already returns whether the data path is in big endian. Re-use that. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 6938161b954..3061b2ac18c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1132,7 +1132,7 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq, int level) #endif } -static bool arm_cpu_virtio_is_big_endian(CPUState *cs) +static bool arm_cpu_datapath_is_big_endian(CPUState *cs) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; @@ -2664,7 +2664,7 @@ static const struct SysemuCPUOps arm_sysemu_ops = { .asidx_from_attrs = arm_asidx_from_attrs, .write_elf32_note = arm_cpu_write_elf32_note, .write_elf64_note = arm_cpu_write_elf64_note, - .virtio_is_big_endian = arm_cpu_virtio_is_big_endian, + .virtio_is_big_endian = arm_cpu_datapath_is_big_endian, .legacy_vmsd = &vmstate_arm_cpu, }; #endif @@ -2709,6 +2709,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_phases); cc->class_by_name = arm_cpu_class_by_name; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385dfb2d7e0sm16066857f8f.44.2024.12.04.12.26.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:27 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 04/20] target/ppc: Register CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:46 +0100 Message-ID: <20241204202602.58083-5-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org ppc_cpu_is_big_endian() already returns whether the data path is in big endian. Re-use that, exposing this helper for user emulation. Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/cpu_init.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index efcb80d1c25..9650acb4850 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7285,15 +7285,15 @@ static void ppc_cpu_reset_hold(Object *obj, ResetType type) #endif } -#ifndef CONFIG_USER_ONLY - -static bool ppc_cpu_is_big_endian(CPUState *cs) +static bool ppc_cpu_datapath_is_big_endian(CPUState *cs) { cpu_synchronize_state(cs); return !FIELD_EX64(cpu_env(cs)->msr, MSR, LE); } +#ifndef CONFIG_USER_ONLY + static bool ppc_get_irq_stats(InterruptStatsProvider *obj, uint64_t **irq_counts, unsigned int *nb_irqs) { @@ -7407,7 +7407,7 @@ static const struct SysemuCPUOps ppc_sysemu_ops = { .get_phys_page_debug = ppc_cpu_get_phys_page_debug, .write_elf32_note = ppc32_cpu_write_elf32_note, .write_elf64_note = ppc64_cpu_write_elf64_note, - .virtio_is_big_endian = ppc_cpu_is_big_endian, + .virtio_is_big_endian = ppc_cpu_datapath_is_big_endian, .legacy_vmsd = &vmstate_ppc_cpu, }; #endif @@ -7455,6 +7455,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) &pcc->parent_phases); cc->class_by_name = ppc_cpu_class_by_name; + cc->datapath_is_big_endian = ppc_cpu_datapath_is_big_endian; cc->has_work = ppc_cpu_has_work; cc->mmu_index = ppc_cpu_mmu_index; cc->dump_state = ppc_cpu_dump_state; From patchwork Wed Dec 4 20:25:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 2018425 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=YBpmGZDf; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385f10a12dbsm10075187f8f.105.2024.12.04.12.26.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:32 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 05/20] target/rx: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:47 +0100 Message-ID: <20241204202602.58083-6-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org While on RX the endianness can be set at RESET, we do not implement that; only little endianness is used. Signed-off-by: Philippe Mathieu-Daudé --- target/rx/cpu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 65a74ce720f..391f3214168 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -27,6 +27,15 @@ #include "fpu/softfloat.h" #include "tcg/debug-assert.h" +static bool rx_cpu_datapath_is_big_endian(CPUState *cs) +{ + /* + * Endianness is sampled via a pin at reset, + * but we don't implement that yet. + */ + return false; +} + static void rx_cpu_set_pc(CPUState *cs, vaddr value) { RXCPU *cpu = RX_CPU(cs); @@ -217,6 +226,7 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data) &rcc->parent_phases); cc->class_by_name = rx_cpu_class_by_name; + cc->datapath_is_big_endian = rx_cpu_datapath_is_big_endian; cc->has_work = rx_cpu_has_work; cc->mmu_index = riscv_cpu_mmu_index; cc->dump_state = rx_cpu_dump_state; From patchwork Wed Dec 4 20:25:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 2018427 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=huji3LWF; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Y3Tbs1zVLz1xrC for ; Thu, 5 Dec 2024 07:27:53 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tIvxL-0007fh-Dp; Wed, 04 Dec 2024 15:26:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tIvxK-0007eK-0N for qemu-ppc@nongnu.org; Wed, 04 Dec 2024 15:26:42 -0500 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tIvxH-000754-HG for qemu-ppc@nongnu.org; Wed, 04 Dec 2024 15:26:41 -0500 Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-385dbf79881so836932f8f.1 for ; Wed, 04 Dec 2024 12:26:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733343998; x=1733948798; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HcqXxb9hdcFJ7l5TfHoNchwB1oNn7eM/DNMTs0fqYbc=; b=huji3LWFMRoMtbSsB44ClNzKogtWW4RICRcnr75VI1gp3u/bmBfB1S/OOZp8J2V7qc 6Qd+zcA8GJGWSXhynrSp+WF1GSYxx5doiGV0K6HLEoLJnHutfDjVPg05dgrZ77v0kko8 6FvcmIe6i2nw8f1OhJDrIxnJmMmDq+/QKUKti17I3M+SWa47v7xh5VmToiljB6e0zdDF AtyVh/6OEICIYPqIPjTXFlHXeAiLdHGcU5Evvaqaw/k7zVpmYk85gzQOR213EykQOmtn 2rH0OlwxEflnm1YJSIB0Am3u9BgJtQzZWA1EoTrteKZM91XV9DubHzOnyuaROP78GEwe gKJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733343998; x=1733948798; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HcqXxb9hdcFJ7l5TfHoNchwB1oNn7eM/DNMTs0fqYbc=; b=NqOoVFkHL/lm9hGyV4khWDx55I79+xP920CnMgjn+4a6fD5mdhFS69pFl4IUHer1+T qoTap1NpZppe+zVGjQ19YEpp9ka/WdZq3yMTfEGy2RlCpcFgaCvffQDES0iMM9+6DdbU gBM+h0DsUVhZyrLqnUp2a0DyTOO7WP3SjNp4ocEuIYhngOQi2a5d+hL+hjZAm84kDnCp PUZW9W1BkZyKPbO8pPQ+aVGl1GehOBzO1umNhEEQoXJIC8B19NZliSdg7o+aQuuI6RpT zRkMqVxYoexqPsynfSQ1gv49i2+05bFKa1LhQ9erP0/GumSz7sYMR5ZUbFrWsi8utjRC fq5w== X-Forwarded-Encrypted: i=1; AJvYcCVtRNxFX6wwjqbjrz6wdfpPiIsR5Ofno05kbymfSS8Lmb+kUd7Ttk6j0oUkSe/QCkGoqiR1TspR6Q==@nongnu.org X-Gm-Message-State: AOJu0YwMHfVuf4FJf75dgFHp38FdjIejV4/JCC7He9E+CnDhbhp/BInZ c0JqDRYVC6Akp55CJrnDrhxZB5qEe6I+p6PQWvfWPbyQ92llYIxnLxkBT7dTCCI= X-Gm-Gg: ASbGncvqzinbN2GKnwqhkQs6CSERFqg6B7Uu9YG2RVJB+xHQJshOzNsnFNbLXKBKQD4 i3LnkoDZH2fJiIWg2V3U7Irx9sFgG5cjFC+/atCdsojkvTrW/8CdK1/4V+aKmhtxKZsZuwkhvZV XrWH+/zB78GXyqR9M+ahe85m1C1doUSA0I8n2HvidWAIdbTES08SUkj1cw1jE5qpl/Ih8oEpfKk pZh1QOBPxbtvwlb/P4/fRyTbEOvMyjFXIVcwUVBA0+xIJ2dh7spp7BNNpMcY2rx8vBTxGl5HRIy P528ckFX2enplRjrYHhd3L7R X-Google-Smtp-Source: AGHT+IGzom8YBc2l6q0doPnVLmL9m17aIXaAPwIBHw1YDr4BhvjFN0i1tTry+zE/z0HeVpG+vkxmQA== X-Received: by 2002:a05:6000:2cc:b0:385:f138:97ac with SMTP id ffacd0b85a97d-3861bb5a565mr532650f8f.1.1733343998156; Wed, 04 Dec 2024 12:26:38 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385df74157asm16690526f8f.0.2024.12.04.12.26.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 06/20] target/sparc: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:48 +0100 Message-ID: <20241204202602.58083-7-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org While the SPARC data endianness can be changed at runtime, we do not implement that; only big endianness is used. Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/cpu.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index dd7af86de73..de0386dbf64 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -688,6 +688,20 @@ static void sparc_cpu_dump_state(CPUState *cs, FILE *f, int flags) qemu_fprintf(f, "\n"); } +static bool sparc_cpu_datapath_is_big_endian(CPUState *cs) +{ +#if defined(TARGET_SPARC64) + /* + * SPARCv9 has a couple of PSTATE bits that set the endianness: + * Current Little Endian (PS_CLE) and Trap Little Endian (PS_TLE). + * We don't implement that yet. + */ + return true; +#else + return true; +#endif +} + static void sparc_cpu_set_pc(CPUState *cs, vaddr value) { SPARCCPU *cpu = SPARC_CPU(cs); @@ -958,6 +972,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = sparc_cpu_class_by_name; cc->parse_features = sparc_cpu_parse_features; + cc->datapath_is_big_endian = sparc_cpu_datapath_is_big_endian; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385e49cd788sm13643172f8f.6.2024.12.04.12.27.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:19 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 07/20] target/riscv: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:49 +0100 Message-ID: <20241204202602.58083-8-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org While the RISC-V data endianness can be changed at runtime, we do not implement that. The current translation code assumes little-endian memory accesses (See commit a2f827ff4f4 "target/riscv: accessors to registers upper part and 128-bit load/store"). Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f219f0c3b52..b31b9b3471d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -60,6 +60,22 @@ bool riscv_cpu_is_32bit(RISCVCPU *cpu) return riscv_cpu_mxl(&cpu->env) == MXL_RV32; } +static bool riscv_cpu_datapath_is_big_endian(CPUState *cs) +{ +#ifndef CONFIG_USER_ONLY + /* + * A couple of bits in MSTATUS set the endianness: + * - MSTATUS_UBE (User-mode), + * - MSTATUS_SBE (Supervisor-mode), + * - MSTATUS_MBE (Machine-mode) + * but we don't implement that yet. + */ + return false; +#else + return false; +#endif +} + /* Hash that stores general user set numeric options */ static GHashTable *general_user_opts; @@ -2764,6 +2780,7 @@ static void riscv_cpu_common_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = riscv_cpu_class_by_name; + cc->datapath_is_big_endian = riscv_cpu_datapath_is_big_endian; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d5272b78sm34941055e9.9.2024.12.04.12.27.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:24 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 08/20] target/sh4: Expose CPUSH4State::little_endian property Date: Wed, 4 Dec 2024 21:25:50 +0100 Message-ID: <20241204202602.58083-9-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org SH4 CPUs endianness is set with an external pin in a power-on reset. Signed-off-by: Philippe Mathieu-Daudé --- target/sh4/cpu.h | 6 ++++++ target/sh4/cpu.c | 8 ++++++++ 2 files changed, 14 insertions(+) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index d928bcf0067..2502ddba102 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -198,6 +198,12 @@ typedef struct CPUArchState { /* Fields from here on are preserved over CPU reset. */ int id; /* CPU model */ + /* + * The endian is set with an external pin in a power-on reset. + * The endian cannot be changed dynamically. + */ + bool little_endian; + /* The features that we should emulate. See sh_features above. */ uint32_t features; diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 8f07261dcfd..f54005644c9 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -23,6 +23,7 @@ #include "qapi/error.h" #include "qemu/qemu-print.h" #include "cpu.h" +#include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "exec/exec-all.h" #include "fpu/softfloat-helpers.h" @@ -231,6 +232,12 @@ static void superh_cpu_initfn(Object *obj) env->movcal_backup_tail = &(env->movcal_backup); } +static Property superh_cpu_properties[] = { + DEFINE_PROP_BOOL("little-endian", SuperHCPU, + env.little_endian, !TARGET_BIG_ENDIAN), + DEFINE_PROP_END_OF_LIST(), +}; + #ifndef CONFIG_USER_ONLY static const VMStateDescription vmstate_sh_cpu = { .name = "cpu", @@ -270,6 +277,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) device_class_set_parent_realize(dc, superh_cpu_realizefn, &scc->parent_realize); + device_class_set_props(dc, superh_cpu_properties); resettable_class_set_parent_phases(rc, NULL, superh_cpu_reset_hold, NULL, &scc->parent_phases); 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385d80a77a0sm17412914f8f.58.2024.12.04.12.27.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:30 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 09/20] target/sh4: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:51 +0100 Message-ID: <20241204202602.58083-10-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Implement SH4 datapath_is_big_endian() helper, returning the 'little_endian' property set at reset. Signed-off-by: Philippe Mathieu-Daudé --- target/sh4/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index f54005644c9..69108c1676e 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -29,6 +29,13 @@ #include "fpu/softfloat-helpers.h" #include "tcg/tcg.h" +static bool superh_cpu_datapath_is_big_endian(CPUState *cs) +{ + SuperHCPU *cpu = SUPERH_CPU(cs); + + return !cpu->env.little_endian; +} + static void superh_cpu_set_pc(CPUState *cs, vaddr value) { SuperHCPU *cpu = SUPERH_CPU(cs); @@ -283,6 +290,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) &scc->parent_phases); cc->class_by_name = superh_cpu_class_by_name; + cc->datapath_is_big_endian = superh_cpu_datapath_is_big_endian; cc->has_work = superh_cpu_has_work; cc->mmu_index = sh4_cpu_mmu_index; cc->dump_state = superh_cpu_dump_state; From patchwork Wed Dec 4 20:25:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 2018458 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=WELlmwSj; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Y3TjH6mkhz1yRL for ; Thu, 5 Dec 2024 07:32:35 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tIvyV-00016O-8Y; Wed, 04 Dec 2024 15:27:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tIvyH-0000Ux-WB for qemu-ppc@nongnu.org; Wed, 04 Dec 2024 15:27:43 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tIvyE-0000xB-Fe for qemu-ppc@nongnu.org; Wed, 04 Dec 2024 15:27:41 -0500 Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-434a45f05feso2107445e9.3 for ; Wed, 04 Dec 2024 12:27:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733344056; x=1733948856; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OthQd7angO3Yu/emzCL7LUH+S5aSARcEIzo6mzzFka8=; b=WELlmwSjK0NpqMScJxkhVgND5CiF3ZZMT06gjH3xL0GfW14TqaEcOd6rvpX/Y/gdPa RKPz/JqZEJ0Kk1+kafFhAp++PGO7e6Ev6cw8+UiNJAhUPUi1y5t65a9L2zi9uRuvNo/H qowrzPWJ/W7PgkipixJQ9vvfRKQSDGRUdOusLK/XeWUU07S0Rtw1MnFfFmX0YjcG91wb PmhqXw7pszkAnxetzR+yBzx5EzE/dIwZvMJfhZIA9gX7CD0iQaPyi9/flG1Nvjle4RVn 4Jt2HRAMI267sErj4dGb6STezc/HJwfFmeVb2mLGEPijioJGq2Sd5Ro2Nj6mKE35vbyl uHfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733344056; x=1733948856; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OthQd7angO3Yu/emzCL7LUH+S5aSARcEIzo6mzzFka8=; b=ZFEfz09dH/MxBDVJXA4pcHj/8wUMRDIqOMNrnc6YXWkDqkxBdAulxjdKD/XuIT2uRh fBsuHkcbGwXFCvhIxSHcmaAhV0w+BIPDf1cPt4c949g9HCaqUvMV1UCcPUkkkMTaNVu2 jVTpZA65tOEJS3ZlurgMdcVhbWh0J2XIwrLKOCcVh1dMYFqrSGj3wMxvHOQX/o2cUIGr t5OSwHfFYsnnToJmjkNDnlIpBA2SR50NhY+2Boe8ShGo0dxChFnhid6Q58dNhYy14AXL 3mghlJuXukNxnYIitfGjfOFNqhUNbgzuMrh2GVWtDUiY+c5B5WHS993PAJNjJsGgA6+H 24sA== X-Forwarded-Encrypted: i=1; AJvYcCWDHdiyahN1VvNFMyMsKdKFz5Mmoz6Crt69ACK7+1OOQwaVfDwzBMdx9cYOrFOemS1Q9ra7qTO28g==@nongnu.org X-Gm-Message-State: AOJu0Yy3xVZ/UuXb0kXcOL6YasCcyJFEBsUOd0xkqP70dJuOryEWB/xl ndbg8thJrVAzeG2wbZCc7K2ukaW71bNgwspsq6dui5iIOBhjcXNWYN7ab19Kq4o= X-Gm-Gg: ASbGncs1EXSfpAho55Ixt8vDV55AXV3VlUQRnbOEMGbVi3vDoHwzWP2olRjtv5SQxfJ DdWPk7SicmvqeXOtTZ6LamWJ1AwEPaz5zu0jztvFaiUXA1jVTgDgkxU4+R2V/hya9iNZU1TYpzF b4VIRWBZSbCfxHJ2ar2N+zgXfbqjsRGugJeHPPI1pIl5byRsTqH2GQZ2SLJayCpmEsTxKPBtbCX 8EoqUQ1289d25QDuoF1hjTroohUbXD8Rz3yLOqPiV5KLQ2NpIqE+AYJ2MaNry+Oh6jwdLsXacLU roT3VwCR9uHoEPCX0xRoNaVY X-Google-Smtp-Source: AGHT+IGL1weHWkR4ZXBoHZExspgYdvLCkRNqGxIFbn/7+ohyglQiN1a7pmCzjsSY7fMDCBu9sIdPnQ== X-Received: by 2002:a05:600c:3103:b0:431:5c7b:e939 with SMTP id 5b1f17b1804b1-434d09d1d68mr81549135e9.18.1733344056242; Wed, 04 Dec 2024 12:27:36 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d527eeedsm35050045e9.19.2024.12.04.12.27.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:35 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 10/20] target/microblaze: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:52 +0100 Message-ID: <20241204202602.58083-11-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Implement the MicroBlaze datapath_is_big_endian() handler, returning the value of the ENDI bit. Signed-off-by: Philippe Mathieu-Daudé --- target/microblaze/cpu.h | 2 ++ target/microblaze/cpu.c | 11 +++++++++++ 2 files changed, 13 insertions(+) diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 3e5a3e5c605..dd6b61b34ba 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -412,6 +412,8 @@ void mb_tcg_init(void); /* Ensure there is no overlap between the two masks. */ QEMU_BUILD_BUG_ON(MSR_TB_MASK & IFLAGS_TB_MASK); +bool mb_cpu_datapath_is_big_endian(CPUState *cs); + static inline void cpu_get_tb_cpu_state(CPUMBState *env, vaddr *pc, uint64_t *cs_base, uint32_t *flags) { diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 710eb1146c1..3a0e5713415 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -26,6 +26,7 @@ #include "qapi/error.h" #include "cpu.h" #include "qemu/module.h" +#include "sysemu/hw_accel.h" #include "hw/qdev-properties.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -119,6 +120,15 @@ static bool mb_cpu_has_work(CPUState *cs) return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52c0dd4sm35612765e9.34.2024.12.04.12.27.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:40 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 11/20] target/mips: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:53 +0100 Message-ID: <20241204202602.58083-12-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Implement MIPS datapath_is_big_endian() handler using the already existing mips_env_is_bigendian() method. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index d0a43b6d5c7..13d0ceaa8af 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -27,6 +27,7 @@ #include "internal.h" #include "kvm_mips.h" #include "qemu/module.h" +#include "sysemu/hw_accel.h" #include "sysemu/kvm.h" #include "sysemu/qtest.h" #include "exec/exec-all.h" @@ -132,6 +133,13 @@ static vaddr mips_cpu_get_pc(CPUState *cs) return cpu->env.active_tc.PC; } +static bool mips_cpu_datapath_is_big_endian(CPUState *cs) +{ + cpu_synchronize_state(cs); + + return mips_env_is_bigendian(cpu_env(cs)); +} + static bool mips_cpu_has_work(CPUState *cs) { CPUMIPSState *env = cpu_env(cs); @@ -581,6 +589,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = mips_cpu_class_by_name; + cc->datapath_is_big_endian = mips_cpu_datapath_is_big_endian; cc->has_work = mips_cpu_has_work; cc->mmu_index = mips_cpu_mmu_index; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52aa0b4sm34940765e9.35.2024.12.04.12.27.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:46 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 12/20] target/xtensa: Implement xtensa_isa_is_big_endian() Date: Wed, 4 Dec 2024 21:25:54 +0100 Message-ID: <20241204202602.58083-13-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Xtensa internal fields are opaque, only accessible by the Xtensa libisa. Implement xtensa_isa_is_big_endian() to get vCPU endianness. This should be implemented in libisa, not QEMU, but I couldn't figure out where to contribute this. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/xtensa/xtensa-isa.h | 1 + target/xtensa/xtensa-isa.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/include/hw/xtensa/xtensa-isa.h b/include/hw/xtensa/xtensa-isa.h index a289531bdc8..1cb8e6ccb66 100644 --- a/include/hw/xtensa/xtensa-isa.h +++ b/include/hw/xtensa/xtensa-isa.h @@ -829,6 +829,7 @@ const char *xtensa_funcUnit_name(xtensa_isa isa, xtensa_funcUnit fun); int xtensa_funcUnit_num_copies(xtensa_isa isa, xtensa_funcUnit fun); +bool xtensa_isa_is_big_endian(xtensa_isa isa); #ifdef __cplusplus } diff --git a/target/xtensa/xtensa-isa.c b/target/xtensa/xtensa-isa.c index 630b4f9da1b..36eb4bcf3d4 100644 --- a/target/xtensa/xtensa-isa.c +++ b/target/xtensa/xtensa-isa.c @@ -1741,3 +1741,10 @@ int xtensa_funcUnit_num_copies(xtensa_isa isa, xtensa_funcUnit fun) CHECK_FUNCUNIT(intisa, fun, XTENSA_UNDEFINED); return intisa->funcUnits[fun].num_copies; } + +bool xtensa_isa_is_big_endian(xtensa_isa isa) +{ + xtensa_isa_internal *intisa = (xtensa_isa_internal *)isa; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385e4617a61sm13704523f8f.3.2024.12.04.12.27.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:51 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 13/20] target/xtensa: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:55 +0100 Message-ID: <20241204202602.58083-14-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Implement Xtensa datapath_is_big_endian() helper via libisa. Signed-off-by: Philippe Mathieu-Daudé --- Other accesses to xtensa_isa_internal fields don't call cpu_synchronize_state(), and the libisa doesn't provide a way to switch endianness from translation code. Should we add a sync just in case? --- target/xtensa/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 6f9039abaee..7bf792fd0f4 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -40,6 +40,13 @@ #endif +static bool xtensa_cpu_datapath_is_big_endian(CPUState *cs) +{ + CPUXtensaState *env = cpu_env(cs); + + return xtensa_isa_is_big_endian(env->config->isa); +} + static void xtensa_cpu_set_pc(CPUState *cs, vaddr value) { XtensaCPU *cpu = XTENSA_CPU(cs); @@ -256,6 +263,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) &xcc->parent_phases); cc->class_by_name = xtensa_cpu_class_by_name; + cc->datapath_is_big_endian = xtensa_cpu_datapath_is_big_endian; cc->has_work = xtensa_cpu_has_work; cc->mmu_index = xtensa_cpu_mmu_index; cc->dump_state = xtensa_cpu_dump_state; From patchwork Wed Dec 4 20:25:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 2018432 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=Fuc/JnqI; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Y3Tch6JRCz1xrC for ; Thu, 5 Dec 2024 07:28:36 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tIvyd-0001un-6U; Wed, 04 Dec 2024 15:28:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tIvyb-0001nj-Be for qemu-ppc@nongnu.org; Wed, 04 Dec 2024 15:28:01 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tIvyZ-0001sU-Fm for qemu-ppc@nongnu.org; Wed, 04 Dec 2024 15:28:01 -0500 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-434a2f3bae4so1887145e9.3 for ; Wed, 04 Dec 2024 12:27:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733344078; x=1733948878; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nkZKIsDoSM+ma8HKWntZmvOsZaSUYdAuJc6HKLqlim0=; b=Fuc/JnqIq+P3ZFsiJXKia+YbnDZNJXx2TMWxs+P4uPXgYocFq3FaoBEzPaJoas2g0m tGy165DtIyut5TOZ5373dHiLm4igInBSCTi60EgEScAQhZwfhDXvLo+z5q46hXG+2kUX KXj8kejMkXQs/BUD4k2rJjnqoNsRFGuS9xcmPmP3skdrioog0UKDQ1sl4kSQaZ1FW5h0 tbjvvEUYXZPgY7XMmmS+EU6oZbLPrWIWaaZL2a/s4nSGGsaPY4hnR++T6KMNn2jnQ4li HwM8+z4qIFH7j31UKjWFHxY8vbBGfIbDGZkvkSjbesPQXrozDi+6PUZ6lh8a9LR5IKcx faIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733344078; x=1733948878; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nkZKIsDoSM+ma8HKWntZmvOsZaSUYdAuJc6HKLqlim0=; b=YNHV1eQNZXOcAgzDgUnORdl12kxfnz/8qt4szebA+NaNMYVVjg5XvQYj609kNWy9GY lcy1S2aeJiCHmhfTYvzdS99ANNJkjExHFxuNYkxktpq47POt+Lf3mfFK8TsnxjAoMHA3 jjTzlnUPNW+0FEw0Ql24sq0YH136n1me27m97hsk7Pq60hKuWB/jCzQJ3WuN2iG3Dc5L OlTq2j6tNwcj9TugBfsvt0ftAOCF0xIHHsV2yVBJ0GtbFpTUV6d4twuyJDPcTDjUn7KG k2uW/PWcwaj5Iy8OVwG+BDHCXfQw/jpP1JU7L+cre0ImhAOgMbfqvdPmyM0/Kh6ViHGk vesw== X-Forwarded-Encrypted: i=1; AJvYcCVNCDgyBvQ6cQjZBEXR5ifokyN8tnGPwXcHvR+28i9ymH5E0nDkwkSvnC/zTdCj8CuJLg5Ssea95w==@nongnu.org X-Gm-Message-State: AOJu0YzBFl2xpBPJqIueBmg8MYNGP65cLOE6Pu+3uHmreJq1wSUC2FEr h4BemXprmO2J2A6aLNMnf6RrR3T0p0o7ujQ5Dun1/PHCj1aBAveM6uNOsc5bOgY= X-Gm-Gg: ASbGncvQ6LOf2/xg5pQwTdvfHtkyaggvtA2jZ72Zn++WjsOQq+WHuwmsD85Ut/7gz29 k3njtp2bJYvMyQ5uoRohhvT71J0jw3CWzFuJO5Pw5Du2iRLv+ovtEicQ6RSichlzCWaPdRKyRNo +YEzUcZodvOFQwwPTEkUgKJ4z8PkAXhu3z1ijfsqoo4ucQNoyPyI8qbrbt0+wS6ZCAe99xNEpZJ D/Q/78d2S3mGiZSNknWC2fHwbfW2NKrUC4Z7D9gkQ6ePnXTroTFH6zQxCkEUn6YjGC70+H/ZLsZ LQkekf4eLyM8MfjfiIXTLBlk X-Google-Smtp-Source: AGHT+IEQZCLaeqL3NJdNlkp69TPR8VsZwfrAUk0Iu/WBp1gm2bQ8hewWSnGHoj7rlbErdVRXO1pF/A== X-Received: by 2002:a05:600c:4748:b0:431:59ab:15cf with SMTP id 5b1f17b1804b1-434d09c37bcmr69319945e9.19.1733344078096; Wed, 04 Dec 2024 12:27:58 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52cbd16sm34950775e9.41.2024.12.04.12.27.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:57 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 14/20] target: Implement CPUClass::datapath_is_big_endian (little-endian) Date: Wed, 4 Dec 2024 21:25:56 +0100 Message-ID: <20241204202602.58083-15-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org For all targets which have endianness architecturally predefined as little endian (built using TARGET_BIG_ENDIAN=n), their datapath_is_big_endian() handler simply returns %false. Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.c | 6 ++++++ target/avr/cpu.c | 7 ++++++- target/i386/cpu.c | 6 ++++++ target/loongarch/cpu.c | 6 ++++++ target/tricore/cpu.c | 6 ++++++ 5 files changed, 30 insertions(+), 1 deletion(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 5d75c941f7a..ee844a4c455 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -27,6 +27,11 @@ #include "fpu/softfloat.h" +static bool alpha_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + static void alpha_cpu_set_pc(CPUState *cs, vaddr value) { CPUAlphaState *env = cpu_env(cs); @@ -247,6 +252,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_realize); cc->class_by_name = alpha_cpu_class_by_name; + cc->datapath_is_big_endian = alpha_cpu_datapath_is_big_endian; cc->has_work = alpha_cpu_has_work; cc->mmu_index = alpha_cpu_mmu_index; cc->dump_state = alpha_cpu_dump_state; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 3132842d565..f32f1bee61f 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -159,6 +159,11 @@ static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) return object_class_by_name(cpu_model); } +static bool avr_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags) { CPUAVRState *env = cpu_env(cs); @@ -230,7 +235,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) &mcc->parent_phases); cc->class_by_name = avr_cpu_class_by_name; - + cc->datapath_is_big_endian = avr_cpu_datapath_is_big_endian; cc->has_work = avr_cpu_has_work; cc->mmu_index = avr_cpu_mmu_index; cc->dump_state = avr_cpu_dump_state; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 3725dbbc4b3..f783d311579 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2008,6 +2008,11 @@ static char *x86_cpu_class_get_model_name(X86CPUClass *cc) return cpu_model_from_type(class_name); } +static bool x86_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + typedef struct X86CPUVersionDefinition { X86CPUVersion version; const char *alias; @@ -8588,6 +8593,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->class_by_name = x86_cpu_class_by_name; cc->parse_features = x86_cpu_parse_featurestr; + cc->datapath_is_big_endian = x86_cpu_datapath_is_big_endian; cc->has_work = x86_cpu_has_work; cc->mmu_index = x86_cpu_mmu_index; cc->dump_state = x86_cpu_dump_state; diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 57cc4f314bf..b9cf0091546 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -742,6 +742,11 @@ static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model) return oc; } +static bool loongarch_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) { CPULoongArchState *env = cpu_env(cs); @@ -836,6 +841,7 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) &lacc->parent_phases); cc->class_by_name = loongarch_cpu_class_by_name; + cc->datapath_is_big_endian = loongarch_cpu_datapath_is_big_endian; cc->has_work = loongarch_cpu_has_work; cc->mmu_index = loongarch_cpu_mmu_index; cc->dump_state = loongarch_cpu_dump_state; diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 1a261715907..ba53d83f662 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -29,6 +29,11 @@ static inline void set_feature(CPUTriCoreState *env, int feature) env->features |= 1ULL << feature; } +static bool tricore_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + static const gchar *tricore_gdb_arch_name(CPUState *cs) { return "tricore"; @@ -191,6 +196,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data) resettable_class_set_parent_phases(rc, NULL, tricore_cpu_reset_hold, NULL, &mcc->parent_phases); cc->class_by_name = tricore_cpu_class_by_name; + cc->datapath_is_big_endian = tricore_cpu_datapath_is_big_endian; cc->has_work = tricore_cpu_has_work; cc->mmu_index = tricore_cpu_mmu_index; From patchwork Wed Dec 4 20:25:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 2018435 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d526b158sm36718205e9.8.2024.12.04.12.28.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 15/20] target: Implement CPUClass::datapath_is_big_endian (big-endian) Date: Wed, 4 Dec 2024 21:25:57 +0100 Message-ID: <20241204202602.58083-16-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org For all targets which have endianness architecturally predefined as big endian (built using TARGET_BIG_ENDIAN=y), their datapath_is_big_endian() handler simply returns %true. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Brian Cain --- target/hexagon/cpu.c | 6 ++++++ target/hppa/cpu.c | 6 ++++++ target/m68k/cpu.c | 6 ++++++ target/openrisc/cpu.c | 6 ++++++ target/s390x/cpu.c | 6 ++++++ 5 files changed, 30 insertions(+) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 020038fc490..6407ed80c59 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -245,6 +245,11 @@ void hexagon_debug(CPUHexagonState *env) hexagon_dump(env, stdout, CPU_DUMP_FPU); } +static bool hexagon_cpu_datapath_is_big_endian(CPUState *cs) +{ + return true; +} + static void hexagon_cpu_set_pc(CPUState *cs, vaddr value) { cpu_env(cs)->gpr[HEX_REG_PC] = value; @@ -342,6 +347,7 @@ static void hexagon_cpu_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = hexagon_cpu_class_by_name; + cc->datapath_is_big_endian = hexagon_cpu_datapath_is_big_endian; cc->has_work = hexagon_cpu_has_work; cc->dump_state = hexagon_dump_state; cc->set_pc = hexagon_cpu_set_pc; diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index c38439c1800..8ccd224f2a4 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -203,6 +203,11 @@ static void hppa_cpu_initfn(Object *obj) cpu_hppa_put_psw(env, PSW_W); } +static bool hppa_cpu_datapath_is_big_endian(CPUState *cs) +{ + return true; +} + static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model) { g_autofree char *typename = g_strconcat(cpu_model, "-cpu", NULL); @@ -245,6 +250,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_realize); cc->class_by_name = hppa_cpu_class_by_name; + cc->datapath_is_big_endian = hppa_cpu_datapath_is_big_endian; cc->has_work = hppa_cpu_has_work; cc->mmu_index = hppa_cpu_mmu_index; cc->dump_state = hppa_cpu_dump_state; diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 5fe335558aa..52f8db41d5a 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -24,6 +24,11 @@ #include "migration/vmstate.h" #include "fpu/softfloat.h" +static bool m68k_cpu_datapath_is_big_endian(CPUState *cs) +{ + return true; +} + static void m68k_cpu_set_pc(CPUState *cs, vaddr value) { M68kCPU *cpu = M68K_CPU(cs); @@ -571,6 +576,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = m68k_cpu_class_by_name; + cc->datapath_is_big_endian = m68k_cpu_datapath_is_big_endian; cc->has_work = m68k_cpu_has_work; cc->mmu_index = m68k_cpu_mmu_index; cc->dump_state = m68k_cpu_dump_state; diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index b96561d1f26..16e39b43ec4 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -25,6 +25,11 @@ #include "fpu/softfloat-helpers.h" #include "tcg/tcg.h" +static bool openrisc_cpu_datapath_is_big_endian(CPUState *cs) +{ + return true; +} + static void openrisc_cpu_set_pc(CPUState *cs, vaddr value) { OpenRISCCPU *cpu = OPENRISC_CPU(cs); @@ -257,6 +262,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) &occ->parent_phases); cc->class_by_name = openrisc_cpu_class_by_name; + cc->datapath_is_big_endian = openrisc_cpu_datapath_is_big_endian; cc->has_work = openrisc_cpu_has_work; cc->mmu_index = openrisc_cpu_mmu_index; cc->dump_state = openrisc_cpu_dump_state; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 514c70f3010..eda1e3b286f 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -44,6 +44,11 @@ #define CR0_RESET 0xE0UL #define CR14_RESET 0xC2000000UL; +static bool s390_cpu_datapath_is_big_endian(CPUState *cs) +{ + return true; +} + #ifndef CONFIG_USER_ONLY static bool is_early_exception_psw(uint64_t mask, uint64_t addr) { @@ -390,6 +395,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) &scc->parent_phases); cc->class_by_name = s390_cpu_class_by_name, + cc->datapath_is_big_endian = s390_cpu_datapath_is_big_endian; cc->has_work = s390_cpu_has_work; cc->mmu_index = s390x_cpu_mmu_index; cc->dump_state = s390_cpu_dump_state; From patchwork Wed Dec 4 20:25:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 2018455 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52c0cfdsm36598115e9.33.2024.12.04.12.28.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:08 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 16/20] hw/core/cpu: Expose cpu_datapath_is_big_endian() method Date: Wed, 4 Dec 2024 21:25:58 +0100 Message-ID: <20241204202602.58083-17-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org All target implement their CPUClass::datapath_is_big_endian() helper, we can expose the generic cpu_datapath_is_big_endian() method. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 8 ++++++++ hw/core/cpu-common.c | 7 +++++++ 2 files changed, 15 insertions(+) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 91c6581f814..5c75fe3a842 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -611,6 +611,14 @@ extern __thread CPUState *current_cpu; extern bool mttcg_enabled; #define qemu_tcg_mttcg_enabled() (mttcg_enabled) +/** + * cpu_datapath_is_big_endian: + * @cpu: The CPU whose state is to be inspected. + * + * Returns: %true if the CPU access data in big endian order, %false otherwise. + */ +bool cpu_datapath_is_big_endian(CPUState *cpu); + /** * cpu_paging_enabled: * @cpu: The CPU whose state is to be inspected. diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 09c79035949..92c0c4c6125 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -66,6 +66,13 @@ CPUState *cpu_create(const char *typename) return cpu; } +bool cpu_datapath_is_big_endian(CPUState *cpu) +{ + CPUClass *cc = CPU_GET_CLASS(cpu); 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d527e287sm35412065e9.12.2024.12.04.12.28.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:14 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 17/20] disas: Use cpu_datapath_is_big_endian() Date: Wed, 4 Dec 2024 21:25:59 +0100 Message-ID: <20241204202602.58083-18-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Rather that using the binary endianness, use the vCPU one. Signed-off-by: Philippe Mathieu-Daudé --- disas/disas-common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/disas/disas-common.c b/disas/disas-common.c index 7377de0715c..ef91c43449e 100644 --- a/disas/disas-common.c +++ b/disas/disas-common.c @@ -7,7 +7,6 @@ #include "disas/disas.h" #include "disas/capstone.h" #include "hw/core/cpu.h" -#include "exec/tswap.h" #include "disas-internal.h" @@ -61,7 +60,7 @@ void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu) s->cpu = cpu; s->info.print_address_func = print_address; - if (qemu_binary_is_bigendian()) { + if (cpu_datapath_is_big_endian(cpu)) { s->info.endian = BFD_ENDIAN_BIG; } else { s->info.endian = BFD_ENDIAN_LITTLE; From patchwork Wed Dec 4 20:26:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 2018434 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=PTM+th+l; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Y3Tfs4Dvnz1yRL for ; Thu, 5 Dec 2024 07:30:29 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tIvz4-0003ka-89; Wed, 04 Dec 2024 15:28:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tIvyz-0003BF-RZ for qemu-ppc@nongnu.org; Wed, 04 Dec 2024 15:28:25 -0500 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tIvyx-0003Uo-4G for qemu-ppc@nongnu.org; Wed, 04 Dec 2024 15:28:25 -0500 Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-432d86a3085so1323235e9.2 for ; Wed, 04 Dec 2024 12:28:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733344101; x=1733948901; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+kCFZSFSFl2GPP7FnxAPq5KUTVvEzSw2EnjHpYSMwwc=; b=PTM+th+lByViOglR4dEWHAsKgVxSUueLcvOeIDvXbWY/hBirkZpWJ1wVQq379hpKbo 4nxiSau9O0FOUN/WW5X14hI/zFEvUlHc77ORhJAdkrxfd0zr3bmlykv2C8JgooYyJnyG LWc8DXjyYigwQ7RuXmbk+CDLBiBb2O93pWnPZmpCVFNH0g0gtsu2s+ADdF71Vp3dC7vf ZvH1MO5DAlg1Tc3MaGmtrSg74qDEhVDcwWeSzvnXlYX4LC8EXG+LF/Bzd8PD0m1cHLgh r2dfqhh+QI0SXOncQGKSk4tcEz2k4Y1y7XRsYDgC9cDm9jRvkEFHijZRx7XNfxN0Gjnh 85Xg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733344101; x=1733948901; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+kCFZSFSFl2GPP7FnxAPq5KUTVvEzSw2EnjHpYSMwwc=; b=Q2wD5nRlxE4KpDTRBd8OPMsJr2+L0YKz+LGZ79cwN6JUulaG/tF1PHkP65FVBcVHLL fwLsEoZFqexWSfhsyNN0FpmaotbT/T0FKIOGxIIXzbSo4IF9RslALsn8Xiia5MfxkCA7 hoBp29hpi5en0OLdIAFO5JFHM+uackxDvNabj5oZKeSP7EPxHMP8MzMlGyXtQUFTVXxp 4KOJzasj5xzVY7TeQJGKME82LZA9v4UQCEf7uolbXe6/3pcDg7D5ljunvZLfVMhy8JzZ 3T0APPoeGgv82t1XD0YFLWUO1yhHPSP8iPpuMOIpaGdOVxBsL4An5Q8Jmq2zmWk/xPgS EsWg== X-Forwarded-Encrypted: i=1; AJvYcCUwHeNbhqOtaDBMMJfj+H/LGsYAsf+WB91vcdJQSBj2xlYKzabTAPu6myoKmR3axJvRO3NL7lYAsA==@nongnu.org X-Gm-Message-State: AOJu0YzGDzUYDq5hqf2z1y52PE3C9KIVt0PoMFLL2E+ICWDotx8qajj8 D3xTAIYxUQIcttjlwahv6Nts/FXjzDWxEujvYWI/S86QDKtTuOSeJc+Hxv30IiQ= X-Gm-Gg: ASbGncuQz+CP/4CUizKnuX5MzuJ7xliZWUV0ztSDzCcbvY3LFRPpA7YwvVPPQXjn/MU dTXnop4DdxXeBn1+Sjq7igXVDTbAxdnpDPC0BXKxSZyf/haWQsiaqIDAq9j3vq+FdpsWjMU24DS HmUFH+4b+dfPpzYGJMEZdPrBnyMHm0zt3gDYJmuRrFeGw89waJt52QXRPCmKkVNd43hW6Lae1RG HRXSiWzRP3sPEsAxgOGQCAjkofyi8SyDb/SlfYlgSNWMQ1bYKlJyGwViiAPgMLPGkm5i41F3RWD Z7o+fJ3zXozoSc3e8OX0nFvt X-Google-Smtp-Source: AGHT+IEwlcXEYWoNFtl7tKT/Gy5FK8B2HE1HWe0k/S+rt7y9oWPFjlOgO3uZdR7sqNHOrOJdTTGk0w== X-Received: by 2002:a05:600c:4e8a:b0:426:616e:db8d with SMTP id 5b1f17b1804b1-434d09c8d82mr70145375e9.15.1733344101212; Wed, 04 Dec 2024 12:28:21 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Philippe Mathieu-Daudé --- hw/core/generic-loader.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index abdd4c08a38..7b3b5f06565 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -31,7 +31,6 @@ */ #include "qemu/osdep.h" -#include "exec/tswap.h" #include "sysemu/dma.h" #include "sysemu/reset.h" #include "hw/boards.h" @@ -66,7 +65,6 @@ static void generic_loader_realize(DeviceState *dev, Error **errp) { GenericLoaderState *s = GENERIC_LOADER(dev); hwaddr entry; - int big_endian; ssize_t size = 0; s->set_pc = false; @@ -134,14 +132,13 @@ static void generic_loader_realize(DeviceState *dev, Error **errp) s->cpu = first_cpu; } - big_endian = qemu_binary_is_bigendian(); - if (s->file) { AddressSpace *as = s->cpu ? s->cpu->as : NULL; if (!s->force_raw) { size = load_elf_as(s->file, NULL, NULL, NULL, &entry, NULL, NULL, - NULL, big_endian, 0, 0, 0, as); + NULL, cpu_datapath_is_big_endian(s->cpu), + 0, 0, 0, as); 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385dece67dasm16908928f8f.8.2024.12.04.12.28.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:25 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [RFC PATCH 19/20] hw/virtio: Use cpu_datapath_is_big_endian() Date: Wed, 4 Dec 2024 21:26:01 +0100 Message-ID: <20241204202602.58083-20-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Rather that using the binary endianness, use the vCPU one. The target affected by this change are MIPS, MicroBlaze, SH-4 and Xtensa. SPARC, RISC-V and RX could be affected later if their CPUClass::datapath_is_big_endian() handler is fully implemented. Signed-off-by: Philippe Mathieu-Daudé --- hw/virtio/virtio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index b3dede476ed..c57845a16db 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -2257,7 +2257,7 @@ static enum virtio_device_endian virtio_default_endian(void) static enum virtio_device_endian virtio_current_cpu_endian(void) { - if (cpu_virtio_is_big_endian(current_cpu)) { + if (cpu_datapath_is_big_endian(current_cpu)) { return VIRTIO_DEVICE_ENDIAN_BIG; } else { return VIRTIO_DEVICE_ENDIAN_LITTLE; From patchwork Wed Dec 4 20:26:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 2018449 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=B2fGai38; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Y3ThR3lpwz1yRL for ; Thu, 5 Dec 2024 07:31:51 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tIw0C-0005au-Ck; Wed, 04 Dec 2024 15:29:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tIvz9-0003x6-4D for qemu-ppc@nongnu.org; Wed, 04 Dec 2024 15:28:35 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tIvz7-0003aQ-Dy for qemu-ppc@nongnu.org; Wed, 04 Dec 2024 15:28:34 -0500 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-434a1833367so1309515e9.1 for ; Wed, 04 Dec 2024 12:28:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733344111; x=1733948911; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9cBEMnN1TXHS4bt02AxYmkT0i+FxThQSvcImr5g6Wp4=; b=B2fGai38bUK9ei9o/LTCXZjWHaxGueoxQg66TYG+pnCxwED/Jpjf+C2Z3xKtsd7cOA KDjXUgaxx/IIdh+RLpqs9eZ6IH9fYZIXPYxHxcqPiC2gQ4B5/tHmJ/ITrwbMU8GscAtZ Z9zcNNRk8Hri/Mj8+CNz+ikCJYdZV+mGtFWY4imOG+n30a9x01isr0p/oFeR5OVGpGHB 1m5WS0JpY4z5/IjRytt2YoTT3TbMBBK/KBKkKNpG0rpYwOtLFKbAlZPPcYZawNtRtBJ8 EZgBtR/ID4TpJn83+3U4hg5qic8fNflpQ+gfSDFfHF+luH9w6pyY2/YkE0v9U0oqX9R9 yEnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733344111; x=1733948911; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9cBEMnN1TXHS4bt02AxYmkT0i+FxThQSvcImr5g6Wp4=; b=VXKR/ZP8QZcakGQC2G1KikhpwIJWRMfCR72bh7XqrrHrLKPIHaiiiw1QF0b69CvjtI CR5FL1YE/Gp7pGuxNP6CuNE8VZdnz9OQ+fvbJC8sXcD9jkj1mI1q6xDjVS0LQjkd1t23 95WV99S7C3AwzfgLnCsIi7HiOyQtfHJ945Dp8lx7Y0ANvaOcyiIk/uhqeIe+fC/U7u5+ xchssfA75CaV1rTXripeTjkdPHJfdtdCTMRsVNBXK0WGkFQP1WxoyePbH3Eb2yJX0SKH QFYPEOz9z+9Bi4SWRXE0aMes1Gtbb53QeTN5v223s7mfL1wpCo8p9D6rHKrCYll2INHS hEig== X-Forwarded-Encrypted: i=1; AJvYcCX3sfFOAb7yFrpqqPm4bDQCVTGpxR8B6HUNG4nWadthdPh6KsxSS0d33/bflK7NRYfWMsrqR3D55Q==@nongnu.org X-Gm-Message-State: AOJu0YxIX+5VVURQDEOzYwWAYBCmVXrY9Co7MbmUVurEZMqMtOz7m0/Q 8EMabclzQCZSEtc0eM2O5h0beXZXkHmYOj3/QQgmiAucfac6OULHswAhPRat7QI= X-Gm-Gg: ASbGnctY94Z3hxs6lTAT+NZ4m62hNcQLrnJKGET6p6AQ+l2n6iLiGjwR9YQoLqsfnKa HKp6wF8uprJYeeQ2pa/OLZ+TGQY2tzIVVluU0hEDU9cZZvalTh9pm0hx7n4uJzGIhVf9bVfP+6x 9bF92W+3WoVhHipq2WHp8rUz2JPFigT6nOnRyN0+r8aduHU9XmOdLFFBDPy3j8TjQMbZawGZq9U 5mo8iJY5v7yeHaqttBzMq/6TsdvUuECmiiJ8xAMbWLjIB31zLDyF7NVzOhDEjelZR3sQERhnUHN do/n91J2f/xo5gWsHrf+3wl4 X-Google-Smtp-Source: AGHT+IHGWG2XfrE5hUpZ7ULVvlqpIFSiR/ooFWD28XqCbbY4PtNRrd8I3XJJTwLLCVn1frQOSzVPFA== X-Received: by 2002:a05:600c:511b:b0:433:c463:62d7 with SMTP id 5b1f17b1804b1-434d927b5bemr5211385e9.4.1733344111609; Wed, 04 Dec 2024 12:28:31 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d527252bsm36373915e9.2.2024.12.04.12.28.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:31 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 20/20] hw/core/cpu: Remove cpu_virtio_is_big_endian() Date: Wed, 4 Dec 2024 21:26:02 +0100 Message-ID: <20241204202602.58083-21-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org There are no more calls to cpu_virtio_is_big_endian(). Remove the method and the SysemuCPUOps::virtio_is_big_endian helpers altogether. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 9 --------- include/hw/core/sysemu-cpu-ops.h | 8 -------- hw/core/cpu-sysemu.c | 11 ----------- target/arm/cpu.c | 1 - target/ppc/cpu_init.c | 1 - 5 files changed, 30 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 5c75fe3a842..21b49800f52 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -752,15 +752,6 @@ hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); */ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs); -/** - * cpu_virtio_is_big_endian: - * @cpu: CPU - - * Returns %true if a CPU which supports runtime configurable endianness - * is currently big-endian. - */ -bool cpu_virtio_is_big_endian(CPUState *cpu); - #endif /* !CONFIG_USER_ONLY */ /** diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-ops.h index 24d003fe041..9806a2b7ecb 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -72,14 +72,6 @@ typedef struct SysemuCPUOps { */ int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, DumpState *s); - /** - * @virtio_is_big_endian: Callback to return %true if a CPU which supports - * runtime configurable endianness is currently big-endian. - * Non-configurable CPUs can use the default implementation of this method. - * This method should not be used by any callers other than the pre-1.0 - * virtio devices. - */ - bool (*virtio_is_big_endian)(CPUState *cpu); /** * @legacy_vmsd: Legacy state for migration. diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index 4b85face02b..458dde692ec 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" -#include "exec/tswap.h" #include "hw/core/sysemu-cpu-ops.h" bool cpu_paging_enabled(const CPUState *cpu) @@ -122,16 +121,6 @@ int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, return (*cc->sysemu_ops->write_elf64_note)(f, cpu, cpuid, opaque); } -bool cpu_virtio_is_big_endian(CPUState *cpu) -{ - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->sysemu_ops->virtio_is_big_endian) { - return cc->sysemu_ops->virtio_is_big_endian(cpu); - } - return qemu_binary_is_bigendian(); -} - GuestPanicInformation *cpu_get_crash_info(CPUState *cpu) { CPUClass *cc = CPU_GET_CLASS(cpu); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 3061b2ac18c..0df6408ee73 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2664,7 +2664,6 @@ static const struct SysemuCPUOps arm_sysemu_ops = { .asidx_from_attrs = arm_asidx_from_attrs, .write_elf32_note = arm_cpu_write_elf32_note, .write_elf64_note = arm_cpu_write_elf64_note, - .virtio_is_big_endian = arm_cpu_datapath_is_big_endian, .legacy_vmsd = &vmstate_arm_cpu, }; #endif diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 9650acb4850..be0eea2ff2e 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7407,7 +7407,6 @@ static const struct SysemuCPUOps ppc_sysemu_ops = { .get_phys_page_debug = ppc_cpu_get_phys_page_debug, .write_elf32_note = ppc32_cpu_write_elf32_note, .write_elf64_note = ppc64_cpu_write_elf64_note, - .virtio_is_big_endian = ppc_cpu_datapath_is_big_endian, .legacy_vmsd = &vmstate_ppc_cpu, }; #endif