From patchwork Wed Nov 20 15:35:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 2013591 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=AceMBFM5; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Xtlnv1s8xz1y0L for ; Thu, 21 Nov 2024 02:36:19 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 996B4892C6; Wed, 20 Nov 2024 16:36:11 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="AceMBFM5"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 41A9B89348; Wed, 20 Nov 2024 16:36:11 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-il1-x135.google.com (mail-il1-x135.google.com [IPv6:2607:f8b0:4864:20::135]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 476CA88FCE for ; Wed, 20 Nov 2024 16:36:07 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-il1-x135.google.com with SMTP id e9e14a558f8ab-3a789d422bcso2730705ab.1 for ; Wed, 20 Nov 2024 07:36:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1732116965; x=1732721765; darn=lists.denx.de; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Q21QPSPAOlBI/jIWnKcOfeM5dlHghv4XE1zIczlTwys=; b=AceMBFM5L5cJgS7KcAAtOPQ1xbspioMy9MoaNyOAZZ+Y43KW4lZrRfh1N5uWP/5XHV VOrNpx/ehLo4dfzX9KNo4WZ6EphEiNQm7sb553/M4zJsvdkomrooJDMStYc01TRQl2mk pc8HUmuCrbE0LwM6x1mfVzpp58nVAkxxiDArQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732116965; x=1732721765; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Q21QPSPAOlBI/jIWnKcOfeM5dlHghv4XE1zIczlTwys=; b=vT1kBfzsWCkl+ZE3lu12BhXEYmqAB9s4Qa+tbT+gIOoBVSDzAYSw7rvH8R6dW1LzhJ vsAJzQjt1J+80mSkm629wVzJ9GyPj/npaY10XPSmvxTexaV3cCkbiwvKVtPEDcgsawKg 3MLrJlFrLE2LhELNOqKwDZudlWcH2vjpXPPD9WMNsCKyRDyDSDg9NNes6iySMyDjkCcn D8KnD86J7nk6ffSW4eexipfrfwR0qRMQzt9TExEhjYkQ2/K+gT8EgV2/SUOyhIZMf6Ke d8hDGyTElsTfiLV5edtpAEl1lJ4q3dwDngdC51SmzKjycVmIGm8W7Fq0qZfYRcNLYWLZ PZGg== X-Gm-Message-State: AOJu0YzLzeLIZZRGOA8Sp4DPMuR8NS3MoTFTKra7YmRtrgX/BHD0X7PM D0JirtLrcNmWV4uflcGZPjDc3Z1QLB2O3ywciYlf+zMlEq8hxlW7AaQ1xOCZz2OrTE4fW7xinr8 = X-Google-Smtp-Source: AGHT+IHNxGU7NO+NDVAnza3VT+LI7DYUpS9VhOequPTOkcdP+TNRM+RBRDhaIu1Nj86omjC4zUQV+g== X-Received: by 2002:a05:6602:14c1:b0:83a:9488:154c with SMTP id ca18e2360f4ac-83eb5f99cf6mr438442839f.3.1732116964820; Wed, 20 Nov 2024 07:36:04 -0800 (PST) Received: from chromium.org (c-107-2-138-191.hsd1.co.comcast.net. [107.2.138.191]) by smtp.gmail.com with ESMTPSA id ca18e2360f4ac-83e6dffd678sm274395139f.23.2024.11.20.07.36.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Nov 2024 07:36:00 -0800 (PST) From: Simon Glass To: U-Boot Mailing List Cc: Simon Glass , Bin Meng , Caleb Connolly , Jiaxun Yang , Marek Vasut , Maximilian Brune , Moritz Fischer , Neil Armstrong , Peter Robinson , Rasmus Villemoes , Robert Marko , Tom Rini Subject: [PATCH v3 1/3] serial: Allow a serial port to be silent disabled Date: Wed, 20 Nov 2024 08:35:52 -0700 Message-Id: <20241120153554.860710-2-sjg@chromium.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241120153554.860710-1-sjg@chromium.org> References: <20241120153554.860710-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Provide a way to disable a serial port at runtime if it is known that it will not work. This is useful when booting from coreboot, if it does not provide info about the serial port in its sysinfo tables. U-Boot then hangs since if does not have the UART harware-address needed to write to the UART. The feature is optional, since it increases code-size slightly. Signed-off-by: Simon Glass --- (no changes since v1) drivers/serial/Kconfig | 9 +++++++++ drivers/serial/serial-uclass.c | 19 ++++++++++++++++++- include/serial.h | 25 +++++++++++++++++++++++++ 3 files changed, 52 insertions(+), 1 deletion(-) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 8b27ad9a77e..d6541b289a0 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -99,6 +99,15 @@ config VPL_SERIAL_PRESENT This option enables the full UART in TPL, so if is it disabled, the full UART driver will be omitted, thus saving space. +config SERIAL_CAN_DISABLE + bool "Serial ports can be silently disabled" + help + Enable this to allow serial ports to be disabled at runtime. This is + used when there is a UART driver available, but it cannot operate, + perhaps because it does not have the required hardware information. + An example is when coreboot boots into U-Boot but does not provide the + serial information in its sysinfo tables + config CONS_INDEX int "UART used for console" depends on SPECIFY_CONSOLE_INDEX diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index a08678dde4e..7f1914e21ed 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -242,11 +242,20 @@ static void _serial_flush(struct udevice *dev) ; } +bool serial_is_disabled_(struct udevice *dev) +{ + struct serial_dev_plat *uplat = dev_get_uclass_plat(dev); + + return uplat->disable; +} + static void _serial_putc(struct udevice *dev, char ch) { struct dm_serial_ops *ops = serial_get_ops(dev); int err; + if (serial_is_disabled(dev)) + return; if (ch == '\n') _serial_putc(dev, '\r'); @@ -262,6 +271,8 @@ static int __serial_puts(struct udevice *dev, const char *str, size_t len) { struct dm_serial_ops *ops = serial_get_ops(dev); + if (serial_is_disabled(dev)) + return 0; do { ssize_t written = ops->puts(dev, str, len); @@ -306,6 +317,8 @@ static int __serial_getc(struct udevice *dev) struct dm_serial_ops *ops = serial_get_ops(dev); int err; + if (serial_is_disabled(dev)) + return 0; do { err = ops->getc(dev); if (err == -EAGAIN) @@ -319,6 +332,9 @@ static int __serial_tstc(struct udevice *dev) { struct dm_serial_ops *ops = serial_get_ops(dev); + if (serial_is_disabled(dev)) + return 0; + if (ops->pending) return ops->pending(dev, true); @@ -568,7 +584,7 @@ static int serial_post_probe(struct udevice *dev) int ret; /* Set the baud rate */ - if (ops->setbrg) { + if (!serial_is_disabled(dev) && ops->setbrg) { ret = ops->setbrg(dev, gd->baudrate); if (ret) return ret; @@ -611,6 +627,7 @@ UCLASS_DRIVER(serial) = { .flags = DM_UC_FLAG_SEQ_ALIAS, .post_probe = serial_post_probe, .pre_remove = serial_pre_remove, + .per_device_plat_auto = sizeof(struct serial_dev_plat), .per_device_auto = sizeof(struct serial_dev_priv), }; #endif diff --git a/include/serial.h b/include/serial.h index e5f6d984d28..f62dc6e9ba4 100644 --- a/include/serial.h +++ b/include/serial.h @@ -287,6 +287,19 @@ struct dm_serial_ops { int (*getinfo)(struct udevice *dev, struct serial_device_info *info); }; +/** + * struct serial_dev_plat - plat data used by the uclass + * + * @disable: true to disable probing and using this device. This is used when + * there is a UART driver available, but it cannot operate, perhaps because it + * does not have the required hardware information. An example is when coreboot + * boots into U-Boot but does not provide the serial information in its sysinfo + * tables + */ +struct serial_dev_plat { + bool disable; +}; + /** * struct serial_dev_priv - information about a device used by the uclass * @@ -309,6 +322,18 @@ struct serial_dev_priv { /* Access the serial operations for a device */ #define serial_get_ops(dev) ((struct dm_serial_ops *)(dev)->driver->ops) +bool serial_is_disabled_(struct udevice *dev); + +/* Provide a way to silently disable the port */ +static inline bool serial_is_disabled(struct udevice *dev) +{ +#ifdef CONFIG_SERIAL_CAN_DISABLE + return serial_is_disabled_(dev); +#else + return false; +#endif +} + /** * serial_getconfig() - Get the uart configuration * (parity, 5/6/7/8 bits word length, stop bits) From patchwork Wed Nov 20 15:35:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 2013592 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=hzx5s8cX; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Xtlp32MqZz1y0L for ; Thu, 21 Nov 2024 02:36:27 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0829089346; Wed, 20 Nov 2024 16:36:14 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="hzx5s8cX"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 3BE34894F9; Wed, 20 Nov 2024 16:36:13 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 Received: from mail-il1-x136.google.com (mail-il1-x136.google.com [IPv6:2607:f8b0:4864:20::136]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B6CA389346 for ; Wed, 20 Nov 2024 16:36:10 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-il1-x136.google.com with SMTP id e9e14a558f8ab-3a761c7c4fbso15921645ab.3 for ; Wed, 20 Nov 2024 07:36:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1732116968; x=1732721768; darn=lists.denx.de; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H9uWqvN6tnFtBQKI1m6KGLcdSCXOfKBsqUFCwaj1bJE=; b=hzx5s8cXCMyAGsN0ToPIBrHvjtP/TAvnDYTMQgenuEqPbfiXX1web++dcIV2alGMDD +3ZtiZF3gmAjTwchBUybNxMTMlj15oAuLte7iFE43WNJHqQ8XkINMqdLeWIT/2bPMq0z V8a3Eepub2PAEVH23+dbgihvDCTA6mXYsnJUk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732116968; x=1732721768; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H9uWqvN6tnFtBQKI1m6KGLcdSCXOfKBsqUFCwaj1bJE=; b=lezk1PnvnstFVfjYzJzpsZxFO/TKtiAxi08fqraaNO1XUUDed7Wsq954zD+sWEWu0Y GYdjGUHdwCBZbHeeJ1uMaPwaOD0pMCZJvZJNO9DLB23iuJo2zVBELkQb/2jGEGhQlCau yQzTc+C8ILj8IV7H/VtuBBbC5T8YYxHqLnmtU/l0zAHr3l5W7GghDYnDpms6QZSfV0x0 hA7BJD+9JLROFxp08AOXnNftDiMDLSYaKGUWxSYLN37yxLQ5UGkyoXx1JPaW7nSFEGMa tOQ+eh1UUsxptdN9ZDZT/WBuj9050hSKd6MWCZu/SYpeXZIqy2bKDLqhTDOsvP3x0J87 VJ/w== X-Gm-Message-State: AOJu0YxqFu/fll4faeZftDGKrqKd3VjCCsvfWsnNqV91EHh90QpoCV5Q bmplzOhoAv53Yv+y45WQ/SZv98LCNw5LJAmhepuPoweK3yQlfNLCUmtiUnamlycGMsOScaL1kkw = X-Google-Smtp-Source: AGHT+IEziQ/75vY5Z4Nhqg635AdRyXwRvpV5xvh2iwRSy1UdxIDQG843gsFhfPjVxTLEP8gw3PS4fw== X-Received: by 2002:a05:6602:2cc4:b0:83a:d3cc:779a with SMTP id ca18e2360f4ac-83eb60506e6mr378684939f.11.1732116968682; Wed, 20 Nov 2024 07:36:08 -0800 (PST) Received: from chromium.org (c-107-2-138-191.hsd1.co.comcast.net. [107.2.138.191]) by smtp.gmail.com with ESMTPSA id ca18e2360f4ac-83e6dffd678sm274395139f.23.2024.11.20.07.36.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Nov 2024 07:36:05 -0800 (PST) From: Simon Glass To: U-Boot Mailing List Cc: Simon Glass , Bin Meng , Jonas Karlman , Quentin Schulz , Rasmus Villemoes , Stefan Roese , Tom Rini Subject: [PATCH v3 2/3] serial: ns16550: Avoid probing hardware when disabled Date: Wed, 20 Nov 2024 08:35:53 -0700 Message-Id: <20241120153554.860710-3-sjg@chromium.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241120153554.860710-1-sjg@chromium.org> References: <20241120153554.860710-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean When a serial port is marked as disabled, don't try to probe it, since it won't work and will probably hang. Signed-off-by: Simon Glass --- (no changes since v1) drivers/serial/ns16550.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 3f6860f3916..6576be4b58e 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -533,7 +533,8 @@ int ns16550_serial_probe(struct udevice *dev) reset_deassert_bulk(&reset_bulk); com_port->plat = dev_get_plat(dev); - ns16550_init(com_port, -1); + if (!serial_is_disabled(dev)) + ns16550_init(com_port, -1); return 0; } From patchwork Wed Nov 20 15:35:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 2013593 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=efr7ToSH; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XtlpD4qKmz1y0L for ; Thu, 21 Nov 2024 02:36:36 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6266588DA3; Wed, 20 Nov 2024 16:36:18 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="efr7ToSH"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 523D688C0F; Wed, 20 Nov 2024 16:36:17 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd2d.google.com (mail-io1-xd2d.google.com [IPv6:2607:f8b0:4864:20::d2d]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0F5A788FAA for ; Wed, 20 Nov 2024 16:36:15 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd2d.google.com with SMTP id ca18e2360f4ac-83b2a41b81cso157534439f.0 for ; Wed, 20 Nov 2024 07:36:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1732116971; x=1732721771; darn=lists.denx.de; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AohfFloXytCd3x6NZ07u4rFeOO50YPYPqcLjz5+SScQ=; b=efr7ToSHeVPzubINAWm0a9QVna+iFXqqd+iSMXd4ePW1D2mcJVCqCoxScVAVMr4pBY j+lAeaJbqgyxmx2vnsfaEjS2xx5eHlHcPYVYDTd812rtzWCQTy3c+I709uEMqT2fvcOu 8LnryZ1ovalhu4yqTnvUhlfEHVIs+QlIiX1lE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732116971; x=1732721771; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AohfFloXytCd3x6NZ07u4rFeOO50YPYPqcLjz5+SScQ=; b=Lth93nR9CZ3b5WFnUMaBHRAloxirkg14sFLnALbM8RvEZIl4XXIZH49E5MEq/R0teS HT5bAMbUcUId8MTrR2icupC9E9Cv1lyPdSyqKZeRBcAVuRPhp4JU601ck2n4+k2g8ny+ KtI+XPdK57RVyqz8NHVrf/RkDHyUZSgydhwDpoYdb2K9Uw7OhE0nA/iZoNZGTvwrw9+l f3WJ14Inoqo9XSlCTsRiFR0bXFhSgoj3yeMi74LC5ZPQT2LZ4A2eawkQpE9ICGoMA4qE adJ7yIssexcmWoAsJeT9M388Cjb5u9wz20ZGQUB1VbDuP9RHUOuBJZ96F/Iy2l1BL2O0 qaUQ== X-Gm-Message-State: AOJu0Yw5DcFzjYGJV2M8Gu0V8s1Z+dbUeKXt3E2T/Ub3qeVttBk+M7/6 QW24qxEeJ56ixEXafm35g9cZZvwvJw++EosrjRKyxcnAn9zHZkwFMunMuLxd2HQHnO0iSAQc4ao = X-Google-Smtp-Source: AGHT+IH95/1qOOc9Ia/2cEI0vqa7bl7SqPVLefnl/Ip99E+CgxiQ/cQpnb6lnowm4uaZZigL5Va7dQ== X-Received: by 2002:a05:6602:1486:b0:83e:6232:11a with SMTP id ca18e2360f4ac-83eb5fce440mr426156639f.7.1732116971375; Wed, 20 Nov 2024 07:36:11 -0800 (PST) Received: from chromium.org (c-107-2-138-191.hsd1.co.comcast.net. [107.2.138.191]) by smtp.gmail.com with ESMTPSA id ca18e2360f4ac-83e6dffd678sm274395139f.23.2024.11.20.07.36.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Nov 2024 07:36:09 -0800 (PST) From: Simon Glass To: U-Boot Mailing List Cc: Simon Glass , Bin Meng , Peter Robinson , Tom Rini Subject: [PATCH v3 3/3] x86: coreboot: Make use of disabled console Date: Wed, 20 Nov 2024 08:35:54 -0700 Message-Id: <20241120153554.860710-4-sjg@chromium.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241120153554.860710-1-sjg@chromium.org> References: <20241120153554.860710-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean U-Boot normally requires a UART. When booting from coreboot it is sometimes just not available, e.g. when no sysinfo or DBG2 information is provided. In this case we need to continue running, since the display can be used. Use the 'disable' flag for this case. This allows U-Boot to start up and operation from the display, instead of hanging on start-up. Signed-off-by: Simon Glass --- Changes in v3: - Put the feature behind a Kconfig - Move the feature to the serial uclass, so any serial driver can use it Changes in v2: - Drop RFC tag since there were no comments arch/x86/cpu/coreboot/Kconfig | 1 + drivers/serial/serial_coreboot.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig index 085302c0482..d850be9dc73 100644 --- a/arch/x86/cpu/coreboot/Kconfig +++ b/arch/x86/cpu/coreboot/Kconfig @@ -29,5 +29,6 @@ config SYS_COREBOOT select BINMAN if X86_64 select SYSINFO imply SYSINFO_EXTRA + select SERIAL_CAN_DISABLE endif diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_coreboot.c index b1f69f6998c..a53c37a8756 100644 --- a/drivers/serial/serial_coreboot.c +++ b/drivers/serial/serial_coreboot.c @@ -95,6 +95,7 @@ static int read_dbg2(struct ns16550_plat *plat) static int coreboot_of_to_plat(struct udevice *dev) { + struct serial_dev_plat *uplat = dev_get_uclass_plat(dev); struct ns16550_plat *plat = dev_get_plat(dev); struct cb_serial *cb_info = lib_sysinfo.serial; int ret = -ENOENT; @@ -119,6 +120,7 @@ static int coreboot_of_to_plat(struct udevice *dev) * there is no UART, which may panic. So stay silent and * pray that the video console will work. */ + uplat->disable = true; log_debug("Cannot detect UART\n"); }