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Tue, 01 Oct 2024 23:25:03 -0700 (PDT) Received: from fomalhaut.localnet ([2a01:e0a:8d5:d990:e654:e8ff:fe8f:2ce6]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42f79db387asm9286365e9.10.2024.10.01.23.25.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 23:25:02 -0700 (PDT) From: Eric Botcazou X-Google-Original-From: Eric Botcazou To: gcc-patches@gcc.gnu.org Subject: [PATCH] Aarch64: Define WIDEST_HARDWARE_FP_SIZE Date: Wed, 02 Oct 2024 08:22:48 +0200 Message-ID: <2149741.9o76ZdvQCi@fomalhaut> MIME-Version: 1.0 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Hi, the macro is documented like this in the internal manual: -- Macro: WIDEST_HARDWARE_FP_SIZE A C expression for the size in bits of the widest floating-point format supported by the hardware. If you define this macro, you must specify a value less than or equal to mode precision of the mode used for C type 'long double' (from hook 'targetm.c.mode_for_floating_type' with argument 'TI_LONG_DOUBLE_TYPE'). If you do not define this macro, mode precision of the mode used for C type 'long double' is the default. AArch64 uses 128-bit TFmode for long double but, as far as I know, no FPU implemented in hardware supports it. WIDEST_HARDWARE_FP_SIZE is taken into account in exactly two places: - in libgcc for the implementation of float[uns]ti{sd}f, - in the Ada front-end to cap the size clauses of floating-point types. The effect of the change on the first place can be seen by running nm on libgcc/_floatdisf.o (which implements floattisf for Aarch64), from: U __addtf3 U __floatditf 0000000000000000 T __floattisf U __floatunditf U __multf3 U __trunctfsf2 to just 0000000000000000 T __floattisf The effect of the change on the second place can be seen on the attached Ada testcase, which fails without it and passes with it. Bootstrapped/regtested on Aarch64/Linux, OK for the mainline? 2024-10-01 Eric Botcazou * config/aarch64/aarch64.h (WIDEST_HARDWARE_FP_SIZE): Define to 64. 2024-10-01 Eric Botcazou * gnat.dg/specs/size_clause6.ads: New test. diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index ec8fde783b3..acc26aed808 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -96,6 +96,8 @@ #define LONG_LONG_TYPE_SIZE 64 +#define WIDEST_HARDWARE_FP_SIZE 64 + /* This value is the amount of bytes a caller is allowed to drop the stack before probing has to be done for stack clash protection. */ #define STACK_CLASH_CALLER_GUARD 1024