From patchwork Sun Sep 15 15:25:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985886 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=Od/Z0ivf; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bkp32Bsz1y1C for ; Mon, 16 Sep 2024 01:28:02 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr8i-0005WT-Qy; Sun, 15 Sep 2024 11:26:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr8g-0005Og-Qe for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:14 -0400 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr8d-00089r-VL for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:13 -0400 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-2068acc8a4fso21996805ad.1 for ; Sun, 15 Sep 2024 08:26:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726413970; x=1727018770; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WFvdTr8ItVOjTzK94rYNt0BNQVSxcF+DNvHDFPsSwO0=; b=Od/Z0ivfHhJsiiURFVeF9KfFe5AjPJIEyPNml5ZW9+MZ0rFP3j4GAnpDtfPMZF8tdB Qe3F/DeKus1k1UkRz+TAKrtoXFvQmngkekp3Fff+rvBWxB5j8gGIgF8i1DS4Nz8QidbC RXKCKbGC1wQ4EWSQTgfhAIfP8lQ/a9whdcAidnQHeu6JUpdNNCM77VIlXi+YcCeZn0zg WRxCDmveakc5fdMlw5ZHIf/iPv8dcTCXZL1OzoLlSnAsYJrkqA8sSgTjnOGZu2+zDg+M 3apLzMSXKAIZ9hRSBGgMqHVFM0IXspFCK3JCg2t5XBcZnhnjvd8+XiMOKasrR2Buyq68 MoDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726413970; x=1727018770; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WFvdTr8ItVOjTzK94rYNt0BNQVSxcF+DNvHDFPsSwO0=; b=wooyu5aSjmtk3ZQm4qbVcYO2Ig3edll0+aCYXK53+hMiIhbolmcucrFFAdbRSkI2K8 pIKKJBniJdZhs/zKjIFJ9OV5J96PicZjsbM+EVVcH4T/+tPqa0d3LMIcU/zqtN9uFON9 0bcWxKLUWfxrv5py+8y5o25ZVHj9U0qt7m42P9BXSOU4+Y10RCo57g49JiXo7NY+sjoU EAgj0sN7vO+jqjMABZu9eiaweU4oYoJA4cz6rwa6Jf95h3hEgdg1xEAzRh5fl6VZZF59 P0dkfJd7QbI3cQWJGS8s0oS/3xAGBqnxkUhEDhfZJTcfjocTWBoV4sPlzN7BubH7JWPN 4s5Q== X-Gm-Message-State: AOJu0Yw19y6aYYB71LYIKOWqHk0qLnzvTxc2YFAqhNjjZPkrSidH/B9Q RzD20+p4a5um7QzXr5alYna39pM7qE1X75b44NL6xhPdGqnD8dTbTOPHOw== X-Google-Smtp-Source: AGHT+IEsaIeS3tMoyDuPZurlIfEMT6TeUCDffowmWzoTAmEJZE05FmkL33WaMdGc1OW7jv6ESk5H2A== X-Received: by 2002:a17:902:d2ca:b0:202:2f0:3bb2 with SMTP id d9443c01a7336-20782c201e0mr89645235ad.60.1726413969687; Sun, 15 Sep 2024 08:26:09 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:09 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Jessica Clarke , Richard Henderson Subject: [PATCH v6 01/17] bsd-user: Implement RISC-V CPU initialization and main loop Date: Mon, 16 Sep 2024 01:25:38 +1000 Message-Id: <20240915152554.8394-2-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x629.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Added the initial implementation for RISC-V CPU initialization and main loop. This includes setting up the general-purpose registers and program counter based on the provided target architecture definitions. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Jessica Clarke Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_cpu.h | 39 ++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 bsd-user/riscv/target_arch_cpu.h diff --git a/bsd-user/riscv/target_arch_cpu.h b/bsd-user/riscv/target_arch_cpu.h new file mode 100644 index 0000000000..e17c910ae9 --- /dev/null +++ b/bsd-user/riscv/target_arch_cpu.h @@ -0,0 +1,39 @@ +/* + * RISC-V CPU init and loop + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_CPU_H +#define TARGET_ARCH_CPU_H + +#include "target_arch.h" + +#define TARGET_DEFAULT_CPU_MODEL "max" + +static inline void target_cpu_init(CPURISCVState *env, + struct target_pt_regs *regs) +{ + int i; + + for (i = 1; i < 32; i++) { + env->gpr[i] = regs->regs[i]; + } + + env->pc = regs->sepc; +} + +#endif /* TARGET_ARCH_CPU_H */ From patchwork Sun Sep 15 15:25:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985884 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=fKkOlI1b; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bkg3cLfz1y1C for ; Mon, 16 Sep 2024 01:27:55 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr8l-0005gd-JL; Sun, 15 Sep 2024 11:26:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr8i-0005Wl-QB for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:16 -0400 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr8h-0008AB-8I for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:16 -0400 Received: by mail-pl1-x636.google.com with SMTP id d9443c01a7336-20696938f86so29635155ad.3 for ; Sun, 15 Sep 2024 08:26:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726413973; x=1727018773; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qoqI+GcSD10KH5RTtszxpTTAXwPzAPqtWGKQJfPieeI=; b=fKkOlI1bmWl3WS0NjnQrM0LV1dFB6hirV+CJVGHoUKJdGIeUQpfP/5qA5GzeEHkQo7 IMwGUkZ68PFgW8tBsXsi76gtgsggFfgRbvfEpAw4ctgyGxwu9Z/0JDq6xOQ63lJMwOjF SGC5xFmTZUAPhN35+2MuIkI632KL0F5P2pKnUsYBo6FIEpd2da8PTSfbO8U8sMMuh++e fDErpUL991k9+sa3LwaoMo306mHfnimcKEhFEm1tj1esdF+Rgey4VTu5UqbplcBb8nbX lYhEA73Kv8DVkSmtMiJTL/zWIrXtppp/a09cgaMv92sDXUHjxZ7CwbYbvZ0kJWLmU8MK sdOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726413973; x=1727018773; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qoqI+GcSD10KH5RTtszxpTTAXwPzAPqtWGKQJfPieeI=; b=neJot/w2ESjkhaBCdRksi2bkVFFk89tYPkxuYI5G8sFZrTX9BODAeXVsj2jCwYNwGl RI///xcj+ePb1SVOftWsftb3Z6a7kMgf6kTYVjX+j0kQ579jO4bFbTYk+H1suGJWBjik aYGggY+Rsu2LtMkFKm2ysPqimwAXak3hPjtFHEDhL2sNoFaAUup1Ct9gTAP8iT/YoqkM /RhL8XGnhpCUpW2F/1nw2/gaF+FJCmNFEOfBMYCkVbSxnrvJlWA6OZrtmV7G9aUqRjRe Hb4r1h4dd1dStSKioN0L6QnJ1YTxNYjAPcf1ORbE8qzZYR/RGNKuFL3XN1jOKiRxaPEz kAIg== X-Gm-Message-State: AOJu0YxhUbfv/A62tBaxV/yXAWDl/UjMagwFNQmgvipVNK0SULU+gDDO P7oPoByaGC45m/2OBoiOzyf/CnJwElEwaeQE2iK50UASdF/vVt+d5Fe+OqUS X-Google-Smtp-Source: AGHT+IHO9pFIXm7amjysosxqUs6kD+WxMWaHhMRQmGJ4+VNXyJ01PHzUC3tTNSnzShnv8MCzboszQQ== X-Received: by 2002:a17:903:2306:b0:206:c75a:29d4 with SMTP id d9443c01a7336-2076e43eee4mr204994325ad.50.1726413973305; Sun, 15 Sep 2024 08:26:13 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:12 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Jessica Clarke , Kyle Evans , Richard Henderson Subject: [PATCH v6 02/17] bsd-user: Add RISC-V CPU execution loop and syscall handling Date: Mon, 16 Sep 2024 01:25:39 +1000 Message-Id: <20240915152554.8394-3-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x636.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Implemented the RISC-V CPU execution loop, including handling various exceptions and system calls. The loop continuously executes CPU instructions,processes exceptions, and handles system calls by invoking FreeBSD syscall handlers. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Jessica Clarke Co-authored-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_cpu.h | 94 ++++++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/bsd-user/riscv/target_arch_cpu.h b/bsd-user/riscv/target_arch_cpu.h index e17c910ae9..ea2a8d1ace 100644 --- a/bsd-user/riscv/target_arch_cpu.h +++ b/bsd-user/riscv/target_arch_cpu.h @@ -36,4 +36,98 @@ static inline void target_cpu_init(CPURISCVState *env, env->pc = regs->sepc; } +static inline void target_cpu_loop(CPURISCVState *env) +{ + CPUState *cs = env_cpu(env); + int trapnr; + abi_long ret; + unsigned int syscall_num; + int32_t signo, code; + + for (;;) { + cpu_exec_start(cs); + trapnr = cpu_exec(cs); + cpu_exec_end(cs); + process_queued_cpu_work(cs); + + signo = 0; + + switch (trapnr) { + case EXCP_INTERRUPT: + /* just indicate that signals should be handled asap */ + break; + case EXCP_ATOMIC: + cpu_exec_step_atomic(cs); + break; + case RISCV_EXCP_U_ECALL: + syscall_num = env->gpr[xT0]; + env->pc += TARGET_INSN_SIZE; + /* Compare to cpu_fetch_syscall_args() in riscv/riscv/trap.c */ + if (TARGET_FREEBSD_NR___syscall == syscall_num || + TARGET_FREEBSD_NR_syscall == syscall_num) { + ret = do_freebsd_syscall(env, + env->gpr[xA0], + env->gpr[xA1], + env->gpr[xA2], + env->gpr[xA3], + env->gpr[xA4], + env->gpr[xA5], + env->gpr[xA6], + env->gpr[xA7], + 0); + } else { + ret = do_freebsd_syscall(env, + syscall_num, + env->gpr[xA0], + env->gpr[xA1], + env->gpr[xA2], + env->gpr[xA3], + env->gpr[xA4], + env->gpr[xA5], + env->gpr[xA6], + env->gpr[xA7] + ); + } + + /* + * Compare to cpu_set_syscall_retval() in + * riscv/riscv/vm_machdep.c + */ + if (ret >= 0) { + env->gpr[xA0] = ret; + env->gpr[xT0] = 0; + } else if (ret == -TARGET_ERESTART) { + env->pc -= TARGET_INSN_SIZE; + } else if (ret != -TARGET_EJUSTRETURN) { + env->gpr[xA0] = -ret; + env->gpr[xT0] = 1; + } + break; + case RISCV_EXCP_ILLEGAL_INST: + signo = TARGET_SIGILL; + code = TARGET_ILL_ILLOPC; + break; + case RISCV_EXCP_BREAKPOINT: + signo = TARGET_SIGTRAP; + code = TARGET_TRAP_BRKPT; + break; + case EXCP_DEBUG: + signo = TARGET_SIGTRAP; + code = TARGET_TRAP_BRKPT; + break; + default: + fprintf(stderr, "qemu: unhandled CPU exception " + "0x%x - aborting\n", trapnr); + cpu_dump_state(cs, stderr, 0); + abort(); + } + + if (signo) { + force_sig_fault(signo, code, env->pc); + } + + process_pending_signals(env); + } +} + #endif /* TARGET_ARCH_CPU_H */ From patchwork Sun Sep 15 15:25:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985885 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=hIBDRPPn; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; 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[14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:15 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 03/17] bsd-user: Implement RISC-V CPU register cloning and reset functions Date: Mon, 16 Sep 2024 01:25:40 +1000 Message-Id: <20240915152554.8394-4-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x633.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Added functions for cloning CPU registers and resetting the CPU state for RISC-V architecture. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_cpu.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/bsd-user/riscv/target_arch_cpu.h b/bsd-user/riscv/target_arch_cpu.h index ea2a8d1ace..57abfbd556 100644 --- a/bsd-user/riscv/target_arch_cpu.h +++ b/bsd-user/riscv/target_arch_cpu.h @@ -130,4 +130,18 @@ static inline void target_cpu_loop(CPURISCVState *env) } } +static inline void target_cpu_clone_regs(CPURISCVState *env, target_ulong newsp) +{ + if (newsp) { + env->gpr[xSP] = newsp; + } + + env->gpr[xA0] = 0; + env->gpr[xT0] = 0; +} + +static inline void target_cpu_reset(CPUArchState *env) +{ +} + #endif /* TARGET_ARCH_CPU_H */ From patchwork Sun Sep 15 15:25:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985891 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=b7kro0Sw; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bls1yYpz1y1C for ; Mon, 16 Sep 2024 01:28:57 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr8s-00062P-9X; Sun, 15 Sep 2024 11:26:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr8p-0005uB-20 for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:23 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr8n-0008B5-Ag for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:22 -0400 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-1fc47abc040so29081435ad.0 for ; Sun, 15 Sep 2024 08:26:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726413979; x=1727018779; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Q8SeRNxqA0kdGYXuMPPKRU3j4MVX/4+712bEYl1oABA=; b=b7kro0SwtvzSHhx1VjW8lzQiCzokVmSuZbrD6cC2MYIL1mWHAN/uv7GGXyLMJZqmgu BhEbQd8bLExWV6WNUYeEMNw+ZbJEN//P0Kcjm7YgLHDBMvFtwW41xNLPSvq11p10mKdI 91PMLiwI15Os8Jh0Mhv0gWw0WLiiAay6092Ap0zqgW+oxWSHHTz6ne2XMmCwmt/BtmH6 WM2kw1qbIAMoAUUfZ9vb6BVjCm2gS3bCs/3a/UhK8RYPhbPIxBvUlDgHs+ussJaHK9Rh /JTpu3HdiueQGWceYYFa5oQgy95sfa9YqdxYTM5fx+pgVjikpCima/s7yuFTc6gaRqoX 9N8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726413979; x=1727018779; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Q8SeRNxqA0kdGYXuMPPKRU3j4MVX/4+712bEYl1oABA=; b=ZnSIiRiL4oEPemEdZ4gI5/T4OkBXbayPhp4xqEZceuU/QazboGfrPrdYcGcsbFA3jd pIaz9N3rvSE9wWf+T2+2n4GB+ApQ6APM1NtDCRzxR7TowV7QT/SsZo/bLEeL8Ni08Opo Yd6YirmvyP5WzxFdOJZ3+76sNP8w8ODaZZ2yND0+0B0Rw2gt5NrLkpuFfnFzfBDLfRt5 +YT2ZFjhirYZ9ZAvkRpX8hxIUbAZSLAZQX1cYZcSYQZv85nskNGrg9WIU5K75MhbzWFw 0W1P4CqJLBoXdxMFqg6MsJ1n0JBnlXzJaIP4ISBLrcNevjiFyiDuxD9pwRds4nQVh9nv fBoA== X-Gm-Message-State: AOJu0YxRuZiM42JEp88uqVl9i796O+fa4BJbtLrohOK3rm+LeTk2KIRZ d1MO6VFSkFUkQi5WI+JzhRUlKSYt7NjS4KwRc5lXMwEdzZz3/U5uAS8s5g== X-Google-Smtp-Source: AGHT+IG+SJayp5vvw8r0hNuNa0zYUhFl/u6tNx7qdc3X9J7iC2MA1s5s/Q52R2AHTjYPTo57qz/gpg== X-Received: by 2002:a17:903:32cb:b0:205:83a3:b08 with SMTP id d9443c01a7336-2076e39c84bmr193069565ad.32.1726413979161; Sun, 15 Sep 2024 08:26:19 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:18 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 04/17] bsd-user: Implement RISC-V TLS register setup Date: Mon, 16 Sep 2024 01:25:41 +1000 Message-Id: <20240915152554.8394-5-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Included the prototype for the 'target_cpu_set_tls' function in the 'target_arch.h' header file. This function is responsible for setting the Thread Local Storage (TLS) register for RISC-V architecture. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch.h | 27 +++++++++++++++++++++++++++ bsd-user/riscv/target_arch_cpu.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+) create mode 100644 bsd-user/riscv/target_arch.h create mode 100644 bsd-user/riscv/target_arch_cpu.c diff --git a/bsd-user/riscv/target_arch.h b/bsd-user/riscv/target_arch.h new file mode 100644 index 0000000000..26ce07f343 --- /dev/null +++ b/bsd-user/riscv/target_arch.h @@ -0,0 +1,27 @@ +/* + * RISC-V specific prototypes + * + * Copyright (c) 2019 Mark Corbin + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef TARGET_ARCH_H +#define TARGET_ARCH_H + +#include "qemu.h" + +void target_cpu_set_tls(CPURISCVState *env, target_ulong newtls); + +#endif /* TARGET_ARCH_H */ diff --git a/bsd-user/riscv/target_arch_cpu.c b/bsd-user/riscv/target_arch_cpu.c new file mode 100644 index 0000000000..44e25d2ddf --- /dev/null +++ b/bsd-user/riscv/target_arch_cpu.c @@ -0,0 +1,29 @@ +/* + * RISC-V CPU related code + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ +#include "qemu/osdep.h" + +#include "target_arch.h" + +#define TP_OFFSET 16 + +/* Compare with cpu_set_user_tls() in riscv/riscv/vm_machdep.c */ +void target_cpu_set_tls(CPURISCVState *env, target_ulong newtls) +{ + env->gpr[xTP] = newtls + TP_OFFSET; +} From patchwork Sun Sep 15 15:25:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985888 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=FxA82bdT; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bkx5wMhz1y1C for ; Mon, 16 Sep 2024 01:28:09 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr8t-00067e-JP; Sun, 15 Sep 2024 11:26:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr8s-00061z-3o for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:26 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr8q-0008BP-Id for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:25 -0400 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-1fee6435a34so31555085ad.0 for ; Sun, 15 Sep 2024 08:26:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726413983; x=1727018783; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g4MfaAoEg0D4PG1s02DK0HI+nWn0NbjMokYUO+miRKs=; b=FxA82bdT6Q/sMEsJHwkXGEJq4pKbcx8i7bjbBH9Dcmn5aYqlwQH9G1RAfrEra73OhT SctJMfzMvZJUsq7EmesDKDz1tojF2rJRGNm+f4IccZSxApJkbNVVec2YkGCK75jCA+HM WrUnD3vjOqPkgTgllvy3klT/ZM3WYG0ENb6+YgHGSFenAOETHHvt3H9xsBH9ODDUHRn4 4wh50Uikty7aKbxQit+oHyCy0YDbyNknNSnhy+jHzduCUy6pyWpHjl60BwoReazQtC4j fIKFRDAFbwSeNAm7tjd5xO+iSGfjvaTPg0O/BgEm3wSW8ovfKfIRkBulEAWASh+MoizV HMxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726413983; x=1727018783; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g4MfaAoEg0D4PG1s02DK0HI+nWn0NbjMokYUO+miRKs=; b=QXLHyM2XnF2IkhhnExu/SEnez5cLqTAIwWiYFmEMj+Bq7XgmydrP9+JR77OsEQTn9V Tl1fhpYwMKpzSYms3n1m18tW+2Ce/fGmWNWyBJ/sxxPRC2z6e7n4pLIGm5kIxKSs+59I xT6lxq9HepESK3DntCkGziF3eovJixNuieDgOFZicWuQxgGZPWMCResIiR6XzLtesW6y n/XKqWUO94LbrRquO+foayDKAUWdO2YBII2VC26KmlhUGZJRDLnFPDX8Xswed36YNERM letjuoH+tl56AgOBRJY6xDAHu0WWHPdPmXk68zG8PR4j/xm9KvfJQOo6Kqttlz5moevE Tv/A== X-Gm-Message-State: AOJu0YxoZrygRl0FXvu+7Nqa3uu+iBq+3r75uWmZMgUyUCnLIb2v3cXk XXMHLOigxfQxt0F3LU8gL32Spl/+8/BLMjIi+3USYe/wLyM6N1a0/61WrA== X-Google-Smtp-Source: AGHT+IH7jFDHCHIfeMzEvq0EA5rk8OZia+XmpGutGTb2dCKjvDGp+YO0XrdipjtvcxJeLOqoxZToDw== X-Received: by 2002:a17:902:e5c5:b0:1fc:6cf5:df4b with SMTP id d9443c01a7336-2076e428114mr224121225ad.49.1726413982474; Sun, 15 Sep 2024 08:26:22 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:21 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Kyle Evans , Richard Henderson Subject: [PATCH v6 05/17] bsd-user: Add RISC-V ELF definitions and hardware capability detection Date: Mon, 16 Sep 2024 01:25:42 +1000 Message-Id: <20240915152554.8394-6-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Introduced RISC-V specific ELF definitions and hardware capability detection. Additionally, a function to retrieve hardware capabilities ('get_elf_hwcap') is implemented, which returns the common bits set in each CPU's ISA strings. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_elf.h | 42 ++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 bsd-user/riscv/target_arch_elf.h diff --git a/bsd-user/riscv/target_arch_elf.h b/bsd-user/riscv/target_arch_elf.h new file mode 100644 index 0000000000..4eb915e61e --- /dev/null +++ b/bsd-user/riscv/target_arch_elf.h @@ -0,0 +1,42 @@ +/* + * RISC-V ELF definitions + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_ELF_H +#define TARGET_ARCH_ELF_H + +#define elf_check_arch(x) ((x) == EM_RISCV) +#define ELF_START_MMAP 0x80000000 +#define ELF_ET_DYN_LOAD_ADDR 0x100000 +#define ELF_CLASS ELFCLASS64 + +#define ELF_DATA ELFDATA2LSB +#define ELF_ARCH EM_RISCV + +#define ELF_HWCAP get_elf_hwcap() +static uint32_t get_elf_hwcap(void) +{ + RISCVCPU *cpu = RISCV_CPU(thread_cpu); + + return cpu->env.misa_ext_mask; +} + +#define USE_ELF_CORE_DUMP +#define ELF_EXEC_PAGESIZE 4096 + +#endif /* TARGET_ARCH_ELF_H */ From patchwork Sun Sep 15 15:25:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985882 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=eckBJHnE; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bkf32vmz1y2T for ; Mon, 16 Sep 2024 01:27:52 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr8w-0006Ho-4R; Sun, 15 Sep 2024 11:26:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr8u-0006DI-Um for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:28 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr8t-0008Bp-7v for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:28 -0400 Received: by mail-pl1-x62a.google.com with SMTP id d9443c01a7336-20696938f86so29635765ad.3 for ; Sun, 15 Sep 2024 08:26:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726413985; x=1727018785; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=a+NCEiOZJzboz9w1INUibK6hoUbq+IVFPstbDaWXows=; b=eckBJHnENnAQL+09p8sMwC8kYiTYfT68bbs9rc90Hso56cBpGWMyJCY51tFWrwXrj/ lax8ehndNJjb9HO75gEK+yz9cSusv26LoMjNB3dbEv0r0OxOhG2YStomxwX6XTOivJGb OmDGFKznAFJVyp1gTmdbkXKzf1UNb7f1G1j5K49ld5K5htMKKMvu74W5Waacj2s0Abiy ZnEn/Uk2C4RAOp6ftZUgLgVNYVgdybTMeO9mauLpX7dQyiucNGgmXUEtciZkMfZ+ng1f DrYjq9H9u3+W3J0HFDONlAJZuYgULcRu6D4sV15CLecxweYZKZ56Tq/OPQnaXGwD1Orl DgPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726413985; x=1727018785; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a+NCEiOZJzboz9w1INUibK6hoUbq+IVFPstbDaWXows=; b=skIsN2eEk77FGA1DchqgNqItlsaG0TMbI4fGL6Dza+3GcwMbKlo76c9s+Hb8cnmadh Aesm/4X8SW4JJVpDy1pIP120JqaW2Y2eXwfw6MTxpJfnOFcwfPUpgfoSZfrSvivnRgNe WpoyVEn12j0p7p4Umw0ZbYHhnHuVP14ifhvhjylq0YE9H0MxscUM/moOKGP8GEQXCj1T bND6XpWcwJuCGrtgYGzEf2ZVUL/LZUN7FDGES/XTHUtiWJSDfvaLkHOXXVaKnsgvAb02 Rn3OPxLEV6UDzp2OCFf8KQBdXx4yBQRqbQBJ8YLGa/mEZmM0RUYH+llD3t0+h7D6h41e 2nYQ== X-Gm-Message-State: AOJu0YyWMaKhhF7pNgGNj5GFmNTjGKtZ3JPthaovxBi8PgjZUI0ua1pP YP/a8p8isgqyv4cvYYRcJbrtNgCoU5IBHh85/ZVTmwsleGZ+1c8rs/fWpQ== X-Google-Smtp-Source: AGHT+IHIoNVjCg6MaDgMriS/fKvzsEEoRHnJ6ZEyOr/fbXPLcc/7w5rlzZMrltQL64QbxM7WC24y9g== X-Received: by 2002:a17:902:d492:b0:205:5dfe:7be with SMTP id d9443c01a7336-2076e372ecbmr181408985ad.26.1726413985424; Sun, 15 Sep 2024 08:26:25 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:24 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 06/17] bsd-user: Define RISC-V register structures and register copying Date: Mon, 16 Sep 2024 01:25:43 +1000 Message-Id: <20240915152554.8394-7-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x62a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Added definitions for RISC-V register structures, including general-purpose registers and floating-point registers, in 'target_arch_reg.h'. Implemented the 'target_copy_regs' function to copy register values from the CPU state to the target register structure, ensuring proper endianness handling using 'tswapreg'. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_reg.h | 88 ++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 bsd-user/riscv/target_arch_reg.h diff --git a/bsd-user/riscv/target_arch_reg.h b/bsd-user/riscv/target_arch_reg.h new file mode 100644 index 0000000000..12b1c96b61 --- /dev/null +++ b/bsd-user/riscv/target_arch_reg.h @@ -0,0 +1,88 @@ +/* + * RISC-V register structures + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_REG_H +#define TARGET_ARCH_REG_H + +/* Compare with riscv/include/reg.h */ +typedef struct target_reg { + uint64_t ra; /* return address */ + uint64_t sp; /* stack pointer */ + uint64_t gp; /* global pointer */ + uint64_t tp; /* thread pointer */ + uint64_t t[7]; /* temporaries */ + uint64_t s[12]; /* saved registers */ + uint64_t a[8]; /* function arguments */ + uint64_t sepc; /* exception program counter */ + uint64_t sstatus; /* status register */ +} target_reg_t; + +typedef struct target_fpreg { + uint64_t fp_x[32][2]; /* Floating point registers */ + uint64_t fp_fcsr; /* Floating point control reg */ +} target_fpreg_t; + +#define tswapreg(ptr) tswapal(ptr) + +/* Compare with struct trapframe in riscv/include/frame.h */ +static inline void target_copy_regs(target_reg_t *regs, + const CPURISCVState *env) +{ + + regs->ra = tswapreg(env->gpr[1]); + regs->sp = tswapreg(env->gpr[2]); + regs->gp = tswapreg(env->gpr[3]); + regs->tp = tswapreg(env->gpr[4]); + + regs->t[0] = tswapreg(env->gpr[5]); + regs->t[1] = tswapreg(env->gpr[6]); + regs->t[2] = tswapreg(env->gpr[7]); + regs->t[3] = tswapreg(env->gpr[28]); + regs->t[4] = tswapreg(env->gpr[29]); + regs->t[5] = tswapreg(env->gpr[30]); + regs->t[6] = tswapreg(env->gpr[31]); + + regs->s[0] = tswapreg(env->gpr[8]); + regs->s[1] = tswapreg(env->gpr[9]); + regs->s[2] = tswapreg(env->gpr[18]); + regs->s[3] = tswapreg(env->gpr[19]); + regs->s[4] = tswapreg(env->gpr[20]); + regs->s[5] = tswapreg(env->gpr[21]); + regs->s[6] = tswapreg(env->gpr[22]); + regs->s[7] = tswapreg(env->gpr[23]); + regs->s[8] = tswapreg(env->gpr[24]); + regs->s[9] = tswapreg(env->gpr[25]); + regs->s[10] = tswapreg(env->gpr[26]); + regs->s[11] = tswapreg(env->gpr[27]); + + regs->a[0] = tswapreg(env->gpr[10]); + regs->a[1] = tswapreg(env->gpr[11]); + regs->a[2] = tswapreg(env->gpr[12]); + regs->a[3] = tswapreg(env->gpr[13]); + regs->a[4] = tswapreg(env->gpr[14]); + regs->a[5] = tswapreg(env->gpr[15]); + regs->a[6] = tswapreg(env->gpr[16]); + regs->a[7] = tswapreg(env->gpr[17]); + + regs->sepc = tswapreg(env->pc); +} + +#undef tswapreg + +#endif /* TARGET_ARCH_REG_H */ From patchwork Sun Sep 15 15:25:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985897 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=dqpDFI6+; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bn84vJQz1y1C for ; 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[14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:27 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 07/17] bsd-user: Add RISC-V signal trampoline setup function Date: Mon, 16 Sep 2024 01:25:44 +1000 Message-Id: <20240915152554.8394-8-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Implemented the 'setup_sigtramp' function for setting up the signal trampoline code in the RISC-V architecture. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_sigtramp.h | 41 +++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 bsd-user/riscv/target_arch_sigtramp.h diff --git a/bsd-user/riscv/target_arch_sigtramp.h b/bsd-user/riscv/target_arch_sigtramp.h new file mode 100644 index 0000000000..dfe5076739 --- /dev/null +++ b/bsd-user/riscv/target_arch_sigtramp.h @@ -0,0 +1,41 @@ +/* + * RISC-V sigcode + * + * Copyright (c) 2019 Mark Corbin + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef TARGET_ARCH_SIGTRAMP_H +#define TARGET_ARCH_SIGTRAMP_H + +/* Compare with sigcode() in riscv/riscv/locore.S */ +static inline abi_long setup_sigtramp(abi_ulong offset, unsigned sigf_uc, + unsigned sys_sigreturn) +{ + uint32_t sys_exit = TARGET_FREEBSD_NR_exit; + + uint32_t sigtramp_code[] = { + /*1*/ const_le32(0x00010513), /*mv a0, sp*/ + /*2*/ const_le32(0x00050513 + (sigf_uc << 20)), /*addi a0,a0,sigf_uc*/ + /*3*/ const_le32(0x00000293 + (sys_sigreturn << 20)),/*li t0,sys_sigreturn*/ + /*4*/ const_le32(0x00000073), /*ecall*/ + /*5*/ const_le32(0x00000293 + (sys_exit << 20)), /*li t0,sys_exit*/ + /*6*/ const_le32(0x00000073), /*ecall*/ + /*7*/ const_le32(0xFF1FF06F) /*b -16*/ + }; + + return memcpy_to_target(offset, sigtramp_code, TARGET_SZSIGCODE); +} +#endif /* TARGET_ARCH_SIGTRAMP_H */ From patchwork Sun Sep 15 15:25:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985887 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=mYiUGENV; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bkp3Ydmz1y1y for ; Mon, 16 Sep 2024 01:28:02 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr93-0006gV-SM; Sun, 15 Sep 2024 11:26:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr91-0006XT-Gk for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:35 -0400 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr8z-0008CR-Qb for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:35 -0400 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-201d5af11a4so41090375ad.3 for ; Sun, 15 Sep 2024 08:26:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726413992; x=1727018792; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lfzjBG7+9yzLMDJFHDoCCaXekwfn4Gr8dayPzH/NfvM=; b=mYiUGENVX9N3JOJzhMEftM/MFL6GnNYVbOiCL9Cgv2arSsXndJYZh2XTzaQT/ol+v9 vhnMb8mvh5DzIJvy5+3TD4pB4zN+h6pYCCbznwD1kLpEcKbj+a59qKvdPRRYSDsCmfd1 4VZYG07AI3SJ+vBXV5qnW6EtDvB8WH4rxSicVMx8d14lCQwQc+AoQPCFoWn2SduLuvGc z8kaJH4zPuwEcC86WtgGeubV97lAzYhbbWJsHNMCVovq4cHei0kBsCtXlN124Of17ZyL qgFdXalD4kecXY5edfdWGymAEqbDTnMznDXAbgKccB5m6pJZ6EdfmA9bzv6elZt+Uckc zsfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726413992; x=1727018792; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lfzjBG7+9yzLMDJFHDoCCaXekwfn4Gr8dayPzH/NfvM=; b=O62Q+TIuUimN+93JXg/QZwhQiU1HgRiloliRlUHu0dYUkIxSaFtU0mwH4bwbRMfCAQ cf1E810wJmvyETm2yNiBRNMVhgGH9L4eVxjO+JQGIjUZh43NH5KQ5YhTocxVwEQeo/DN /OJ9ScgXA7q3pTA3Yif44+mep/61M4En061JKSjZqGmuPib3KK/ElQXLZIk8sOzqGM27 uULmtN3t7jV3iKya1k78ybHmOD/gTdcp5fcIL9J+4f1+kOuhuu/NXFwsy99R6oSnFZt4 kkWKZ16i0XybeQYHs6BzC2aoySlIvVZ5l38ENZYrZKXCdvZiexGP77Ihx/ABQrJE3rbd zEOw== X-Gm-Message-State: AOJu0YycfhpCuVgBq+vJaWlhp7i9wsDHIiRviZhhbQPBDY9WvMD/zuMM +iG92KaxQgxlELeO1MUT0T0xYoVZik32JBYzTjdmyC3zvHeT6Sj2x1MN1g== X-Google-Smtp-Source: AGHT+IHaB4mud7yoqdw4or23bS3jHCICb7+UxubYnzi7cZZCtZSD8IMDC1lbbCqFppOGr0apuSCrkQ== X-Received: by 2002:a17:902:d502:b0:207:7eaa:d6bb with SMTP id d9443c01a7336-2077eaad810mr129842065ad.29.1726413991963; Sun, 15 Sep 2024 08:26:31 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:31 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 08/17] bsd-user: Implement RISC-V sysarch system call emulation Date: Mon, 16 Sep 2024 01:25:45 +1000 Message-Id: <20240915152554.8394-9-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Added the 'do_freebsd_arch_sysarch' function to emulate the 'sysarch' system call for the RISC-V architecture. Currently, this function returns '-TARGET_EOPNOTSUPP' to indicate that the operation is not supported. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_sysarch.h | 41 ++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 bsd-user/riscv/target_arch_sysarch.h diff --git a/bsd-user/riscv/target_arch_sysarch.h b/bsd-user/riscv/target_arch_sysarch.h new file mode 100644 index 0000000000..9af42331b4 --- /dev/null +++ b/bsd-user/riscv/target_arch_sysarch.h @@ -0,0 +1,41 @@ +/* + * RISC-V sysarch() system call emulation + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_SYSARCH_H +#define TARGET_ARCH_SYSARCH_H + +#include "target_syscall.h" +#include "target_arch.h" + +static inline abi_long do_freebsd_arch_sysarch(CPURISCVState *env, int op, + abi_ulong parms) +{ + + return -TARGET_EOPNOTSUPP; +} + +static inline void do_freebsd_arch_print_sysarch( + const struct syscallname *name, abi_long arg1, abi_long arg2, + abi_long arg3, abi_long arg4, abi_long arg5, abi_long arg6) +{ + + gemu_log("UNKNOWN OP: %d, " TARGET_ABI_FMT_lx ")", (int)arg1, arg2); +} + +#endif /* TARGET_ARCH_SYSARCH_H */ From patchwork Sun Sep 15 15:25:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985894 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=AMSToZ9U; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bm32JSTz1y1y for ; Mon, 16 Sep 2024 01:29:07 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr96-0006ow-2T; Sun, 15 Sep 2024 11:26:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr94-0006ks-Ve for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:38 -0400 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr93-0008D5-8i for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:38 -0400 Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-2054feabfc3so29904915ad.1 for ; Sun, 15 Sep 2024 08:26:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726413995; x=1727018795; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UhgZSr77cs856626csVUMKafDNElH2DCETLtbp74JlY=; b=AMSToZ9UjwoC8D9IKxAxOoZdt5ydqY7khAOpGuuPXK6AhqgIpAb6O5ACn9FVX9ySu+ yuHcDUr5wdefDOtJe/+r58cndH+GkOlmg3UineeQ1DMIU7QCT/zVddB1B2whuyvKYOW1 YqJ52j/kKh2lGPnB/vCmSvVbEmzC4J5zqzHIZh8J/gk8ENQtS9WEDIvsAM71FYvPBkQL OWz0MSFQ8O8q3dGkKA5xH/lOomakEWbdvEkAHgygr6ud9Pv3nZ7kI9nikPQ/CBCY/3Oo U0mLsDNa7XjlSvcCAZqDC5hhDvWo0JX0CIci3TgGCdv8T1xzCd/L1dneMODgrQoAEM5q XleQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726413995; x=1727018795; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UhgZSr77cs856626csVUMKafDNElH2DCETLtbp74JlY=; b=asaM0InVYWohiMkNUj/XAXoySZwGcYc+To8AOov9u/gtdKjcisc4b/H3PuJIOdEDqR PonckuHPK23UFNsLgPYlrfFdcNja5Qjxf37bDk7FplkN9+KLXJGkNm90zId6uDok/Vb3 B5qq45DWzWXxDlII+hLyaf1f1GFPYrwP73APaGs5SPWpjIYWlbVxFSQJmGdLkF5N2doC D7FwzOTKORWQ9+d/6iwXjqvpAj1iYmRA9pAtqhcmpIwRU4FcblkXLeJxGLmbMJmxiIMB +/VNPc1poxZmvxddon41KcBi0NB8EA806ENs0n0nRBzMOePdStHb4yA/PIlZF6wFCS0P 7m4A== X-Gm-Message-State: AOJu0YwQJXqG7FurafqBHd96vSUzU0/gPzYStB8lKwNcUO7OovIe5aau ii/BXbaKoGAzcL+cXAPlVKs5bpyzTLg28k0o54czqbqEE2t272vjmzTf4w== X-Google-Smtp-Source: AGHT+IEJbXRt0/kGfVjZKKqguJX2pseBesfsDqFkqeoIcWDjoDoezZ2ZQWD8IRJ1/xK0JYe7pcZHRg== X-Received: by 2002:a17:902:e2c2:b0:205:7574:3b87 with SMTP id d9443c01a7336-2076e347efdmr140700875ad.15.1726413995352; Sun, 15 Sep 2024 08:26:35 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:34 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Jessica Clarke , Kyle Evans , Richard Henderson Subject: [PATCH v6 09/17] bsd-user: Add RISC-V thread setup and initialization support Date: Mon, 16 Sep 2024 01:25:46 +1000 Message-Id: <20240915152554.8394-10-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x62e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Implemented functions for setting up and initializing threads in the RISC-V architecture. The 'target_thread_set_upcall' function sets up the stack pointer, program counter, and function argument for new threads. The 'target_thread_init' function initializes thread registers based on the provided image information. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Jessica Clarke Co-authored-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_thread.h | 47 +++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 bsd-user/riscv/target_arch_thread.h diff --git a/bsd-user/riscv/target_arch_thread.h b/bsd-user/riscv/target_arch_thread.h new file mode 100644 index 0000000000..95cd0b6ad7 --- /dev/null +++ b/bsd-user/riscv/target_arch_thread.h @@ -0,0 +1,47 @@ +/* + * RISC-V thread support + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_THREAD_H +#define TARGET_ARCH_THREAD_H + +/* Compare with cpu_set_upcall() in riscv/riscv/vm_machdep.c */ +static inline void target_thread_set_upcall(CPURISCVState *regs, + abi_ulong entry, abi_ulong arg, abi_ulong stack_base, + abi_ulong stack_size) +{ + abi_ulong sp; + + sp = ROUND_DOWN(stack_base + stack_size, 16); + + regs->gpr[xSP] = sp; + regs->pc = entry; + regs->gpr[xA0] = arg; +} + +/* Compare with exec_setregs() in riscv/riscv/machdep.c */ +static inline void target_thread_init(struct target_pt_regs *regs, + struct image_info *infop) +{ + regs->sepc = infop->entry; + regs->regs[xRA] = infop->entry; + regs->regs[xA0] = infop->start_stack; + regs->regs[xSP] = ROUND_DOWN(infop->start_stack, 16); +} + +#endif /* TARGET_ARCH_THREAD_H */ From patchwork Sun Sep 15 15:25:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985890 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=QzvOlAz6; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bld65zwz1y1C for ; Mon, 16 Sep 2024 01:28:45 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr9B-00071b-1o; Sun, 15 Sep 2024 11:26:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr99-00070H-1h for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:43 -0400 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr97-0008Dp-4W for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:42 -0400 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-20536dcc6e9so17594765ad.2 for ; Sun, 15 Sep 2024 08:26:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726413999; x=1727018799; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BISuETtEj/uI6CddQsRG+h5xaQo8IxKpbRWv0bTNq7U=; b=QzvOlAz6nxcUE/S32bIzaAJH24aUgCnQ5lso9vmYWZt/8+EXdzZFvsOG62QkkWuhSt AGnwHtuXgo1LuI9Cv8ebc7Ro6NHJlKXQ1AO0bO7oG0RrF+Bz0u3W08ExsrMxAss3EtJ3 f9cR5MTg7u0EVW8bGnlVgJo8PNc0mdXgAAgBtW8BIGL/oJfLhyHgpr0wOlX7RBjszdGX tRCSO1TkU5OAwDnTBdExOkjye3O375fYVpgHplXRNntSEzgmmUuB91UaqUk0JQTYqtXt 9bl2dWZDFi0029RPP2H+J6O3Ung0s1J+m+S46Bov2GrV1Z7WzstG3pnG7Y8NQGXCzD4h KdHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726413999; x=1727018799; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BISuETtEj/uI6CddQsRG+h5xaQo8IxKpbRWv0bTNq7U=; b=u0e3mn/LVVJfP3mxhvEuw8z7GrJYERao6k/1YwkCSQx4cGocMiaYM9hUUMrXdhmdyh ++Fbx1Ch4ZRcDS2735A5lZhA2NBnpf1bWuybHk/ohnO+gt9gcG+/na60Klvqd4ozN2YW H6McUpwqjIGo18MmGCdklqnv7cnoZtbiJeY2hSK3tQfXDyMYcC4qiEBPfQEwYFnVHknc T+mEvn5RdoOJU98lHRDpdQRGv9A/Q3bvhUh+BQMl0vf4hvBuxFBUPaKm7hMhUzer+Wh8 eK2r+HeW7fZ7Hf9zmqyiZynCMLU0H5dAFR/MgsiHV47coWO6WNyvqF7rjRf9K1nL9WPp egbA== X-Gm-Message-State: AOJu0Yx7AW1wctlJAtDzzl91uJRfd8qrmhX4eAY/waX7tuvWFcJ7McY/ nfd5IrfFzfZKDR5/zNI5u5NamRHE57FoXlilBwXyohz/M16UsANejrP0Og== X-Google-Smtp-Source: AGHT+IFR82IUU2zfi3g1Tl/RsKGQG9U75SCHRfcpF53yvPAVLV9ZxkXxsJVT4ajUrPQeUaVOS8QMLA== X-Received: by 2002:a17:903:22c4:b0:205:73d9:9ce9 with SMTP id d9443c01a7336-2078193f82emr133660525ad.0.1726413999221; Sun, 15 Sep 2024 08:26:39 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:37 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 10/17] bsd-user: Define RISC-V VM parameters and helper functions Date: Mon, 16 Sep 2024 01:25:47 +1000 Message-Id: <20240915152554.8394-11-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x629.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Added definitions for RISC-V VM parameters, including maximum and default sizes for text, data, and stack, as well as address space limits. Implemented helper functions for retrieving and setting specific values in the CPU state, such as stack pointer and return values. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_vmparam.h | 53 ++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 bsd-user/riscv/target_arch_vmparam.h diff --git a/bsd-user/riscv/target_arch_vmparam.h b/bsd-user/riscv/target_arch_vmparam.h new file mode 100644 index 0000000000..0f2486def1 --- /dev/null +++ b/bsd-user/riscv/target_arch_vmparam.h @@ -0,0 +1,53 @@ +/* + * RISC-V VM parameters definitions + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_VMPARAM_H +#define TARGET_ARCH_VMPARAM_H + +#include "cpu.h" + +/* Compare with riscv/include/vmparam.h */ +#define TARGET_MAXTSIZ (1 * GiB) /* max text size */ +#define TARGET_DFLDSIZ (128 * MiB) /* initial data size limit */ +#define TARGET_MAXDSIZ (1 * GiB) /* max data size */ +#define TARGET_DFLSSIZ (128 * MiB) /* initial stack size limit */ +#define TARGET_MAXSSIZ (1 * GiB) /* max stack size */ +#define TARGET_SGROWSIZ (128 * KiB) /* amount to grow stack */ + +#define TARGET_VM_MINUSER_ADDRESS (0x0000000000000000UL) +#define TARGET_VM_MAXUSER_ADDRESS (0x0000004000000000UL) + +#define TARGET_USRSTACK (TARGET_VM_MAXUSER_ADDRESS - TARGET_PAGE_SIZE) + +static inline abi_ulong get_sp_from_cpustate(CPURISCVState *state) +{ + return state->gpr[xSP]; +} + +static inline void set_second_rval(CPURISCVState *state, abi_ulong retval2) +{ + state->gpr[xA1] = retval2; +} + +static inline abi_ulong get_second_rval(CPURISCVState *state) +{ + return state->gpr[xA1]; +} + +#endif /* TARGET_ARCH_VMPARAM_H */ From patchwork Sun Sep 15 15:25:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985881 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=Ul+JuZGa; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bkd4qr0z1y1C for ; Mon, 16 Sep 2024 01:27:52 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr9D-0007As-S0; Sun, 15 Sep 2024 11:26:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr9C-00077E-JZ for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:46 -0400 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr9B-0008EG-1D for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:46 -0400 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-2053a0bd0a6so36503845ad.3 for ; Sun, 15 Sep 2024 08:26:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726414003; x=1727018803; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/upld7cTqaC/atkB+nu7yGsbOxCVGK3zsoQHBJP0niw=; b=Ul+JuZGaF+8MDRLQVI44yM3vKIHMyXMhdOm/tnz06HlRyl4IB+O9PqnUkWXvw0kD+r RzqlCRJcF/AbwOPVQU8jn9rAbnjlcQ6KA3Xt+qj11MkHZhNKPhpC7JIChi5M/cSK1Gxr O3L13WMkzKgysGhGVqum7oHEQ29Mowd3Aapxq1p0LxjtNrcS7py37xIbGV19tEE18vfv KCcGHxxrZ6/KtL5epxsKtjMyFB/n3KjCxw/7Joo48UL+K87uuMLj1OwZD322PCBkSE9k A/4hxFVDf9ryskMAF3pgGs6jlV4HbfUO9Ds2bO/nRAIIfrV7WAYIg2SFtn5yhncSwY8O 4/nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726414003; x=1727018803; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/upld7cTqaC/atkB+nu7yGsbOxCVGK3zsoQHBJP0niw=; b=h/muUx1uEYh+jrEVPKabyY8X8N3EGvBtkR4LFXpHdh7GFRUVco09GVKtr2u+Om8RzM Jr7zkw+nA6oqIeJTADbcUcR/IJt/frwtLxQe8nOsDcoKAPZmDub4FB5fTqfieAmyuCpl I8HvwwFIVkE7UMwDjXJfcQFi55I+odFrOjBHn2OpSlF49Zlz3u/dK0N7A1Sgm4peccT0 Hvsbx5kDaWJ83BgnvxwkIK+tBIyTPqJLewSl4rvoNup993oEGCqCy7CClhD/s+5b5/AG oMgzRz91V/ARXDs5ZsIxHW5lqxsBnXK6dN4O+zUjE9oGWABWYsmVfgdySngg0GzJgJbV oQHA== X-Gm-Message-State: AOJu0YwU+E4WLU3CL72/9KIQG2xhhA6bxIwx3oatnUn1MSowH3byPZ4C sOGhWgZHpOvmVhBjweqp6o2MtUYK9yzr9uiqkqDvxFoGHuOR+nJHA/vw0A== X-Google-Smtp-Source: AGHT+IEQZJ+leut+oi7X1I2C9eEhvP2omnO/jT4qqiVwZ1GNm3hRCT8RaZEe+kYaTxPMYcnwd9iwBA== X-Received: by 2002:a17:903:11ce:b0:205:5dad:a89 with SMTP id d9443c01a7336-2076e363a7bmr202607775ad.24.1726414002428; Sun, 15 Sep 2024 08:26:42 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:41 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Jessica Clarke , Richard Henderson Subject: [PATCH v6 11/17] bsd-user: Define RISC-V system call structures and constants Date: Mon, 16 Sep 2024 01:25:48 +1000 Message-Id: <20240915152554.8394-12-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Introduced definitions for the RISC-V system call interface, including the 'target_pt_regs' structure that outlines the register storage layout during a system call. Added constants for hardware machine identifiers. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Jessica Clarke Reviewed-by: Richard Henderson --- bsd-user/riscv/target_syscall.h | 38 +++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 bsd-user/riscv/target_syscall.h diff --git a/bsd-user/riscv/target_syscall.h b/bsd-user/riscv/target_syscall.h new file mode 100644 index 0000000000..e7e5231309 --- /dev/null +++ b/bsd-user/riscv/target_syscall.h @@ -0,0 +1,38 @@ +/* + * RISC-V system call definitions + * + * Copyright (c) Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef BSD_USER_RISCV_TARGET_SYSCALL_H +#define BSD_USER_RISCV_TARGET_SYSCALL_H + +/* + * struct target_pt_regs defines the way the registers are stored on the stack + * during a system call. + */ + +struct target_pt_regs { + abi_ulong regs[32]; + abi_ulong sepc; +}; + +#define UNAME_MACHINE "riscv64" + +#define TARGET_HW_MACHINE "riscv" +#define TARGET_HW_MACHINE_ARCH UNAME_MACHINE + +#endif /* BSD_USER_RISCV_TARGET_SYSCALL_H */ From patchwork Sun Sep 15 15:25:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985883 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=Up/sHYXX; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bkf4qSGz1y2X for ; Mon, 16 Sep 2024 01:27:51 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr9G-0007KZ-Ri; Sun, 15 Sep 2024 11:26:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr9F-0007GM-4x for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:49 -0400 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr9D-0008En-Mt for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:48 -0400 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-205659dc63aso35935205ad.1 for ; Sun, 15 Sep 2024 08:26:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726414005; x=1727018805; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cjm2NL6Wgqty15f3ap7G8BavBfHkA8e5dbFy1QdhwG4=; b=Up/sHYXXN51jrnzAA2oGbk/2udMxWp/qAVuwrpFmQuKZ2PaA2aePpbAaxUS2qH8Wyh ZxH3P6Gyw/WBjZ7mrmcH3qnmNLB5As2CxAqLHOAwoc4GaAAzpyMz9r/cDrqLx3L1hvZg H+z78mpsThYZUtApiHSimz+4+FWAXzpJxe3niCJk92ryHs3xf4Rx+jHIcO3rLlMx9y73 X50ufafE0LPHyksxIqbQEWAorRQ8/AiQC3pmA/rwGtM8q475XOlN5oG2pOeoQSBHNwWY xZlZ8Qi3U1IUwbtv5Ea0JTWjtmbeYAsoypDSa8eCT3hm57YrsC1prwCyQjYcD9KaRZjU NlOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726414005; x=1727018805; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cjm2NL6Wgqty15f3ap7G8BavBfHkA8e5dbFy1QdhwG4=; b=p7TBjg9OIhTyxPfk31WZo3whLBGJV25sp1ASnzulwqZGOzEDwlOpqBB2AjgS4yzZyW 67p1PGmeOE1Xei79sDm3ZeP0/NAaoSi8npqUl0i1czHCKVxYa7w4hZZ0wndje/DDjUUm fkGrmCVp7hYNbMcblkSQreXNpWtfylay3FKzxn3Y21Hri48xk/UCqcIuQV9arCkvgC0c gQc+K7zCPIwweoGQfcH3A967aRmewOHOb5m+rHhgeM1ewHrpMbJWSjpBo6kP7FoE3aii Lkvuf52oNU/6bucB+yHRQGCqJTAg85/1bgA/9kRzehpVfMG9lKCZ1mVyEw5g2AJwEj4G 77KQ== X-Gm-Message-State: AOJu0YxseKb6SHMb0bLVMQd3J6ZCBXuwNqqQqf5uYlgE5DbnzgXZNK8t jI/v7zxH+WHhG65x4kWBf6GUihxgpIx0iiSOe4e1Dox1bSg03Vrg7OL5Ww== X-Google-Smtp-Source: AGHT+IFfA4Aqhhu6ndVCU6n2DhhlEt1AmjZTB0uure7sKUPWYv3PrjXSsKbounroFMwm+RND4uWBpA== X-Received: by 2002:a17:902:f683:b0:207:816:6b7c with SMTP id d9443c01a7336-2076e399437mr193556575ad.13.1726414005385; Sun, 15 Sep 2024 08:26:45 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:44 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 12/17] bsd-user: Add generic RISC-V64 target definitions Date: Mon, 16 Sep 2024 01:25:49 +1000 Message-Id: <20240915152554.8394-13-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Warner Losh Added a generic definition for RISC-V64 target-specific details. Implemented the 'regpairs_aligned' function,which returns 'false' to indicate that register pairs are not aligned in the RISC-V64 ABI. Signed-off-by: Warner Losh Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- bsd-user/riscv/target.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 bsd-user/riscv/target.h diff --git a/bsd-user/riscv/target.h b/bsd-user/riscv/target.h new file mode 100644 index 0000000000..036ddd185e --- /dev/null +++ b/bsd-user/riscv/target.h @@ -0,0 +1,20 @@ +/* + * Riscv64 general target stuff that's common to all aarch details + * + * Copyright (c) 2022 M. Warner Losh + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef TARGET_H +#define TARGET_H + +/* + * riscv64 ABI does not 'lump' the registers for 64-bit args. + */ +static inline bool regpairs_aligned(void *cpu_env) +{ + return false; +} + +#endif /* TARGET_H */ From patchwork Sun Sep 15 15:25:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985889 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=jTFdh+28; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X6Bl72khFz1y1C for ; Mon, 16 Sep 2024 01:28:19 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1spr9J-0007UG-Kc; Sun, 15 Sep 2024 11:26:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1spr9I-0007PF-0Y for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:52 -0400 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1spr9G-0008FI-BX for qemu-devel@nongnu.org; Sun, 15 Sep 2024 11:26:51 -0400 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-2068a7c9286so25487695ad.1 for ; Sun, 15 Sep 2024 08:26:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726414008; x=1727018808; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=voYN43OZ7lwbwneNl7z2eHNOhROV9NjNWmAvKPq1wXw=; b=jTFdh+28AmurOPfON21EfbGSYdxGnhC5Tnu7uRgSLQt5X2eDuAxmi3bqgp0l5sES3A B14M2XM4w86yr9zBeUdZT7y+xLVvQVULGGoEFCA8XS7jdv8HHQHC/7RCrda6oGTkknJQ FiZAkECEWSKlZtglNIYqYyXty6l0X0rHXezTJ+cleYIv0nZ+o4wEcd71pW2fwV2A4opb b/1bMF4E/0I+Xaaid7YPZ5fg98RZjuTmYfVG8xY3bdJjMii8Nl0sdWSWaIm8tt1Xrp1r 9XBrEdtdY2aW9A5/yYDHxqQdJ7qGEH/sA0734bvUsdDY5lLBlk27PfPrSgxKF6E07S3C ZA2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726414008; x=1727018808; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=voYN43OZ7lwbwneNl7z2eHNOhROV9NjNWmAvKPq1wXw=; b=SGZtleDhDixCXCUmDgYoiKhdIdpRcrUBsILCHi/Dgl7maDNtG1uwPhGrYKWOscMRu9 sxZxEJucCKaH0B9VLMEqS4iWSnCsE6j8MJl2qTKRm+ez9mMTCNdqSo15s2I9/VrV/wdO F4RkD0H3To5Ekev64AQnFgqP36Owu3/Fc+Gc66rJYvOkwAuD4+41RR8bvq2J0J6BliIO 9e9hSK3529gNsp1HKo8VZ5WvoPgpc5XEf/TLQHfoi46LH9j0jbTjUiWRSR2ZmaQftiqw 0+If8kTfisQHAmCoV3f5iemL2DJurruUuEEaozGAcf3b9GLPzuAYJk58zVc8ofTyrfAM zO8w== X-Gm-Message-State: AOJu0YzXFO+mOOrZzKTwLNLiR2b4FRW7FXoVM35xeEXPvdgktK4gtlPu Q8W2hnAOP+CB9d5ZX0FWse6jzVIIJxuEY2zykvPnOC25jbuZD2uw7dMjhA== X-Google-Smtp-Source: AGHT+IHaES2ToxkVZTIDmhPlQ0znSXocgXKqcXTt8hKIawIEAcyMNUVJBZxdQJolf5IaLNQjtcTlyQ== X-Received: by 2002:a17:903:2452:b0:205:5dfe:7d9 with SMTP id d9443c01a7336-20781d62a07mr125593715ad.19.1726414008315; Sun, 15 Sep 2024 08:26:48 -0700 (PDT) Received: from localhost.localdomain (14-200-149-22.tpgi.com.au. [14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:47 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 13/17] bsd-user: Define RISC-V signal handling structures and constants Date: Mon, 16 Sep 2024 01:25:50 +1000 Message-Id: <20240915152554.8394-14-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x634.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Added definitions for RISC-V signal handling, including structures and constants for managing signal frames and context Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Co-authored-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/riscv/target_arch_signal.h | 75 +++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 bsd-user/riscv/target_arch_signal.h diff --git a/bsd-user/riscv/target_arch_signal.h b/bsd-user/riscv/target_arch_signal.h new file mode 100644 index 0000000000..1a634b865b --- /dev/null +++ b/bsd-user/riscv/target_arch_signal.h @@ -0,0 +1,75 @@ +/* + * RISC-V signal definitions + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef TARGET_ARCH_SIGNAL_H +#define TARGET_ARCH_SIGNAL_H + +#include "cpu.h" + + +#define TARGET_INSN_SIZE 4 /* riscv instruction size */ + +/* Size of the signal trampoline code placed on the stack. */ +#define TARGET_SZSIGCODE ((abi_ulong)(7 * TARGET_INSN_SIZE)) + +/* Compare with riscv/include/_limits.h */ +#define TARGET_MINSIGSTKSZ (1024 * 4) +#define TARGET_SIGSTKSZ (TARGET_MINSIGSTKSZ + 32768) + +struct target_gpregs { + uint64_t gp_ra; + uint64_t gp_sp; + uint64_t gp_gp; + uint64_t gp_tp; + uint64_t gp_t[7]; + uint64_t gp_s[12]; + uint64_t gp_a[8]; + uint64_t gp_sepc; + uint64_t gp_sstatus; +}; + +struct target_fpregs { + uint64_t fp_x[32][2]; + uint64_t fp_fcsr; + uint32_t fp_flags; + uint32_t pad; +}; + +typedef struct target_mcontext { + struct target_gpregs mc_gpregs; + struct target_fpregs mc_fpregs; + uint32_t mc_flags; +#define TARGET_MC_FP_VALID 0x01 + uint32_t mc_pad; + uint64_t mc_spare[8]; +} target_mcontext_t; + +#define TARGET_MCONTEXT_SIZE 864 +#define TARGET_UCONTEXT_SIZE 936 + +#include "target_os_ucontext.h" + +struct target_sigframe { + target_ucontext_t sf_uc; /* = *sf_uncontext */ + target_siginfo_t sf_si; /* = *sf_siginfo (SA_SIGINFO case)*/ +}; + +#define TARGET_SIGSTACK_ALIGN 16 + +#endif /* TARGET_ARCH_SIGNAL_H */ From patchwork Sun Sep 15 15:25:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985892 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=K0byiNSS; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; 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[14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:50 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 14/17] bsd-user: Implement RISC-V signal trampoline setup functions Date: Mon, 16 Sep 2024 01:25:51 +1000 Message-Id: <20240915152554.8394-15-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Added functions for setting up the RISC-V signal trampoline and signal frame: 'set_sigtramp_args()': Configures the RISC-V CPU state with arguments for the signal handler. It sets up the registers with the signal number,pointers to the signal info and user context, the signal handler address, and the signal frame pointer. 'setup_sigframe_arch()': Initializes the signal frame with the current machine context.This function copies the context from the CPU state to the signal frame, preparing it for the signal handler. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Signed-off-by: Warner Losh Co-authored-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/riscv/signal.c | 63 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 bsd-user/riscv/signal.c diff --git a/bsd-user/riscv/signal.c b/bsd-user/riscv/signal.c new file mode 100644 index 0000000000..2597fec2fd --- /dev/null +++ b/bsd-user/riscv/signal.c @@ -0,0 +1,63 @@ +/* + * RISC-V signal definitions + * + * Copyright (c) 2019 Mark Corbin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ +#include "qemu/osdep.h" + +#include "qemu.h" + +/* + * Compare with sendsig() in riscv/riscv/exec_machdep.c + * Assumes that target stack frame memory is locked. + */ +abi_long +set_sigtramp_args(CPURISCVState *regs, int sig, struct target_sigframe *frame, + abi_ulong frame_addr, struct target_sigaction *ka) +{ + /* + * Arguments to signal handler: + * a0 (10) = signal number + * a1 (11) = siginfo pointer + * a2 (12) = ucontext pointer + * pc = signal pointer handler + * sp (2) = sigframe pointer + * ra (1) = sigtramp at base of user stack + */ + + regs->gpr[xA0] = sig; + regs->gpr[xA1] = frame_addr + + offsetof(struct target_sigframe, sf_si); + regs->gpr[xA2] = frame_addr + + offsetof(struct target_sigframe, sf_uc); + regs->pc = ka->_sa_handler; + regs->gpr[xSP] = frame_addr; + regs->gpr[xRA] = TARGET_PS_STRINGS - TARGET_SZSIGCODE; + return 0; +} + +/* + * Compare to riscv/riscv/exec_machdep.c sendsig() + * Assumes that the memory is locked if frame points to user memory. + */ +abi_long setup_sigframe_arch(CPURISCVState *env, abi_ulong frame_addr, + struct target_sigframe *frame, int flags) +{ + target_mcontext_t *mcp = &frame->sf_uc.uc_mcontext; + + get_mcontext(env, mcp, flags); + return 0; +} From patchwork Sun Sep 15 15:25:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985896 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=l8KBLw7g; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; 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[14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:53 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 15/17] bsd-user: Implement 'get_mcontext' for RISC-V Date: Mon, 16 Sep 2024 01:25:52 +1000 Message-Id: <20240915152554.8394-16-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Added the 'get_mcontext' function to extract and populate the RISC-V machine context from the CPU state. This function is used to gather the current state of the general-purpose registers and store it in a 'target_mcontext_' structure. Signed-off-by: Mark Corbin Signed-off-by: Ajeet Singh Signed-off-by: Warner Losh Co-authored-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/riscv/signal.c | 53 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/bsd-user/riscv/signal.c b/bsd-user/riscv/signal.c index 2597fec2fd..072ad821d2 100644 --- a/bsd-user/riscv/signal.c +++ b/bsd-user/riscv/signal.c @@ -61,3 +61,56 @@ abi_long setup_sigframe_arch(CPURISCVState *env, abi_ulong frame_addr, get_mcontext(env, mcp, flags); return 0; } + +/* + * Compare with get_mcontext() in riscv/riscv/machdep.c + * Assumes that the memory is locked if mcp points to user memory. + */ +abi_long get_mcontext(CPURISCVState *regs, target_mcontext_t *mcp, + int flags) +{ + + mcp->mc_gpregs.gp_t[0] = tswap64(regs->gpr[5]); + mcp->mc_gpregs.gp_t[1] = tswap64(regs->gpr[6]); + mcp->mc_gpregs.gp_t[2] = tswap64(regs->gpr[7]); + mcp->mc_gpregs.gp_t[3] = tswap64(regs->gpr[28]); + mcp->mc_gpregs.gp_t[4] = tswap64(regs->gpr[29]); + mcp->mc_gpregs.gp_t[5] = tswap64(regs->gpr[30]); + mcp->mc_gpregs.gp_t[6] = tswap64(regs->gpr[31]); + + mcp->mc_gpregs.gp_s[0] = tswap64(regs->gpr[8]); + mcp->mc_gpregs.gp_s[1] = tswap64(regs->gpr[9]); + mcp->mc_gpregs.gp_s[2] = tswap64(regs->gpr[18]); + mcp->mc_gpregs.gp_s[3] = tswap64(regs->gpr[19]); + mcp->mc_gpregs.gp_s[4] = tswap64(regs->gpr[20]); + mcp->mc_gpregs.gp_s[5] = tswap64(regs->gpr[21]); + mcp->mc_gpregs.gp_s[6] = tswap64(regs->gpr[22]); + mcp->mc_gpregs.gp_s[7] = tswap64(regs->gpr[23]); + mcp->mc_gpregs.gp_s[8] = tswap64(regs->gpr[24]); + mcp->mc_gpregs.gp_s[9] = tswap64(regs->gpr[25]); + mcp->mc_gpregs.gp_s[10] = tswap64(regs->gpr[26]); + mcp->mc_gpregs.gp_s[11] = tswap64(regs->gpr[27]); + + mcp->mc_gpregs.gp_a[0] = tswap64(regs->gpr[10]); + mcp->mc_gpregs.gp_a[1] = tswap64(regs->gpr[11]); + mcp->mc_gpregs.gp_a[2] = tswap64(regs->gpr[12]); + mcp->mc_gpregs.gp_a[3] = tswap64(regs->gpr[13]); + mcp->mc_gpregs.gp_a[4] = tswap64(regs->gpr[14]); + mcp->mc_gpregs.gp_a[5] = tswap64(regs->gpr[15]); + mcp->mc_gpregs.gp_a[6] = tswap64(regs->gpr[16]); + mcp->mc_gpregs.gp_a[7] = tswap64(regs->gpr[17]); + + if (flags & TARGET_MC_GET_CLEAR_RET) { + mcp->mc_gpregs.gp_a[0] = 0; /* a0 */ + mcp->mc_gpregs.gp_a[1] = 0; /* a1 */ + mcp->mc_gpregs.gp_t[0] = 0; /* clear syscall error */ + } + + mcp->mc_gpregs.gp_ra = tswap64(regs->gpr[1]); + mcp->mc_gpregs.gp_sp = tswap64(regs->gpr[2]); + mcp->mc_gpregs.gp_gp = tswap64(regs->gpr[3]); + mcp->mc_gpregs.gp_tp = tswap64(regs->gpr[4]); + mcp->mc_gpregs.gp_sepc = tswap64(regs->pc); + + return 0; +} From patchwork Sun Sep 15 15:25:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985893 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=fzQcjWRb; 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[14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:26:57 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 16/17] bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV Date: Mon, 16 Sep 2024 01:25:53 +1000 Message-Id: <20240915152554.8394-17-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x62c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Mark Corbin Added implementations for 'set_mcontext' and 'get_ucontext_sigreturn' functions for RISC-V architecture, Both functions ensure that the CPU state and user context are properly managed. Signed-off-by: Mark Corbin Signed-off-by: Warner Losh Signed-off-by: Ajeet Singh Co-authored-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/riscv/signal.c | 54 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/bsd-user/riscv/signal.c b/bsd-user/riscv/signal.c index 072ad821d2..10c940cd49 100644 --- a/bsd-user/riscv/signal.c +++ b/bsd-user/riscv/signal.c @@ -114,3 +114,57 @@ abi_long get_mcontext(CPURISCVState *regs, target_mcontext_t *mcp, return 0; } + +/* Compare with set_mcontext() in riscv/riscv/exec_machdep.c */ +abi_long set_mcontext(CPURISCVState *regs, target_mcontext_t *mcp, + int srflag) +{ + + regs->gpr[5] = tswap64(mcp->mc_gpregs.gp_t[0]); + regs->gpr[6] = tswap64(mcp->mc_gpregs.gp_t[1]); + regs->gpr[7] = tswap64(mcp->mc_gpregs.gp_t[2]); + regs->gpr[28] = tswap64(mcp->mc_gpregs.gp_t[3]); + regs->gpr[29] = tswap64(mcp->mc_gpregs.gp_t[4]); + regs->gpr[30] = tswap64(mcp->mc_gpregs.gp_t[5]); + regs->gpr[31] = tswap64(mcp->mc_gpregs.gp_t[6]); + + regs->gpr[8] = tswap64(mcp->mc_gpregs.gp_s[0]); + regs->gpr[9] = tswap64(mcp->mc_gpregs.gp_s[1]); + regs->gpr[18] = tswap64(mcp->mc_gpregs.gp_s[2]); + regs->gpr[19] = tswap64(mcp->mc_gpregs.gp_s[3]); + regs->gpr[20] = tswap64(mcp->mc_gpregs.gp_s[4]); + regs->gpr[21] = tswap64(mcp->mc_gpregs.gp_s[5]); + regs->gpr[22] = tswap64(mcp->mc_gpregs.gp_s[6]); + regs->gpr[23] = tswap64(mcp->mc_gpregs.gp_s[7]); + regs->gpr[24] = tswap64(mcp->mc_gpregs.gp_s[8]); + regs->gpr[25] = tswap64(mcp->mc_gpregs.gp_s[9]); + regs->gpr[26] = tswap64(mcp->mc_gpregs.gp_s[10]); + regs->gpr[27] = tswap64(mcp->mc_gpregs.gp_s[11]); + + regs->gpr[10] = tswap64(mcp->mc_gpregs.gp_a[0]); + regs->gpr[11] = tswap64(mcp->mc_gpregs.gp_a[1]); + regs->gpr[12] = tswap64(mcp->mc_gpregs.gp_a[2]); + regs->gpr[13] = tswap64(mcp->mc_gpregs.gp_a[3]); + regs->gpr[14] = tswap64(mcp->mc_gpregs.gp_a[4]); + regs->gpr[15] = tswap64(mcp->mc_gpregs.gp_a[5]); + regs->gpr[16] = tswap64(mcp->mc_gpregs.gp_a[6]); + regs->gpr[17] = tswap64(mcp->mc_gpregs.gp_a[7]); + + + regs->gpr[1] = tswap64(mcp->mc_gpregs.gp_ra); + regs->gpr[2] = tswap64(mcp->mc_gpregs.gp_sp); + regs->gpr[3] = tswap64(mcp->mc_gpregs.gp_gp); + regs->gpr[4] = tswap64(mcp->mc_gpregs.gp_tp); + regs->pc = tswap64(mcp->mc_gpregs.gp_sepc); + + return 0; +} + +/* Compare with sys_sigreturn() in riscv/riscv/machdep.c */ +abi_long get_ucontext_sigreturn(CPURISCVState *regs, + abi_ulong target_sf, abi_ulong *target_uc) +{ + + *target_uc = target_sf; + return 0; +} From patchwork Sun Sep 15 15:25:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajeet Singh X-Patchwork-Id: 1985895 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=bRLhdGUY; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; 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[14.200.149.22]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946f34c1sm22554335ad.184.2024.09.15.08.26.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 08:27:00 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Richard Henderson Subject: [PATCH v6 17/17] bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files Date: Mon, 16 Sep 2024 01:25:54 +1000 Message-Id: <20240915152554.8394-18-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240915152554.8394-1-itachis@FreeBSD.org> References: <20240915152554.8394-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x636.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Warner Losh Added configuration for RISC-V 64-bit target to the build system. Signed-off-by: Warner Losh Signed-off-by: Ajeet Singh Reviewed-by: Richard Henderson --- configs/targets/riscv64-bsd-user.mak | 4 ++++ 1 file changed, 4 insertions(+) create mode 100644 configs/targets/riscv64-bsd-user.mak diff --git a/configs/targets/riscv64-bsd-user.mak b/configs/targets/riscv64-bsd-user.mak new file mode 100644 index 0000000000..191c2c483f --- /dev/null +++ b/configs/targets/riscv64-bsd-user.mak @@ -0,0 +1,4 @@ +TARGET_ARCH=riscv64 +TARGET_BASE_ARCH=riscv +TARGET_ABI_DIR=riscv +TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-64bit-virtual.xml