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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d2a3c0fasm61914525e9.7.2024.07.19.11.10.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:10:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 01/16] tests/avocado: Add 'device:pl011' tag to tests exercising PL011 UART Date: Fri, 19 Jul 2024 20:10:26 +0200 Message-ID: <20240719181041.49545-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add the 'device:pl011' tag to various tests using the PL011 UART, so we can run them all at once using: $ make check-avocado AVOCADO_TAGS='device:pl011' Signed-off-by: Philippe Mathieu-Daudé --- tests/avocado/boot_linux.py | 1 + tests/avocado/boot_linux_console.py | 2 ++ tests/avocado/boot_xen.py | 1 + tests/avocado/machine_aarch64_sbsaref.py | 1 + tests/avocado/machine_aarch64_virt.py | 1 + tests/avocado/smmu.py | 1 + tests/avocado/tuxrun_baselines.py | 5 +++++ 7 files changed, 12 insertions(+) diff --git a/tests/avocado/boot_linux.py b/tests/avocado/boot_linux.py index df6cf209ef..6717f452eb 100644 --- a/tests/avocado/boot_linux.py +++ b/tests/avocado/boot_linux.py @@ -70,6 +70,7 @@ class BootLinuxAarch64(LinuxTest): def test_virt_kvm(self): """ :avocado: tags=machine:virt + :avocado: tags=device:pl011 :avocado: tags=accel:kvm :avocado: tags=cpu:host """ diff --git a/tests/avocado/boot_linux_console.py b/tests/avocado/boot_linux_console.py index c35fc5e9ba..f595324979 100644 --- a/tests/avocado/boot_linux_console.py +++ b/tests/avocado/boot_linux_console.py @@ -362,6 +362,7 @@ def test_arm_virt(self): """ :avocado: tags=arch:arm :avocado: tags=machine:virt + :avocado: tags=device:pl011 :avocado: tags=accel:tcg """ kernel_url = ('https://archives.fedoraproject.org/pub/archive/fedora' @@ -1380,6 +1381,7 @@ def test_arm_vexpressa9(self): """ :avocado: tags=arch:arm :avocado: tags=machine:vexpress-a9 + :avocado: tags=device:pl011 """ tar_hash = '32b7677ce8b6f1471fb0059865f451169934245b' self.vm.add_args('-dtb', self.workdir + '/day16/vexpress-v2p-ca9.dtb') diff --git a/tests/avocado/boot_xen.py b/tests/avocado/boot_xen.py index 93bfb0c161..c4c01afa76 100644 --- a/tests/avocado/boot_xen.py +++ b/tests/avocado/boot_xen.py @@ -66,6 +66,7 @@ class BootXen(BootXenBase): :avocado: tags=accel:tcg :avocado: tags=cpu:cortex-a57 :avocado: tags=machine:virt + :avocado: tags=device:pl011 """ def test_arm64_xen_411_and_dom0(self): diff --git a/tests/avocado/machine_aarch64_sbsaref.py b/tests/avocado/machine_aarch64_sbsaref.py index e920bbf08c..f04ac2b11c 100644 --- a/tests/avocado/machine_aarch64_sbsaref.py +++ b/tests/avocado/machine_aarch64_sbsaref.py @@ -20,6 +20,7 @@ class Aarch64SbsarefMachine(QemuSystemTest): """ :avocado: tags=arch:aarch64 :avocado: tags=machine:sbsa-ref + :avocado: tags=device:pl011 :avocado: tags=accel:tcg As firmware runs at a higher privilege level than the hypervisor we diff --git a/tests/avocado/machine_aarch64_virt.py b/tests/avocado/machine_aarch64_virt.py index 0ef6df4b0d..2d586c8459 100644 --- a/tests/avocado/machine_aarch64_virt.py +++ b/tests/avocado/machine_aarch64_virt.py @@ -23,6 +23,7 @@ class Aarch64VirtMachine(QemuSystemTest): """ :avocado: tags=arch:aarch64 :avocado: tags=machine:virt + :avocado: tags=device:pl011 """ KERNEL_COMMON_COMMAND_LINE = 'printk.time=0 ' timeout = 360 diff --git a/tests/avocado/smmu.py b/tests/avocado/smmu.py index 4ebfa7128c..4b265e2435 100644 --- a/tests/avocado/smmu.py +++ b/tests/avocado/smmu.py @@ -21,6 +21,7 @@ class SMMU(LinuxTest): :avocado: tags=arch:aarch64 :avocado: tags=machine:virt :avocado: tags=distro:fedora + :avocado: tags=device:pl011 :avocado: tags=smmu :avocado: tags=flaky """ diff --git a/tests/avocado/tuxrun_baselines.py b/tests/avocado/tuxrun_baselines.py index 736e4aa289..98ab40bbb5 100644 --- a/tests/avocado/tuxrun_baselines.py +++ b/tests/avocado/tuxrun_baselines.py @@ -254,6 +254,7 @@ def test_arm64(self): :avocado: tags=arch:aarch64 :avocado: tags=cpu:cortex-a57 :avocado: tags=machine:virt + :avocado: tags=device:pl011 :avocado: tags=tuxboot:arm64 :avocado: tags=console:ttyAMA0 :avocado: tags=shutdown:nowait @@ -270,6 +271,7 @@ def test_arm64be(self): :avocado: tags=cpu:cortex-a57 :avocado: tags=endian:big :avocado: tags=machine:virt + :avocado: tags=device:pl011 :avocado: tags=tuxboot:arm64be :avocado: tags=console:ttyAMA0 :avocado: tags=shutdown:nowait @@ -285,6 +287,7 @@ def test_armv5(self): :avocado: tags=arch:arm :avocado: tags=cpu:arm926 :avocado: tags=machine:versatilepb + :avocado: tags=device:pl011 :avocado: tags=tuxboot:armv5 :avocado: tags=image:zImage :avocado: tags=console:ttyAMA0 @@ -306,6 +309,7 @@ def test_armv7(self): :avocado: tags=arch:arm :avocado: tags=cpu:cortex-a15 :avocado: tags=machine:virt + :avocado: tags=device:pl011 :avocado: tags=tuxboot:armv7 :avocado: tags=image:zImage :avocado: tags=console:ttyAMA0 @@ -324,6 +328,7 @@ def test_armv7be(self): :avocado: tags=cpu:cortex-a15 :avocado: tags=endian:big :avocado: tags=machine:virt + :avocado: tags=device:pl011 :avocado: tags=tuxboot:armv7be :avocado: tags=image:zImage :avocado: tags=console:ttyAMA0 From patchwork Fri Jul 19 18:10:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962590 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=glagd9JJ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; 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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-36878684801sm2258633f8f.11.2024.07.19.11.10.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:10:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 02/16] hw/char/pl011: Remove unused 'readbuff' field Date: Fri, 19 Jul 2024 20:10:27 +0200 Message-ID: <20240719181041.49545-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Since its introduction in commit cdbdb648b7 ("ARM Versatile Platform Baseboard emulation.") PL011State::readbuff as never been used. Remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- include/hw/char/pl011.h | 1 - hw/char/pl011.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h index d853802132..4fcaf3d7d3 100644 --- a/include/hw/char/pl011.h +++ b/include/hw/char/pl011.h @@ -32,7 +32,6 @@ struct PL011State { SysBusDevice parent_obj; MemoryRegion iomem; - uint32_t readbuff; uint32_t flags; uint32_t lcr; uint32_t rsr; diff --git a/hw/char/pl011.c b/hw/char/pl011.c index f8078aa216..260f5fc0bc 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -549,7 +549,7 @@ static const VMStateDescription vmstate_pl011 = { .minimum_version_id = 2, .post_load = pl011_post_load, .fields = (const VMStateField[]) { - VMSTATE_UINT32(readbuff, PL011State), + VMSTATE_UNUSED(sizeof(uint32_t)), VMSTATE_UINT32(flags, PL011State), VMSTATE_UINT32(lcr, PL011State), VMSTATE_UINT32(rsr, PL011State), From patchwork Fri Jul 19 18:10:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962587 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=mhKZhomJ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WQd6v0qCGz20FV for ; Sat, 20 Jul 2024 04:12:07 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUs4b-0002Es-Sl; Fri, 19 Jul 2024 14:11:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUs4S-00029p-8k for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:09 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUs4P-0003l5-27 for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:07 -0400 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-3685afd0c56so760932f8f.1 for ; Fri, 19 Jul 2024 11:11:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721412663; x=1722017463; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Pcbf3AvGHvD4fhRiEOLagM3LlfJ7dGGey9tdUSZ+O4Q=; b=mhKZhomJyM87Wnf33M27vaUvQnkhzXG5qTx9GbmHTTOxcPqxGmLBUQXkvtk0B6NwlB oEHREdYmApFHZt6UE5lriGCOuvZmxk8uL/tIP17jl1VCwFOh1UNgyhaHaPthbqDEhLSE Jkf2d9agKlW69TtapaqaAMjhxoLHs6L1uidVyfMFmWLs16tFKsEZbSsOMe/+voA31JRi SrQmdfsexzUwhnvgfdTriwCE9E3qOo1+MRxAXFSIZkQ5sEhxAhyCqnTb54YPNIk/SloC wXzZdD4dTenzZkk6ihcqeXpymQM2cIOcf9SYMWpvAVKwYuUYIleUqXCyehcGK8xg/Bev 0ERg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721412663; x=1722017463; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Pcbf3AvGHvD4fhRiEOLagM3LlfJ7dGGey9tdUSZ+O4Q=; b=rpL7n6uxT58uesBHYs6lkJD3YTwbFLJcVMUByk8J4efcbm5zQ2b2PYiWEPsmsn+geG xL57cX9jYAEdyleEQ3m0zkC0QEgtMU02aIgq6F/qDlX6L05GWZ1k0J57MicFF7EJcVfb FmimhhbERAsJS3GX7v5zz+UZuNUnz2xDcZXVH9v7OG8P0MyfYmHy0zRlrFT1HJp2FiuD 40xCFhK6qeLu37bLrwmH6W8mH907jrhsQEVqOFcU2xK3jqBX5ov2HdMFHI6LrzxvwdrF wZjbUB2evQL58fpoNG+qvAufyWo3KueQnWSMp5Y2BN6sitqUvxuY9qlkz2c4e3/RPR6U F8hw== X-Gm-Message-State: AOJu0Yx6ZyMfLRa+mM7TWuJ8VWLpCKvIA4QNyDaGsSlIxU/CbcfkLYRE ek0ZviUZ7mLxpUg/tKwNYYQt4mpYdLyvOryZpAQ/BpnJM8zFLMTygan7MUv5JYDKefRQ5u/6PP2 V X-Google-Smtp-Source: AGHT+IHKGAtGplxlsw04A5Xyo5rKG4NyQ6nejAtmR2e06wwDRwmeAjWCa1URvp0UhWUd79dYwqRQjQ== X-Received: by 2002:a5d:4cc4:0:b0:367:f054:7aba with SMTP id ffacd0b85a97d-3683175ce54mr5619270f8f.41.1721412663012; Fri, 19 Jul 2024 11:11:03 -0700 (PDT) Received: from localhost.localdomain (52.170.88.92.rev.sfr.net. [92.88.170.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3687868420fsm2231578f8f.3.2024.07.19.11.11.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 03/16] hw/char/pl011: Move pl011_put_fifo() earlier Date: Fri, 19 Jul 2024 20:10:28 +0200 Message-ID: <20240719181041.49545-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Avoid forward-declaring pl011_put_fifo() by moving it earlier. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/char/pl011.c | 46 ++++++++++++++++++++++------------------------ 1 file changed, 22 insertions(+), 24 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 260f5fc0bc..edb5395fb8 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -159,6 +159,28 @@ static inline void pl011_reset_fifo(PL011State *s) s->flags |= PL011_FLAG_RXFE | PL011_FLAG_TXFE; } +static void pl011_put_fifo(void *opaque, uint32_t value) +{ + PL011State *s = (PL011State *)opaque; + int slot; + unsigned pipe_depth; + + pipe_depth = pl011_get_fifo_depth(s); + slot = (s->read_pos + s->read_count) & (pipe_depth - 1); + s->read_fifo[slot] = value; + s->read_count++; + s->flags &= ~PL011_FLAG_RXFE; + trace_pl011_put_fifo(value, s->read_count); + if (s->read_count == pipe_depth) { + trace_pl011_put_fifo_full(); + s->flags |= PL011_FLAG_RXFF; + } + if (s->read_count == s->read_trigger) { + s->int_level |= INT_RX; + pl011_update(s); + } +} + static uint64_t pl011_read(void *opaque, hwaddr offset, unsigned size) { @@ -314,8 +336,6 @@ static void pl011_loopback_mdmctrl(PL011State *s) pl011_update(s); } -static void pl011_put_fifo(void *opaque, uint32_t value); - static void pl011_loopback_tx(PL011State *s, uint32_t value) { if (!pl011_loopback_enabled(s)) { @@ -440,28 +460,6 @@ static int pl011_can_receive(void *opaque) return r; } -static void pl011_put_fifo(void *opaque, uint32_t value) -{ - PL011State *s = (PL011State *)opaque; - int slot; - unsigned pipe_depth; - - pipe_depth = pl011_get_fifo_depth(s); - slot = (s->read_pos + s->read_count) & (pipe_depth - 1); - s->read_fifo[slot] = value; - s->read_count++; - s->flags &= ~PL011_FLAG_RXFE; - trace_pl011_put_fifo(value, s->read_count); - if (s->read_count == pipe_depth) { - trace_pl011_put_fifo_full(); - s->flags |= PL011_FLAG_RXFF; - } - if (s->read_count == s->read_trigger) { - s->int_level |= INT_RX; - pl011_update(s); - } -} - static void pl011_receive(void *opaque, const uint8_t *buf, int size) { /* From patchwork Fri Jul 19 18:10:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962585 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d7263687sm29524065e9.4.2024.07.19.11.11.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:08 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 04/16] hw/char/pl011: Move pl011_loopback_enabled|tx() around Date: Fri, 19 Jul 2024 20:10:29 +0200 Message-ID: <20240719181041.49545-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We'll soon use pl011_loopback_enabled() and pl011_loopback_tx() from functions defined before their declarations. In order to avoid forward-declaring them, move them around. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/char/pl011.c | 66 ++++++++++++++++++++++++------------------------- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index edb5395fb8..22195ead7b 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -138,6 +138,11 @@ static void pl011_update(PL011State *s) } } +static bool pl011_loopback_enabled(PL011State *s) +{ + return !!(s->cr & CR_LBE); +} + static bool pl011_is_fifo_enabled(PL011State *s) { return (s->lcr & LCR_FEN) != 0; @@ -181,6 +186,34 @@ static void pl011_put_fifo(void *opaque, uint32_t value) } } +static void pl011_loopback_tx(PL011State *s, uint32_t value) +{ + if (!pl011_loopback_enabled(s)) { + return; + } + + /* + * Caveat: + * + * In real hardware, TX loopback happens at the serial-bit level + * and then reassembled by the RX logics back into bytes and placed + * into the RX fifo. That is, loopback happens after TX fifo. + * + * Because the real hardware TX fifo is time-drained at the frame + * rate governed by the configured serial format, some loopback + * bytes in TX fifo may still be able to get into the RX fifo + * that could be full at times while being drained at software + * pace. + * + * In such scenario, the RX draining pace is the major factor + * deciding which loopback bytes get into the RX fifo, unless + * hardware flow-control is enabled. + * + * For simplicity, the above described is not emulated. + */ + pl011_put_fifo(s, value); +} + static uint64_t pl011_read(void *opaque, hwaddr offset, unsigned size) { @@ -290,11 +323,6 @@ static void pl011_trace_baudrate_change(const PL011State *s) s->ibrd, s->fbrd); } -static bool pl011_loopback_enabled(PL011State *s) -{ - return !!(s->cr & CR_LBE); -} - static void pl011_loopback_mdmctrl(PL011State *s) { uint32_t cr, fr, il; @@ -336,34 +364,6 @@ static void pl011_loopback_mdmctrl(PL011State *s) pl011_update(s); } -static void pl011_loopback_tx(PL011State *s, uint32_t value) -{ - if (!pl011_loopback_enabled(s)) { - return; - } - - /* - * Caveat: - * - * In real hardware, TX loopback happens at the serial-bit level - * and then reassembled by the RX logics back into bytes and placed - * into the RX fifo. That is, loopback happens after TX fifo. - * - * Because the real hardware TX fifo is time-drained at the frame - * rate governed by the configured serial format, some loopback - * bytes in TX fifo may still be able to get into the RX fifo - * that could be full at times while being drained at software - * pace. - * - * In such scenario, the RX draining pace is the major factor - * deciding which loopback bytes get into the RX fifo, unless - * hardware flow-control is enabled. - * - * For simplicity, the above described is not emulated. - */ - pl011_put_fifo(s, value); -} - static void pl011_loopback_break(PL011State *s, int brk_enable) { if (brk_enable) { From patchwork Fri Jul 19 18:10:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962597 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=cHDup4H5; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WQd9d72TKz1xpQ for ; Sat, 20 Jul 2024 04:14:29 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUs4y-00039d-H0; Fri, 19 Jul 2024 14:11:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUs4e-0002Qd-AS for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:21 -0400 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUs4b-0003ok-Mp for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:19 -0400 Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-4266edee10cso13005545e9.2 for ; Fri, 19 Jul 2024 11:11:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721412675; x=1722017475; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WBQBL5W8xgFprC/jppYzPypv2gfWoCKhxuevh4igzXc=; b=cHDup4H5TPWAimxswXCit7TSGbrQixMkYckcWu8Lqxk8n3YDSE+HGcFpvaaaIdXf+T LwOYwyQfqRzoVBjpJ3pWNFdEPpY7lmm0Br1KxonT4+PuCkRPu8rsdG06nwcPPGitjTEw rFk779FCoXpXYMrCHvVBHSquRXFij60RK2EUuBO6IdD4Lgwp1NNYQOLZcauPZJsrmNV3 KqOuFGQkLNvv4n7wEAa2xHyn39P4QdnrEna/KWPIj8gtM+yUk/0mernOWHbmAQhpiBlj BLMt2AZKDRE6YTxicO3hvRvc+HqCQM7nxUAibI2HXV6dFhV2NMxo4GNVwEUioTsqQxT4 HJaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721412675; x=1722017475; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WBQBL5W8xgFprC/jppYzPypv2gfWoCKhxuevh4igzXc=; b=eNnG38kKE0pp8/+RjsZOUxnuxgdmhDbSmTenTolcy+PDdSzFpX32vMplfStZtB5fE6 ZU8hnL8+CrZIB+ZovGGbekc1xKVjqvA/QsuFxhp4mgsdAG7FdmezVqVPgUjieVowDlFO YxhMuzeG0IRL0LCwNJzCAyHUzR21lvzHCKYi062tAyJWHXlWTlShzkBPtTiVSoqsS7sy 2GF9VGjD12pfe6FJUCz7PxHmV7nARN930GuJyCnvQKcnoFpBjzex6ZsCZlqL5m+vvVyI mn+uyhvKwA+5r+NegBm4SzbgKrcJTmqtbDAkcnPwejR34YmHdo5MZnC1cc5p5tCcZlnb Pv1Q== X-Gm-Message-State: AOJu0Yypf88jwb3oqODMtkDQ3Ro58IvKahruqUfZ1Shbq0cCUSDaMzYR dhq8ahi4o90yCTuGgRP8qo9WuEc+OQcxMzaUin2AhAPUewcmz0s+9DTvZxvaVV4+mJAgz68aKwC L X-Google-Smtp-Source: AGHT+IEysGjoyWG5B0bnxVXXcnsANlfCGJXyjeCLaHK/FKL5YC0n2UXZrK+Ipy734mbaFpWO48MaKg== X-Received: by 2002:a5d:58da:0:b0:368:65a0:a423 with SMTP id ffacd0b85a97d-36865a0a82amr3024174f8f.27.1721412674957; Fri, 19 Jul 2024 11:11:14 -0700 (PDT) Received: from localhost.localdomain (52.170.88.92.rev.sfr.net. [92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d2a94c0dsm59991275e9.46.2024.07.19.11.11.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Subject: [PATCH v5 05/16] hw/char/pl011: Split RX/TX path of pl011_reset_fifo() Date: Fri, 19 Jul 2024 20:10:30 +0200 Message-ID: <20240719181041.49545-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org To be able to reset the RX or TX FIFO separately, split pl011_reset_fifo() in two. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/char/pl011.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 22195ead7b..3d294c3b52 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -154,14 +154,21 @@ static inline unsigned pl011_get_fifo_depth(PL011State *s) return pl011_is_fifo_enabled(s) ? PL011_FIFO_DEPTH : 1; } -static inline void pl011_reset_fifo(PL011State *s) +static inline void pl011_reset_rx_fifo(PL011State *s) { s->read_count = 0; s->read_pos = 0; /* Reset FIFO flags */ - s->flags &= ~(PL011_FLAG_RXFF | PL011_FLAG_TXFF); - s->flags |= PL011_FLAG_RXFE | PL011_FLAG_TXFE; + s->flags &= ~PL011_FLAG_RXFF; + s->flags |= PL011_FLAG_RXFE; +} + +static inline void pl011_reset_tx_fifo(PL011State *s) +{ + /* Reset FIFO flags */ + s->flags &= ~PL011_FLAG_TXFF; + s->flags |= PL011_FLAG_TXFE; } static void pl011_put_fifo(void *opaque, uint32_t value) @@ -410,7 +417,8 @@ static void pl011_write(void *opaque, hwaddr offset, case 11: /* UARTLCR_H */ /* Reset the FIFO state on FIFO enable or disable */ if ((s->lcr ^ value) & LCR_FEN) { - pl011_reset_fifo(s); + pl011_reset_rx_fifo(s); + pl011_reset_tx_fifo(s); } if ((s->lcr ^ value) & LCR_BRK) { int break_enable = value & LCR_BRK; @@ -619,7 +627,8 @@ static void pl011_reset(DeviceState *dev) s->ifl = 0x12; s->cr = 0x300; s->flags = 0; - pl011_reset_fifo(s); + pl011_reset_rx_fifo(s); + pl011_reset_tx_fifo(s); } static void pl011_class_init(ObjectClass *oc, void *data) From patchwork Fri Jul 19 18:10:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962594 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=Tzpf0W61; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WQd7z6z5Xz1xpQ for ; Sat, 20 Jul 2024 04:13:03 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUs50-0003VA-Ts; Fri, 19 Jul 2024 14:11:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUs4m-0002kQ-2z for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:28 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUs4i-0003qG-Lo for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:27 -0400 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-36798779d75so1108452f8f.3 for ; Fri, 19 Jul 2024 11:11:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721412680; x=1722017480; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=t1KnnMz9QclH4DdZ0a7ONIaMOEDb8CpMIUXc7bRjrWI=; b=Tzpf0W61kW6KWL6zDf4iEIn75s8Cqd/ELkfoZaXfKnGZ21aVntorBjBwsScpMejugQ sKFXTQ/vtyYvda4LL3IfBuMfmst2GbjZI3N2a6ljAdvvtMQdNtLixX70+LAtFvIrS0AK fxZlikzpFsd9T6gyVSjsdwvgBPhNyyO4FBD/UZhohsD1Wlk5yghX9i6adBSyKfZGutCx MR0J/E8LLfqiu9ZL3i/j8+Ic9MmP0bpc4DEHG+1f9UNnwyW65EUcuF1SUTwzbW2frNxl 4hCOxa73R+bR4Q5bVoTe33rU4ACoGp9jqpuCxEj5pw6XRPqXULimJNPj6uA+6WL5x0tu Ch/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721412680; x=1722017480; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t1KnnMz9QclH4DdZ0a7ONIaMOEDb8CpMIUXc7bRjrWI=; b=AW+bWak7HhmstJcD3SDfX2PU9c9vOrBOEQM4cnkDAqQU0aDZxITJD+tohpAjI3PsAT opp1QpaINDWaeHf/15OiA7yo+5iVOj/SZFWhurYqJSPPelK/GC/lF2tRgs8KbyOLXsIM KbRJj6q9GmgaLN7/ff8aYqGvfUPB2HuOGW8F7mJvh5GXWLs/FFBSNFMs9IgFsIjNTz0c ijOAk5eik92axu0gArG11RRPkmXV245RMqVKZ6+/0GuwNOlSoubJ+joX9PbUbKXhifJp nTRMGGYgXZ8YgTMWGUapmcL81DON9souwowraFBbtT4Sqlo03HEq5eLsKduYucqo/kl1 XEqQ== X-Gm-Message-State: AOJu0Ywn18QEX0xUArtV7OqOTMfrJtozQqJZse7v1hy7EtJhiYsT8LVt oSPsBc85PnLODCHk+rlF2UOSrra2tETMJ/MeFyPAzIAqdV2f0adDIp3PD5funHVY6NYoiioptRS v X-Google-Smtp-Source: AGHT+IG9hl88XdJg/Z73hgjLd2nmae6FJDicArw0XdXqkXkS5y4JzZxWDEEbwJuiyZoqf0LbZ2f/Hg== X-Received: by 2002:a5d:4609:0:b0:368:78d0:c240 with SMTP id ffacd0b85a97d-36878d0c769mr2212400f8f.35.1721412680638; Fri, 19 Jul 2024 11:11:20 -0700 (PDT) Received: from localhost.localdomain (52.170.88.92.rev.sfr.net. [92.88.170.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3687868bb00sm2245597f8f.43.2024.07.19.11.11.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 06/16] hw/char/pl011: Extract pl011_write_txdata() from pl011_write() Date: Fri, 19 Jul 2024 20:10:31 +0200 Message-ID: <20240719181041.49545-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org When implementing FIFO, this code will become more complex. Start by factoring it out to a new pl011_write_txdata() function. No functional change intended. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- hw/char/pl011.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 3d294c3b52..c2ee9b0321 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -221,6 +221,18 @@ static void pl011_loopback_tx(PL011State *s, uint32_t value) pl011_put_fifo(s, value); } +static void pl011_write_txdata(PL011State *s, uint8_t data) +{ + /* ??? Check if transmitter is enabled. */ + + /* XXX this blocks entire thread. Rewrite to use + * qemu_chr_fe_write and background I/O callbacks */ + qemu_chr_fe_write_all(&s->chr, &data, 1); + pl011_loopback_tx(s, data); + s->int_level |= INT_TX; + pl011_update(s); +} + static uint64_t pl011_read(void *opaque, hwaddr offset, unsigned size) { @@ -388,14 +400,8 @@ static void pl011_write(void *opaque, hwaddr offset, switch (offset >> 2) { case 0: /* UARTDR */ - /* ??? Check if transmitter is enabled. */ ch = value; - /* XXX this blocks entire thread. Rewrite to use - * qemu_chr_fe_write and background I/O callbacks */ - qemu_chr_fe_write_all(&s->chr, &ch, 1); - pl011_loopback_tx(s, ch); - s->int_level |= INT_TX; - pl011_update(s); + pl011_write_txdata(s, ch); break; case 1: /* UARTRSR/UARTECR */ s->rsr = 0; From patchwork Fri Jul 19 18:10:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962600 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=mDIRd1HL; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WQd9w2XsBz1xpQ for ; Sat, 20 Jul 2024 04:14:44 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUs51-0003Ww-76; Fri, 19 Jul 2024 14:11:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUs4p-0002sW-2a for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:32 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUs4m-0003r6-V5 for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:30 -0400 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-427b1d4da32so10126915e9.0 for ; Fri, 19 Jul 2024 11:11:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721412687; x=1722017487; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DMaUbmKJbBglpDupXq1EpryBjAO9Dx7J7NA5WWzmpPw=; b=mDIRd1HLnzN3H1mIfCrSmtcXIWAFBcZs1dNcYbTGm9qpPh70h3uuHpZrfyqf4HF96n 77yS+/N9SGZ0Q36xEyKyDyBXk4slP9R8yN/fhlfiiYFY3AH/XK9xErnVQ8Zm27sgdDCG oDARJIq2QiElOoPO/L5cjUW36OcXF0MhUk23kcNqTiwyp8H3D9ZWNbBaq01byIlezkq1 o4IP8NTnZGHldSduG2tkPnjDfLyyxtHABTEgtVT1nxMVAmPh6ka1MECVHJALQE2+Q9LS sf/m6TYvkNAiVOo8OPXRKaQXT18ghcTtrMi7cO7ahCu7SViA1OYhK2hmPHDcCLH8eIbz Gj8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721412687; x=1722017487; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DMaUbmKJbBglpDupXq1EpryBjAO9Dx7J7NA5WWzmpPw=; b=tR/F6M2+OAjpJ7gtHuI2VXKz8JLkm8gl7RibN2wMHZY6I+p7J1cpIYcgi77eDEdJbo PE5e8VCUmMDvuYoSzAPMhRZJYtmZTCU//K/+egOVJn99hCCuX5rV8mZ4wQYmO4z5Q+xF xe0keaEWat5cWQAeYrAkGaEaaaktIBA6e+xRBhTvn5bmNHSXhg+Vl4+bCwAj7FSjhsnb 9rOrLuUhCgFWwwM203jRSuNoS8Z4d80yeKgp8VFwNqws6hMDEcghh93dF4656lOA8bEs eMc7yczMGgLzEwicEilRd5vIgoPPCa1xXE/xAM/pdOpETEYkEO4MlK8vzr5r/7e7JrAV a73w== X-Gm-Message-State: AOJu0Yy2aV0STi7ZeLw4FVzR0QfsIorXvVsNSpJP0XBtD9GA26pCZeTR oowJx9UyYaaZzhALbSUNo45u9mZZIMBIlCCrBmmmiu7qDD+MC2h7AMoWX8aX6H2IdlsO1zCnfxb m X-Google-Smtp-Source: AGHT+IHVhPZBltdNb5U19GKKsLFLqnLr+nLG4pavFd4q5Bf7ToAHBrItgl88M6VjcmZTDPKOzL9Caw== X-Received: by 2002:adf:a3c8:0:b0:368:4488:66f8 with SMTP id ffacd0b85a97d-36873f18f12mr2144385f8f.23.1721412686920; Fri, 19 Jul 2024 11:11:26 -0700 (PDT) Received: from localhost.localdomain (52.170.88.92.rev.sfr.net. [92.88.170.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-368787cedabsm2217831f8f.84.2024.07.19.11.11.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Subject: [PATCH v5 07/16] hw/char/pl011: Extract pl011_read_rxdata() from pl011_read() Date: Fri, 19 Jul 2024 20:10:32 +0200 Message-ID: <20240719181041.49545-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org To keep MemoryRegionOps read/write handlers with similar logic, factor pl011_read_txdata() out of pl011_read(), similar to what the previous commit did to pl011_write(). No functional change intended. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/char/pl011.c | 41 ++++++++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index c2ee9b0321..5e44837206 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -233,31 +233,38 @@ static void pl011_write_txdata(PL011State *s, uint8_t data) pl011_update(s); } +static uint32_t pl011_read_rxdata(PL011State *s) +{ + uint32_t c; + + s->flags &= ~PL011_FLAG_RXFF; + c = s->read_fifo[s->read_pos]; + if (s->read_count > 0) { + s->read_count--; + s->read_pos = (s->read_pos + 1) & (pl011_get_fifo_depth(s) - 1); + } + if (s->read_count == 0) { + s->flags |= PL011_FLAG_RXFE; + } + if (s->read_count == s->read_trigger - 1) { + s->int_level &= ~ INT_RX; + } + trace_pl011_read_fifo(s->read_count); + s->rsr = c >> 8; + pl011_update(s); + qemu_chr_fe_accept_input(&s->chr); + return c; +} + static uint64_t pl011_read(void *opaque, hwaddr offset, unsigned size) { PL011State *s = (PL011State *)opaque; - uint32_t c; uint64_t r; switch (offset >> 2) { case 0: /* UARTDR */ - s->flags &= ~PL011_FLAG_RXFF; - c = s->read_fifo[s->read_pos]; - if (s->read_count > 0) { - s->read_count--; - s->read_pos = (s->read_pos + 1) & (pl011_get_fifo_depth(s) - 1); - } - if (s->read_count == 0) { - s->flags |= PL011_FLAG_RXFE; - } - if (s->read_count == s->read_trigger - 1) - s->int_level &= ~ INT_RX; - trace_pl011_read_fifo(s->read_count); - s->rsr = c >> 8; - pl011_update(s); - qemu_chr_fe_accept_input(&s->chr); - r = c; + r = pl011_read_rxdata(s); break; case 1: /* UARTRSR */ r = s->rsr; From patchwork Fri Jul 19 18:10:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962592 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=viZsthjW; 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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d2a7257esm59439785e9.28.2024.07.19.11.11.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Subject: [PATCH v5 08/16] hw/char/pl011: Warn when using disabled transmitter Date: Fri, 19 Jul 2024 20:10:33 +0200 Message-ID: <20240719181041.49545-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We shouldn't transmit characters when the full UART or its transmitter is disabled. However we don't want to break the possibly incomplete "my first bare metal assembly program"s, so we choose to simply display a warning when this occurs. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/char/pl011.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 5e44837206..c76283dccf 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -85,7 +85,9 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) #define CR_OUT1 (1 << 12) #define CR_RTS (1 << 11) #define CR_DTR (1 << 10) +#define CR_TXE (1 << 8) #define CR_LBE (1 << 7) +#define CR_UARTEN (1 << 0) /* Integer Baud Rate Divider, UARTIBRD */ #define IBRD_MASK 0x3f @@ -223,7 +225,12 @@ static void pl011_loopback_tx(PL011State *s, uint32_t value) static void pl011_write_txdata(PL011State *s, uint8_t data) { - /* ??? Check if transmitter is enabled. */ + if (!(s->cr & CR_UARTEN)) { + qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled UART\n"); + } + if (!(s->cr & CR_TXE)) { + qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled TX UART\n"); + } /* XXX this blocks entire thread. Rewrite to use * qemu_chr_fe_write and background I/O callbacks */ From patchwork Fri Jul 19 18:10:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962591 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=Izxs50ha; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WQd7n5dQkz1xpQ for ; Sat, 20 Jul 2024 04:12:53 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUs54-0003sS-99; Fri, 19 Jul 2024 14:11:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUs52-0003gb-I7 for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:44 -0400 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUs50-0003uI-Cw for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:44 -0400 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-42660b8dd27so13652825e9.3 for ; Fri, 19 Jul 2024 11:11:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721412700; x=1722017500; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g8wjXx2GxaXvhCmT3K/sKVDQtxch9aqIxPKOi+RY35s=; b=Izxs50haudGCc2YV2T/tqmBa/fy+QhBkgPFUssAGU4kgTAw7S/vwFstBJm5Mealdxx 5ol8W/ozfkMK9eEXE1RUFmzsVpWrtjX0TPjqovzOVdZZs5vAPH/RqO2WZs0di6VacaYr da51phfxhcLPvQxOer3tf9QoxgUxJD4C9fRiVgWaC453RerVT2b+NjpptIC+nUhTev0k uJhXnGePt9Z4vxkKF7n5uUurpYQxKOrDsg/wsDH02/8LHHSIniJKQq9DyZlMnt3Zisaa vvC5F2lNZELkRiikBxY0/CazCWF8e3SlgxZnIKzOFasXIcgcSvsv8n6JIJwvn3aA96gi jpNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721412700; x=1722017500; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g8wjXx2GxaXvhCmT3K/sKVDQtxch9aqIxPKOi+RY35s=; b=GQVKEuuH0JNq0cvsZm8d4VB4HdeLma4LPNWosyePji0sVvDyhEX5EmNNAQZ+9sfm1E uUsAUa8upLrX36e/dEeXXUxsP25YAtjgTJz3ls42wpvvMSk6njmDtHEhIO69yXVaZtQg pkGeLNiXMNsXOnsc5q995MwzP8C0TWZVUjc/aSpuSgJE9HmmyRhgT5gYT49ObkcKec47 ZixC0mfaq+Kw3k9/HPEIDGPS+N4yzgWytKXYeGNoeHyFCuk9WbYVNF1JGQ6OAmn16wTC FaLi68zzXgen3klMVyej+FH6D/F6SyVbLTZiEcWR1hdAA5kurW9XlH7Kxy64OFI/m7eS GrPA== X-Gm-Message-State: AOJu0YyKzDH+RHj5Y5kFgxYUljUHi+AFOnSOMbMtJfPZZrf+cYWy2s1v LTsmtYRPu3okIYljnj3l4SM0FMUnaoaLDZ+u4Y1KWKVmcu2yPiudXqv7RyF9iIGH7XGSLKFYNxA 1 X-Google-Smtp-Source: AGHT+IEQVsRzjCNWPuwRgcSt5N92vn8toj1j0Vw3yyreHnS3jvRH2VUU2YVFQeZXLjFBymNif10exQ== X-Received: by 2002:a05:600c:1550:b0:426:68f2:4d7b with SMTP id 5b1f17b1804b1-427c2ca57admr55957355e9.3.1721412700009; Fri, 19 Jul 2024 11:11:40 -0700 (PDT) Received: from localhost.localdomain (52.170.88.92.rev.sfr.net. [92.88.170.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3687868420fsm2232641f8f.3.2024.07.19.11.11.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:39 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 09/16] tests/qtest: Update tests using PL011 UART Date: Fri, 19 Jul 2024 20:10:34 +0200 Message-ID: <20240719181041.49545-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We weren't enabling the PL011 TX UART before using it on the raspi and virt machines. Update the ASM code prefixing: *UART_CTRL = UART_ENABLE | TX_ENABLE; to: while (true) { *UART_DATA = 'T'; } Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/boot-serial-test.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c index 3b92fa5d50..5cb309ccf0 100644 --- a/tests/qtest/boot-serial-test.c +++ b/tests/qtest/boot-serial-test.c @@ -70,18 +70,23 @@ static const uint8_t kernel_plml605[] = { }; static const uint8_t bios_raspi2[] = { - 0x08, 0x30, 0x9f, 0xe5, /* ldr r3,[pc,#8] Get base */ + 0x10, 0x30, 0x9f, 0xe5, /* ldr r3,[pc,#8] Get base */ + 0x10, 0x20, 0x9f, 0xe5, /* ldr r2,[pc,#8] Get CR */ + 0xb0, 0x23, 0xc3, 0xe1, /* strh r2,[r3, #48] Set CR */ 0x54, 0x20, 0xa0, 0xe3, /* mov r2,#'T' */ - 0x00, 0x20, 0xc3, 0xe5, /* strb r2,[r3] */ - 0xfb, 0xff, 0xff, 0xea, /* b loop */ + 0x00, 0x20, 0xc3, 0xe5, /* strb r2,[r3] loop: */ + 0xfd, 0xff, 0xff, 0xea, /* b loop */ 0x00, 0x10, 0x20, 0x3f, /* 0x3f201000 = UART0 base addr */ + 0x01, 0x01, 0x00, 0x00, /* 0x101 = CR UARTEN|TXE */ }; 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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d6906a96sm34009935e9.22.2024.07.19.11.11.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:47 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Subject: [PATCH v5 10/16] hw/char/pl011: Check if receiver is enabled Date: Fri, 19 Jul 2024 20:10:35 +0200 Message-ID: <20240719181041.49545-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Do not receive characters when UART or receiver are disabled. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/char/pl011.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index c76283dccf..0ce91c13d3 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -85,6 +85,7 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) #define CR_OUT1 (1 << 12) #define CR_RTS (1 << 11) #define CR_DTR (1 << 10) +#define CR_RXE (1 << 9) #define CR_TXE (1 << 8) #define CR_LBE (1 << 7) #define CR_UARTEN (1 << 0) @@ -481,9 +482,11 @@ static void pl011_write(void *opaque, hwaddr offset, static int pl011_can_receive(void *opaque) { PL011State *s = (PL011State *)opaque; - int r; + int r = 0; - r = s->read_count < pl011_get_fifo_depth(s); + if ((s->cr & CR_UARTEN) && (s->cr & CR_RXE)) { + r = s->read_count < pl011_get_fifo_depth(s); + } trace_pl011_can_receive(s->lcr, s->read_count, r); return r; } From patchwork Fri Jul 19 18:10:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962588 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=bVH804gc; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WQd7b4m5mz1xpQ for ; Sat, 20 Jul 2024 04:12:43 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUs5m-0006JE-30; Fri, 19 Jul 2024 14:12:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUs5H-00052D-J5 for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:12:03 -0400 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUs5E-0003yG-P5 for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:11:58 -0400 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-367e50f71bbso899460f8f.2 for ; Fri, 19 Jul 2024 11:11:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721412714; x=1722017514; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Lr9xFBvmiXrV+CsrPSg+/78zPNAgl06z+/3j2DOHoiE=; b=bVH804gcJd/lt8vcj4B9UObTTlo8ioE3Jkk/DoOeg8Gsd8scIK/QVRbd8odaBqpSH1 dx8wd/l75JJDFmVUGpDqaHZQwaCmkDL8p/h08JN2nRHFYnEFxX4f70a12+/U2rjBSptM 8tauZDVg2Ye/6pil/gvDve7TgzNdX21m0kXhIrlmQXDX9jyS2B0468aECEjd+oVpOTsF IPDr6/1OkVFVBk5aOwYRwnJrtnlQSMyVY1eHJFCcSqfoMjxDII+sVtSr9QHMEp81Wt8J IwP6RzWUamSsg+j2/pcQbnwI1uH57aHsvH6CUpni5oquScT8/dEZOqX0DXT26kZZXaSY nyCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721412714; x=1722017514; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Lr9xFBvmiXrV+CsrPSg+/78zPNAgl06z+/3j2DOHoiE=; b=gne8ujCUw3DIJGNF5PslGizGVBHpV9dmG/abZpsn+WxxSGEUesLWog4pVYfOtfIHm4 nhKgLqCE4P1nsQpzD9rLtwClf3igq3hZbuof808QycOR5JrmNgjy3EqbyZh98+yW3h/x T3KWOsr6n6I7HhMVx1aRB+JkDfVT2coMup6SDBO04GDUjJv+fEBLaMUfGZoxJasAfoLv D3ywpuhIE+U5aGkfcMnU5VLFgE4bL3ocRqRyD25gwhoy9ljJUBDuIeVbpDApsszALoOB LPNta+Lcl7qL6aE/lABgkX0CXIKM6haR70EpkBTBdwRSEopB1YtKGhltPFd+99YkqjCW THBQ== X-Gm-Message-State: AOJu0YzawIMFRbmTJ+zXNLtFqCxl13kYisi2MzuqxhMaBsx3i83e4jOz bnmXRyGFBQwfP0ZacB3j7NxCphLE9UqTWUFnS63EJLU7MDPHO11PoeiM6+f3eDT/Jzgwyp+BziN C X-Google-Smtp-Source: AGHT+IEqx9LH5SRstVmm6eRi3r01852AxHvWp7MOR3vnRYdIZMpHUdz7EkxQSStRpODYu2p4pEaVVw== X-Received: by 2002:a05:6000:4026:b0:365:32e0:f757 with SMTP id ffacd0b85a97d-36831737983mr6929266f8f.50.1721412714557; Fri, 19 Jul 2024 11:11:54 -0700 (PDT) Received: from localhost.localdomain (52.170.88.92.rev.sfr.net. [92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d2a95530sm55455065e9.45.2024.07.19.11.11.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Subject: [PATCH v5 11/16] hw/char/pl011: Rename RX FIFO methods Date: Fri, 19 Jul 2024 20:10:36 +0200 Message-ID: <20240719181041.49545-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In preparation of having a TX FIFO, rename the RX FIFO methods. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/char/pl011.c | 12 ++++++------ hw/char/trace-events | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 0ce91c13d3..c42c6d1ac2 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -174,7 +174,7 @@ static inline void pl011_reset_tx_fifo(PL011State *s) s->flags |= PL011_FLAG_TXFE; } -static void pl011_put_fifo(void *opaque, uint32_t value) +static void pl011_fifo_rx_put(void *opaque, uint32_t value) { PL011State *s = (PL011State *)opaque; int slot; @@ -185,9 +185,9 @@ static void pl011_put_fifo(void *opaque, uint32_t value) s->read_fifo[slot] = value; s->read_count++; s->flags &= ~PL011_FLAG_RXFE; - trace_pl011_put_fifo(value, s->read_count); + trace_pl011_fifo_rx_put(value, s->read_count); if (s->read_count == pipe_depth) { - trace_pl011_put_fifo_full(); + trace_pl011_fifo_rx_full(); s->flags |= PL011_FLAG_RXFF; } if (s->read_count == s->read_trigger) { @@ -221,7 +221,7 @@ static void pl011_loopback_tx(PL011State *s, uint32_t value) * * For simplicity, the above described is not emulated. */ - pl011_put_fifo(s, value); + pl011_fifo_rx_put(s, value); } static void pl011_write_txdata(PL011State *s, uint8_t data) @@ -502,13 +502,13 @@ static void pl011_receive(void *opaque, const uint8_t *buf, int size) return; } - pl011_put_fifo(opaque, *buf); + pl011_fifo_rx_put(opaque, *buf); } static void pl011_event(void *opaque, QEMUChrEvent event) { if (event == CHR_EVENT_BREAK && !pl011_loopback_enabled(opaque)) { - pl011_put_fifo(opaque, DR_BE); + pl011_fifo_rx_put(opaque, DR_BE); } } diff --git a/hw/char/trace-events b/hw/char/trace-events index 8875758076..59e1f734a7 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -58,8 +58,8 @@ pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x valu pl011_read_fifo(int read_count) "FIFO read, read_count now %d" pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s" pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d" -pl011_put_fifo(uint32_t c, int read_count) "new char 0x%x read_count now %d" -pl011_put_fifo_full(void) "FIFO now full, RXFF set" +pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count now %d" +pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set" pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")" # cmsdk-apb-uart.c From patchwork Fri Jul 19 18:10:37 2024 Content-Type: text/plain; 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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-36878684230sm2257427f8f.17.2024.07.19.11.11.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:12:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 12/16] hw/char/pl011: Add transmit FIFO to PL011State Date: Fri, 19 Jul 2024 20:10:37 +0200 Message-ID: <20240719181041.49545-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In order to make the next commit easier to review, introduce the transmit FIFO, but do not yet use it. We only migrate the TX FIFO if it is in use. When migrating from new to old VM: - if the fifo is empty, migration will still work because of the subsection. - if the fifo is not empty, the subsection will be ignored, with the only consequence being that some characters will be dropped. Since the FIFO is created empty, we don't need a migration pre_load() handler. Uninline pl011_reset_tx_fifo(). Reviewed-by: Alex Bennée Signed-off-by: Philippe Mathieu-Daudé --- include/hw/char/pl011.h | 2 ++ hw/char/pl011.c | 37 +++++++++++++++++++++++++++++++++++-- 2 files changed, 37 insertions(+), 2 deletions(-) diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h index 4fcaf3d7d3..e8d95961f6 100644 --- a/include/hw/char/pl011.h +++ b/include/hw/char/pl011.h @@ -18,6 +18,7 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" #include "qom/object.h" +#include "qemu/fifo8.h" #define TYPE_PL011 "pl011" OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011) @@ -52,6 +53,7 @@ struct PL011State { Clock *clk; bool migrate_clk; const unsigned char *id; + Fifo8 xmit_fifo; }; DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr); diff --git a/hw/char/pl011.c b/hw/char/pl011.c index c42c6d1ac2..6519340b50 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -167,11 +167,13 @@ static inline void pl011_reset_rx_fifo(PL011State *s) s->flags |= PL011_FLAG_RXFE; } -static inline void pl011_reset_tx_fifo(PL011State *s) +static void pl011_reset_tx_fifo(PL011State *s) { /* Reset FIFO flags */ s->flags &= ~PL011_FLAG_TXFF; s->flags |= PL011_FLAG_TXFE; + + fifo8_reset(&s->xmit_fifo); } static void pl011_fifo_rx_put(void *opaque, uint32_t value) @@ -545,6 +547,24 @@ static const VMStateDescription vmstate_pl011_clock = { } }; +static bool pl011_xmit_fifo_state_needed(void *opaque) +{ + PL011State* s = opaque; + + return (s->lcr & LCR_FEN) && !fifo8_is_empty(&s->xmit_fifo); +} + +static const VMStateDescription vmstate_pl011_xmit_fifo = { + .name = "pl011/xmit_fifo", + .version_id = 1, + .minimum_version_id = 1, + .needed = pl011_xmit_fifo_state_needed, + .fields = (VMStateField[]) { + VMSTATE_FIFO8(xmit_fifo, PL011State), + VMSTATE_END_OF_LIST() + } +}; + static int pl011_post_load(void *opaque, int version_id) { PL011State* s = opaque; @@ -599,7 +619,11 @@ static const VMStateDescription vmstate_pl011 = { .subsections = (const VMStateDescription * const []) { &vmstate_pl011_clock, NULL - } + }, + .subsections = (const VMStateDescription * []) { + &vmstate_pl011_xmit_fifo, + NULL + }, }; static Property pl011_properties[] = { @@ -614,6 +638,7 @@ static void pl011_init(Object *obj) PL011State *s = PL011(obj); int i; + fifo8_create(&s->xmit_fifo, PL011_FIFO_DEPTH); memory_region_init_io(&s->iomem, OBJECT(s), &pl011_ops, s, "pl011", 0x1000); sysbus_init_mmio(sbd, &s->iomem); for (i = 0; i < ARRAY_SIZE(s->irq); i++) { @@ -626,6 +651,13 @@ static void pl011_init(Object *obj) s->id = pl011_id_arm; } +static void pl011_finalize(Object *obj) +{ + PL011State *s = PL011(obj); + + fifo8_destroy(&s->xmit_fifo); +} + static void pl011_realize(DeviceState *dev, Error **errp) { PL011State *s = PL011(dev); @@ -669,6 +701,7 @@ static const TypeInfo pl011_arm_info = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(PL011State), .instance_init = pl011_init, + .instance_finalize = pl011_finalize, .class_init = pl011_class_init, }; From patchwork Fri Jul 19 18:10:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962599 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d6929827sm33457315e9.34.2024.07.19.11.12.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:12:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 13/16] hw/char/pl011: Introduce pl011_xmit() as GSource Date: Fri, 19 Jul 2024 20:10:38 +0200 Message-ID: <20240719181041.49545-14-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Extract pl011_xmit() from pl011_write_txdata(). Use the FIFO to pass the character to be transmitted. Implement it using the FEWatchFunc prototype, since we want to register it as GSource later. While the return value is not yet used, we return G_SOURCE_REMOVE meaning the GSource is removed from the main loop (because we only send one char). Signed-off-by: Philippe Mathieu-Daudé --- hw/char/pl011.c | 30 +++++++++++++++++++++++++----- hw/char/trace-events | 2 ++ 2 files changed, 27 insertions(+), 5 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 6519340b50..6394d6eb36 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -226,6 +226,28 @@ static void pl011_loopback_tx(PL011State *s, uint32_t value) pl011_fifo_rx_put(s, value); } +static gboolean pl011_xmit(void *do_not_use, GIOCondition cond, void *opaque) +{ + PL011State *s = opaque; + int bytes_consumed; + uint8_t data; + + data = fifo8_pop(&s->xmit_fifo); + bytes_consumed = 1; + + /* + * XXX this blocks entire thread. Rewrite to use + * qemu_chr_fe_write and background I/O callbacks + */ + qemu_chr_fe_write_all(&s->chr, &data, bytes_consumed); + trace_pl011_fifo_tx_xmit(bytes_consumed); + s->int_level |= INT_TX; + + pl011_update(s); + + return G_SOURCE_REMOVE; +} + static void pl011_write_txdata(PL011State *s, uint8_t data) { if (!(s->cr & CR_UARTEN)) { @@ -235,12 +257,10 @@ static void pl011_write_txdata(PL011State *s, uint8_t data) qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled TX UART\n"); } - /* XXX this blocks entire thread. Rewrite to use - * qemu_chr_fe_write and background I/O callbacks */ - qemu_chr_fe_write_all(&s->chr, &data, 1); + trace_pl011_fifo_tx_put(data); pl011_loopback_tx(s, data); - s->int_level |= INT_TX; - pl011_update(s); + fifo8_push(&s->xmit_fifo, data); + pl011_xmit(NULL, G_IO_OUT, s); } static uint32_t pl011_read_rxdata(PL011State *s) diff --git a/hw/char/trace-events b/hw/char/trace-events index 59e1f734a7..30d06a2383 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -60,6 +60,8 @@ pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x val pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d" pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count now %d" pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set" +pl011_fifo_tx_put(uint8_t byte) "TX FIFO push char [0x%02x]" +pl011_fifo_tx_xmit(int count) "TX FIFO pop %d chars" pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")" # cmsdk-apb-uart.c From patchwork Fri Jul 19 18:10:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962593 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=EeHvyC8/; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WQd7z73fBz20FP for ; Sat, 20 Jul 2024 04:13:03 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUs5w-0000I1-3P; Fri, 19 Jul 2024 14:12:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUs5a-0006P1-0S for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:12:24 -0400 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUs5X-00041X-HI for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:12:17 -0400 Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-4267345e746so15652315e9.0 for ; Fri, 19 Jul 2024 11:12:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721412734; x=1722017534; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Kzt7MO4LraScd40R9aNwzx12/7fqeBF/DeM0jkgAnc4=; b=EeHvyC8/Ik2aQQ4eg9NE8B2lQAQxFUU1Bs0CG7RDzozuXK21MVZUkw+bcPCM8Is6hX 9V2k7xAQds1atqL0n13z8zkcmNk/UFDwizhdEGfXbN7UM0APf7jteulrxImdTL1M2a02 0ANlSLHVuNkXVteitL6lHoEatw8dYhCzeHkFVfTKyxZflHieTCczfaKQqpiWDcFfewzX kl+QuzRDTSNcNhItf17ispnimma18nJ4hd7tEFQ7LAeX/zNEKrpimKNylAmwn5HwXP58 1fINEeGb7tT3J54Yp60uBb78eVR/pzJl7odxeByR+bNKxKO1ROPyg6tQP4xFhOgF2WKM FvUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721412734; x=1722017534; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Kzt7MO4LraScd40R9aNwzx12/7fqeBF/DeM0jkgAnc4=; b=sdoyekXWQc7ric1F8U+v9hhXVXU0J23SVnSW2V6KEL2deqoaq6dOU5hqHlCA0zjJFK iCmlsmP71IhwEgIfcDv8B4TAp32OI0WrOLmR/4iwQwqGPmlCTmPURbdSzs/KgQLSbgyJ sM93nQOD1XbuyXyjfCNHBIYUJUeZPxgfsPsBPuYqIEqY2K0ZbPeV6joDD2r5jQmsqzar z29MdkqoFe5uRHi82djXhouuxJpvileN5AR2NRJgTpuP0jsns2H2f+j9ReIayaJon5Y9 YNvtXz/PbsxqO2M0M1IQVM9IsI0PhzqIYbASEx5pv7lqr8rWhvPIcSEHVSOe/E5rzOcn 7b/A== X-Gm-Message-State: AOJu0Yy7gj3f51WlQnV8LHzizfJwgNvqbgIQ/xQUx2Ncerm6atZkY/PK B69IeVJPS9Y04TPZmfQKcYXR5hKkhYhSdt34XLujAwPhASQsjGLzwLQPtazKPgM1Gy0Zzb2A7G5 x X-Google-Smtp-Source: AGHT+IFAlTBZGNzmud28AaYdKNsP59hLbnRyUBwyNJoUflUjfuejIehacn9/40ePZEK8Z5xNXkj1/Q== X-Received: by 2002:a05:600c:c08:b0:426:6f15:2e4d with SMTP id 5b1f17b1804b1-427c2cc27f0mr56979845e9.9.1721412733714; Fri, 19 Jul 2024 11:12:13 -0700 (PDT) Received: from localhost.localdomain (52.170.88.92.rev.sfr.net. [92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d2a6efc5sm60849745e9.21.2024.07.19.11.12.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:12:13 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 14/16] hw/char/pl011: Consider TX FIFO overrun error Date: Fri, 19 Jul 2024 20:10:39 +0200 Message-ID: <20240719181041.49545-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org When transmission is disabled, characters are still queued to the FIFO which eventually overruns. Report that error condition in the status register. Signed-off-by: Philippe Mathieu-Daudé --- hw/char/pl011.c | 17 +++++++++++++++++ hw/char/trace-events | 1 + 2 files changed, 18 insertions(+) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 6394d6eb36..b8cde03f98 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -61,6 +61,9 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) /* Data Register, UARTDR */ #define DR_BE (1 << 10) +/* Receive Status Register/Error Clear Register, UARTRSR/UARTECR */ +#define RSR_OE (1 << 3) + /* Interrupt status bits in UARTRIS, UARTMIS, UARTIMSC */ #define INT_OE (1 << 10) #define INT_BE (1 << 9) @@ -232,6 +235,13 @@ static gboolean pl011_xmit(void *do_not_use, GIOCondition cond, void *opaque) int bytes_consumed; uint8_t data; + if (!(s->cr & CR_UARTEN)) { + qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled UART\n"); + } + if (!(s->cr & CR_TXE)) { + qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled TX UART\n"); + } + data = fifo8_pop(&s->xmit_fifo); bytes_consumed = 1; @@ -257,6 +267,13 @@ static void pl011_write_txdata(PL011State *s, uint8_t data) qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled TX UART\n"); } + if (fifo8_is_full(&s->xmit_fifo)) { + /* The FIFO is already full. Content remains valid. */ + trace_pl011_fifo_tx_overrun(); + s->rsr |= RSR_OE; + return; + } + trace_pl011_fifo_tx_put(data); pl011_loopback_tx(s, data); fifo8_push(&s->xmit_fifo, data); diff --git a/hw/char/trace-events b/hw/char/trace-events index 30d06a2383..4a9c0bd271 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -62,6 +62,7 @@ pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count now %d pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set" pl011_fifo_tx_put(uint8_t byte) "TX FIFO push char [0x%02x]" pl011_fifo_tx_xmit(int count) "TX FIFO pop %d chars" +pl011_fifo_tx_overrun(void) "TX FIFO overrun" pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")" # cmsdk-apb-uart.c From patchwork Fri Jul 19 18:10:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962598 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=JuiUZf/2; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WQd9h2gRRz20FP for ; Sat, 20 Jul 2024 04:14:32 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUs6O-0002vg-5q; Fri, 19 Jul 2024 14:13:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUs5g-0006o1-37 for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:12:30 -0400 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUs5e-00042p-CD for qemu-devel@nongnu.org; Fri, 19 Jul 2024 14:12:23 -0400 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-4266f344091so14865695e9.0 for ; Fri, 19 Jul 2024 11:12:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721412740; x=1722017540; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/3cF/tU//YplS5nRyz5oLLMVLav+V+FPLOKof/J5MTo=; b=JuiUZf/2vEba1fg7Xw+gSyXcl3g/LCwHZise8u3g/cBs3rDGnUr1c5lpVCBBuOAstt v5B0/SRBcTokOTxIU9PaJTTDipO2IYtpZrEfoTHP2OBtq52N47BvauF5T1ck9BH2kLeZ p9Kv/oWIqDHzCqFJY7y+yBFQ+T7fR9/X3Oj0vJu5uH6mIt2f6lQ/rB3ER4ZhZpm5mf/C vrpimojRHiiaK3KxBPBgMmw4sov5WaoMvWHDcExRTIwx16Dketpu1x9OmUYD6NrIOGr+ /PLxfjK5WZVuiuSaniLJWnX/OmqQQdTODUbBcf+6gbb3rkhhNGlqm822abjSzo34YpYG e3lg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721412740; x=1722017540; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/3cF/tU//YplS5nRyz5oLLMVLav+V+FPLOKof/J5MTo=; b=smzQrysEOj95zXeUTTRblPuulxjwTV2xS6J3WEmNBsCq48kNgvaGA6ge5J92/RPkDI xwNUH/xQPvUSw3ZrhmFE3UOUoMW8pINTGilu+VWQBxGkX13FzR8Q4AD6IHVwsEHFb9VL TKlXPyyxwjz7Yk4wkXqOGY5S6mlE8uozlEc9S9aJIxAyZkbJ/dytWWcdxDjGMfzHW/Un spyg3T8Bc+YV5VLkgLLWTrUgXCtSdf88WvRtCWTiFl4dQBtOk2rLJGUAgl5gi0SV4rJL oV2ZrnWmwT5lPhc4G9pFHUNKW5F9yJw3qmy31zJiaqbrmBJavrumzxlSh6kEfqjmZekv nj9A== X-Gm-Message-State: AOJu0Yzh4ortMJmrpvXul620tIFU68LTP17PKG3UQSqnxaKyPYG5QFcv DzBqLv+4B+6U15Xk20Xmk0113MkXpJdnRRNg5VpGi46qv7mlx54Wqvg1On4bCV1FRFKE4LVev0D v X-Google-Smtp-Source: AGHT+IGQkwbVcp4D8oKxdRtPoLQiC3jGXnrExIerD6OV6FKZNbP9aUTq/C3jX1Ze1T2q/jqwmQXFDQ== X-Received: by 2002:a05:600c:c09:b0:426:640b:73d9 with SMTP id 5b1f17b1804b1-427c2ca9070mr63116805e9.10.1721412739853; Fri, 19 Jul 2024 11:12:19 -0700 (PDT) Received: from localhost.localdomain (52.170.88.92.rev.sfr.net. [92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d68fa0a6sm33549825e9.9.2024.07.19.11.12.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:12:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v5 15/16] hw/char/pl011: Drain TX FIFO when no backend connected Date: Fri, 19 Jul 2024 20:10:40 +0200 Message-ID: <20240719181041.49545-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org When no character backend is connected, the PL011 frontend just drains the FIFO. Signed-off-by: Philippe Mathieu-Daudé --- hw/char/pl011.c | 13 +++++++++++++ hw/char/trace-events | 1 + 2 files changed, 14 insertions(+) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index b8cde03f98..cfa3fd3da4 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -229,6 +229,13 @@ static void pl011_loopback_tx(PL011State *s, uint32_t value) pl011_fifo_rx_put(s, value); } +static void pl011_drain_tx(PL011State *s) +{ + trace_pl011_fifo_tx_drain(fifo8_num_used(&s->xmit_fifo)); + pl011_reset_tx_fifo(s); + s->rsr &= ~RSR_OE; +} + static gboolean pl011_xmit(void *do_not_use, GIOCondition cond, void *opaque) { PL011State *s = opaque; @@ -242,6 +249,12 @@ static gboolean pl011_xmit(void *do_not_use, GIOCondition cond, void *opaque) qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled TX UART\n"); } + if (!qemu_chr_fe_backend_connected(&s->chr)) { + /* Instant drain the fifo when there's no back-end. */ + pl011_drain_tx(s); + return G_SOURCE_REMOVE; + } + data = fifo8_pop(&s->xmit_fifo); bytes_consumed = 1; diff --git a/hw/char/trace-events b/hw/char/trace-events index 4a9c0bd271..bf586ba664 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -63,6 +63,7 @@ pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set" pl011_fifo_tx_put(uint8_t byte) "TX FIFO push char [0x%02x]" pl011_fifo_tx_xmit(int count) "TX FIFO pop %d chars" pl011_fifo_tx_overrun(void) "TX FIFO overrun" +pl011_fifo_tx_drain(unsigned drained) "TX FIFO draining %u chars" pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")" # cmsdk-apb-uart.c From patchwork Fri Jul 19 18:10:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1962595 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d6929976sm33385325e9.29.2024.07.19.11.12.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:12:25 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Mikko Rapeli Subject: [RFC PATCH v5 16/16] hw/char/pl011: Implement TX FIFO Date: Fri, 19 Jul 2024 20:10:41 +0200 Message-ID: <20240719181041.49545-17-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org If the UART back-end chardev doesn't drain data as fast as stdout does or blocks, buffer in the TX FIFO to try again later. This avoids having the IO-thread busy waiting on chardev back-ends, reported recently when testing the Trusted Reference Stack and using the socket backend. Implement registering a front-end 'watch' callback on back-end events, so we can resume transmitting when the back-end is writable again, not blocking the main loop. Similarly to the RX FIFO path, FIFO level selection is not implemented (interrupt is triggered when a single byte is available in the FIFO). Reported-by: Mikko Rapeli Suggested-by: Alex Bennée Signed-off-by: Philippe Mathieu-Daudé --- RFC: Something is still broken, some characters are emitted async... --- hw/char/pl011.c | 60 ++++++++++++++++++++++++++++++++++++-------- hw/char/trace-events | 1 + 2 files changed, 51 insertions(+), 10 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index cfa3fd3da4..9f72b6a765 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -240,7 +240,9 @@ static gboolean pl011_xmit(void *do_not_use, GIOCondition cond, void *opaque) { PL011State *s = opaque; int bytes_consumed; - uint8_t data; + const uint8_t *buf; + uint32_t buflen; + uint32_t count; if (!(s->cr & CR_UARTEN)) { qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled UART\n"); @@ -249,25 +251,40 @@ static gboolean pl011_xmit(void *do_not_use, GIOCondition cond, void *opaque) qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled TX UART\n"); } + count = fifo8_num_used(&s->xmit_fifo); + if (count < 1) { + /* FIFO empty */ + return G_SOURCE_REMOVE; + } + if (!qemu_chr_fe_backend_connected(&s->chr)) { /* Instant drain the fifo when there's no back-end. */ pl011_drain_tx(s); return G_SOURCE_REMOVE; } - data = fifo8_pop(&s->xmit_fifo); - bytes_consumed = 1; + buf = fifo8_peek_buf(&s->xmit_fifo, count, &buflen); - /* - * XXX this blocks entire thread. Rewrite to use - * qemu_chr_fe_write and background I/O callbacks - */ - qemu_chr_fe_write_all(&s->chr, &data, bytes_consumed); + /* Transmit as much data as we can. */ + bytes_consumed = qemu_chr_fe_write(&s->chr, buf, buflen); trace_pl011_fifo_tx_xmit(bytes_consumed); + if (bytes_consumed < 0) { + /* Error in back-end: drain the fifo. */ + pl011_drain_tx(s); + return G_SOURCE_REMOVE; + } + + /* Pop the data we could transmit. */ + fifo8_pop_buf(&s->xmit_fifo, bytes_consumed, NULL); s->int_level |= INT_TX; pl011_update(s); + if (!fifo8_is_empty(&s->xmit_fifo)) { + /* Reschedule another transmission if we couldn't transmit all. */ + return G_SOURCE_CONTINUE; + } + return G_SOURCE_REMOVE; } @@ -290,6 +307,10 @@ static void pl011_write_txdata(PL011State *s, uint8_t data) trace_pl011_fifo_tx_put(data); pl011_loopback_tx(s, data); fifo8_push(&s->xmit_fifo, data); + if (fifo8_is_full(&s->xmit_fifo)) { + s->flags |= PL011_FLAG_TXFF; + } + pl011_xmit(NULL, G_IO_OUT, s); } @@ -488,10 +509,24 @@ static void pl011_write(void *opaque, hwaddr offset, pl011_trace_baudrate_change(s); break; case 11: /* UARTLCR_H */ - /* Reset the FIFO state on FIFO enable or disable */ if ((s->lcr ^ value) & LCR_FEN) { - pl011_reset_rx_fifo(s); + bool fifo_enabled = value & LCR_FEN; + + trace_pl011_fifo_enable(fifo_enabled); + if (fifo_enabled) { + /* Transmit and receive FIFO buffers are enabled (FIFO mode). */ + fifo8_change_capacity(&s->xmit_fifo, PL011_FIFO_DEPTH); + } else { + /* + * FIFOs are disabled (character mode) that is, the FIFOs + * become 1-byte-deep holding registers. + */ + pl011_drain_tx(s); + fifo8_change_capacity(&s->xmit_fifo, 1); + } + /* Reset the FIFO state on FIFO enable or disable */ pl011_reset_tx_fifo(s); + pl011_reset_rx_fifo(s); } if ((s->lcr ^ value) & LCR_BRK) { int break_enable = value & LCR_BRK; @@ -636,6 +671,11 @@ static int pl011_post_load(void *opaque, int version_id) s->read_pos = 0; } + if (!fifo8_is_empty(&s->xmit_fifo)) { + /* Reschedule another transmission */ + qemu_chr_fe_add_watch(&s->chr, G_IO_OUT | G_IO_HUP, pl011_xmit, s); + } + s->ibrd &= IBRD_MASK; s->fbrd &= FBRD_MASK; diff --git a/hw/char/trace-events b/hw/char/trace-events index bf586ba664..2405819812 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -58,6 +58,7 @@ pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x valu pl011_read_fifo(int read_count) "FIFO read, read_count now %d" pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s" pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d" +pl011_fifo_enable(bool enable) "enable:%u" pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count now %d" pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set" pl011_fifo_tx_put(uint8_t byte) "TX FIFO push char [0x%02x]"