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Fri, 05 Jul 2024 05:45:36 -0700 (PDT) Received: from m1x-phil.lan ([176.176.163.129]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3675a103d00sm20918932f8f.99.2024.07.05.05.45.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 05 Jul 2024 05:45:36 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 1/2] system: Sort QEMU_ARCH_VIRTIO_PCI definition Date: Fri, 5 Jul 2024 14:45:27 +0200 Message-ID: <20240705124528.97471-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240705124528.97471-1-philmd@linaro.org> References: <20240705124528.97471-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sort the QEMU_ARCH_VIRTIO_PCI to simplify adding/removing entries. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- system/qdev-monitor.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c index 6af6ef7d66..acdc8b73a3 100644 --- a/system/qdev-monitor.c +++ b/system/qdev-monitor.c @@ -55,12 +55,17 @@ typedef struct QDevAlias } QDevAlias; /* default virtio transport per architecture */ -#define QEMU_ARCH_VIRTIO_PCI (QEMU_ARCH_ALPHA | QEMU_ARCH_ARM | \ - QEMU_ARCH_HPPA | QEMU_ARCH_I386 | \ - QEMU_ARCH_MIPS | QEMU_ARCH_PPC | \ - QEMU_ARCH_RISCV | QEMU_ARCH_SH4 | \ - QEMU_ARCH_SPARC | QEMU_ARCH_XTENSA | \ - QEMU_ARCH_LOONGARCH) +#define QEMU_ARCH_VIRTIO_PCI (QEMU_ARCH_ALPHA | \ + QEMU_ARCH_ARM | \ + QEMU_ARCH_HPPA | \ + QEMU_ARCH_I386 | \ + QEMU_ARCH_LOONGARCH | \ + QEMU_ARCH_MIPS | \ + QEMU_ARCH_PPC | \ + QEMU_ARCH_RISCV | \ + QEMU_ARCH_SH4 | \ + QEMU_ARCH_SPARC | \ + QEMU_ARCH_XTENSA) #define QEMU_ARCH_VIRTIO_CCW (QEMU_ARCH_S390X) #define QEMU_ARCH_VIRTIO_MMIO (QEMU_ARCH_M68K) From patchwork Fri Jul 5 12:45:28 2024 Content-Type: text/plain; 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Fri, 05 Jul 2024 05:45:41 -0700 (PDT) Received: from m1x-phil.lan ([176.176.163.129]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4264a283551sm61209735e9.42.2024.07.05.05.45.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 05 Jul 2024 05:45:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Paolo Bonzini , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 2/2] system: Enable the device aliases for or1k, too Date: Fri, 5 Jul 2024 14:45:28 +0200 Message-ID: <20240705124528.97471-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240705124528.97471-1-philmd@linaro.org> References: <20240705124528.97471-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22c; envelope-from=philmd@linaro.org; helo=mail-lj1-x22c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Thomas Huth Now that we've got a "virt" machine for or1k that supports PCI too (commit 40fef82c4e "hw/openrisc: Add PCI bus support to virt") we can also enable the virtio device aliases like we do on other similar platforms. This will e.g. help to run the iotests with qemu-system-or1k later. Signed-off-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240705090808.1305765-1-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- system/qdev-monitor.c | 1 + 1 file changed, 1 insertion(+) diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c index acdc8b73a3..44994ea0e1 100644 --- a/system/qdev-monitor.c +++ b/system/qdev-monitor.c @@ -61,6 +61,7 @@ typedef struct QDevAlias QEMU_ARCH_I386 | \ QEMU_ARCH_LOONGARCH | \ QEMU_ARCH_MIPS | \ + QEMU_ARCH_OPENRISC | \ QEMU_ARCH_PPC | \ QEMU_ARCH_RISCV | \ QEMU_ARCH_SH4 | \