From patchwork Mon Jul 1 16:49:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 1954968 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=fwts-devel-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WCkM65RZgz1xpN for ; Tue, 2 Jul 2024 10:29:53 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1sOROy-0001PR-PB; Tue, 02 Jul 2024 00:29:44 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1sOKDE-00014u-Qy for fwts-devel@lists.ubuntu.com; Mon, 01 Jul 2024 16:49:09 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 2C2BACE18FD; Mon, 1 Jul 2024 16:49:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 25809C116B1; Mon, 1 Jul 2024 16:49:05 +0000 (UTC) From: superm1@kernel.org To: fwts-devel@lists.ubuntu.com Subject: [PATCH] aspm: Only require ASPM for devices with an actual link Date: Mon, 1 Jul 2024 11:49:01 -0500 Message-ID: <20240701164901.1713517-1-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Received-SPF: pass client-ip=145.40.73.55; envelope-from=superm1@kernel.org; helo=sin.source.kernel.org X-Mailman-Approved-At: Tue, 02 Jul 2024 00:29:43 +0000 X-BeenThere: fwts-devel@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Firmware Test Suite Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mario Limonciello Errors-To: fwts-devel-bounces@lists.ubuntu.com Sender: "fwts-devel" From: Mario Limonciello USB4 switches don't actually have any link between upstream and downstream ports. Adjust the check to only check related devices with physical links. Signed-off-by: Mario Limonciello Acked-by: Ivan Hu --- src/lib/include/fwts_pci.h | 12 ++++++++++++ src/pci/aspm/aspm.c | 9 +++++++++ 2 files changed, 21 insertions(+) diff --git a/src/lib/include/fwts_pci.h b/src/lib/include/fwts_pci.h index ba9cfac1..a3428a86 100644 --- a/src/lib/include/fwts_pci.h +++ b/src/lib/include/fwts_pci.h @@ -109,6 +109,18 @@ #define FWTS_PCI_CONFIG_TYPE2_SUBSYSTEM_VENDOR_ID (0x42) #define FWTS_PCI_CONFIG_TYPE2_LEGACY_MODE_BASE_ADDRESS (0x44) +/* PCI config device port type */ +#define FWTS_PCI_EXP_FLAGS_TYPE 0x00f0 +#define FWTS_PCI_EXP_TYPE_ENDPOINT (0x0) +#define FWTS_PCI_EXP_TYPE_LEGACY_ENDPOINT (0x1) +#define FWTS_PCI_EXP_TYPE_ROOT_PORT (0x4) +#define FWTS_PCI_EXP_TYPE_UPSTREAM_PORT (0x5) +#define FWTS_PCI_EXP_TYPE_DOWNSTREAM_PORT (0x6) +#define FWTS_PCI_EXP_TYPE_PCI_BRIDGE (0x7) +#define FWTS_PCI_EXP_TYPE_PCIE_BRIDGE (0x8) +#define FWTS_PCI_EXP_TYPE_RC_ENDPOINT (0x9) +#define FWTS_PCI_EXP_TYPE_RC_EVENT_COLLECTOR (0xa) + /* PCI config header types */ #define FWTS_PCI_CONFIG_HEADER_TYPE_NON_BRIDGE (0x00) #define FWTS_PCI_CONFIG_HEADER_TYPE_PCI_BRIDGE (0x01) diff --git a/src/pci/aspm/aspm.c b/src/pci/aspm/aspm.c index c274f092..e50215d7 100644 --- a/src/pci/aspm/aspm.c +++ b/src/pci/aspm/aspm.c @@ -87,6 +87,15 @@ static int pcie_compare_rp_dev_aspm_registers(fwts_framework *fw, next_cap = rp_cap->next_cap_point; rp_cap = (fwts_pcie_capability *) &rp->config[next_cap]; } + if (rp_cap) { + uint8_t device_type = (rp_cap->pcie_cap_reg & FWTS_PCI_EXP_FLAGS_TYPE) >> 4; + + if ((device_type != FWTS_PCI_EXP_TYPE_ROOT_PORT) && + (device_type != FWTS_PCI_EXP_TYPE_DOWNSTREAM_PORT) && + (device_type != FWTS_PCI_EXP_TYPE_PCIE_BRIDGE)) { + return ret; + } + } next_cap = dev->config[FWTS_PCI_CONFIG_TYPE1_CAPABILITY_POINTER]; device_cap = (fwts_pcie_capability *)&dev->config[next_cap];