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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id l1-20020a170902f68100b001e3e244e5c0sm8694439plg.78.2024.04.15.21.06.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 21:06:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org Subject: [PATCH 1/7] tcg: Introduce INDEX_op_plugin_pc Date: Mon, 15 Apr 2024 21:06:03 -0700 Message-Id: <20240416040609.1313605-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240416040609.1313605-1-richard.henderson@linaro.org> References: <20240416040609.1313605-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add an opcode to find a code address within the current insn, for later use with unwinding. Generate the code generically using tcg_reg_alloc_do_movi. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/tcg/tcg-op-common.h | 1 + include/tcg/tcg-opc.h | 1 + tcg/tcg-op.c | 5 +++++ tcg/tcg.c | 10 ++++++++++ 4 files changed, 17 insertions(+) diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h index 009e2778c5..a32c88a182 100644 --- a/include/tcg/tcg-op-common.h +++ b/include/tcg/tcg-op-common.h @@ -76,6 +76,7 @@ void tcg_gen_lookup_and_goto_ptr(void); void tcg_gen_plugin_cb(unsigned from); void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo); +void tcg_gen_plugin_pc(TCGv_ptr); /* 32 bit ops */ diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h index 546eb49c11..087d1b82da 100644 --- a/include/tcg/tcg-opc.h +++ b/include/tcg/tcg-opc.h @@ -199,6 +199,7 @@ DEF(goto_ptr, 0, 1, 0, TCG_OPF_BB_EXIT | TCG_OPF_BB_END) DEF(plugin_cb, 0, 0, 1, TCG_OPF_NOT_PRESENT) DEF(plugin_mem_cb, 0, 1, 1, TCG_OPF_NOT_PRESENT) +DEF(plugin_pc, 1, 0, 0, TCG_OPF_NOT_PRESENT) /* Replicate ld/st ops for 32 and 64-bit guest addresses. */ DEF(qemu_ld_a32_i32, 1, 1, 1, diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index eff3728622..b8ca78cbe4 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -322,6 +322,11 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo) tcg_gen_op2(INDEX_op_plugin_mem_cb, tcgv_i64_arg(addr), meminfo); } +void tcg_gen_plugin_pc(TCGv_ptr arg) +{ + tcg_gen_op1(INDEX_op_plugin_pc, tcgv_ptr_arg(arg)); +} + /* 32 bit ops */ void tcg_gen_discard_i32(TCGv_i32 arg) diff --git a/tcg/tcg.c b/tcg/tcg.c index d248c52e96..42e2b53729 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -4701,6 +4701,13 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op) } } +static void tcg_reg_alloc_plugin_pc(TCGContext *s, const TCGOp *op) +{ + tcg_reg_alloc_do_movi(s, arg_temp(op->args[0]), + (uintptr_t)tcg_splitwx_to_rx(s->code_ptr), + op->life, output_pref(op, 0)); +} + /* * Specialized code generation for INDEX_op_dup_vec. */ @@ -6208,6 +6215,9 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start) case INDEX_op_mov_vec: tcg_reg_alloc_mov(s, op); break; + case INDEX_op_plugin_pc: + tcg_reg_alloc_plugin_pc(s, op); + break; case INDEX_op_dup_vec: tcg_reg_alloc_dup(s, op); break; From patchwork Tue Apr 16 04:06:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1923974 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id l1-20020a170902f68100b001e3e244e5c0sm8694439plg.78.2024.04.15.21.06.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 21:06:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org Subject: [PATCH 2/7] accel/tcg: Set CPUState.plugin_ra before all plugin callbacks Date: Mon, 15 Apr 2024 21:06:04 -0700 Message-Id: <20240416040609.1313605-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240416040609.1313605-1-richard.henderson@linaro.org> References: <20240416040609.1313605-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/hw/core/cpu.h | 1 + accel/tcg/plugin-gen.c | 50 +++++++++++++++++++++++++++++++++++++----- 2 files changed, 46 insertions(+), 5 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 10cd492aff..f4af37c13d 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -350,6 +350,7 @@ typedef union IcountDecr { typedef struct CPUNegativeOffsetState { CPUTLB tlb; #ifdef CONFIG_PLUGIN + uintptr_t plugin_ra; GArray *plugin_mem_cbs; #endif IcountDecr icount_decr; diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 36e9134a5d..f96b49cce6 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -37,6 +37,12 @@ enum plugin_gen_from { PLUGIN_GEN_AFTER_TB, }; +enum plugin_gen_ra { + GEN_RA_DONE, + GEN_RA_FROM_TB, + GEN_RA_FROM_INSN, +}; + /* called before finishing a TB with exit_tb, goto_tb or goto_ptr */ void plugin_gen_disable_mem_helpers(void) { @@ -151,11 +157,38 @@ static void gen_mem_cb(struct qemu_plugin_dyn_cb *cb, tcg_temp_free_i32(cpu_index); } -static void inject_cb(struct qemu_plugin_dyn_cb *cb) +static void inject_ra(enum plugin_gen_ra *gen_ra) +{ + TCGv_ptr ra; + + switch (*gen_ra) { + case GEN_RA_DONE: + return; + case GEN_RA_FROM_TB: + ra = tcg_constant_ptr(NULL); + break; + case GEN_RA_FROM_INSN: + ra = tcg_temp_ebb_new_ptr(); + tcg_gen_plugin_pc(ra); + break; + default: + g_assert_not_reached(); + } + + tcg_gen_st_ptr(ra, tcg_env, + offsetof(CPUState, neg.plugin_ra) - + offsetof(ArchCPU, env)); + tcg_temp_free_ptr(ra); + *gen_ra = GEN_RA_DONE; +} + +static void inject_cb(struct qemu_plugin_dyn_cb *cb, + enum plugin_gen_ra *gen_ra) { switch (cb->type) { case PLUGIN_CB_REGULAR: + inject_ra(gen_ra); gen_udata_cb(cb); break; case PLUGIN_CB_INLINE: @@ -167,16 +200,18 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) } static void inject_mem_cb(struct qemu_plugin_dyn_cb *cb, + enum plugin_gen_ra *gen_ra, enum qemu_plugin_mem_rw rw, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { if (cb->rw & rw) { switch (cb->type) { case PLUGIN_CB_MEM_REGULAR: + inject_ra(gen_ra); gen_mem_cb(cb, meminfo, addr); break; default: - inject_cb(cb); + inject_cb(cb, gen_ra); break; } } @@ -186,6 +221,7 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) { TCGOp *op, *next; int insn_idx = -1; + enum plugin_gen_ra gen_ra; if (unlikely(qemu_loglevel_mask(LOG_TB_OP_PLUGIN) && qemu_log_in_addr_range(plugin_tb->vaddr))) { @@ -205,10 +241,12 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) */ memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps)); + gen_ra = GEN_RA_FROM_TB; QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) { switch (op->opc) { case INDEX_op_insn_start: insn_idx++; + gen_ra = GEN_RA_FROM_INSN; break; case INDEX_op_plugin_cb: @@ -244,7 +282,8 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) cbs = plugin_tb->cbs; for (i = 0, n = (cbs ? cbs->len : 0); i < n; i++) { inject_cb( - &g_array_index(cbs, struct qemu_plugin_dyn_cb, i)); + &g_array_index(cbs, struct qemu_plugin_dyn_cb, i), + &gen_ra); } break; @@ -256,7 +295,8 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) cbs = insn->insn_cbs; for (i = 0, n = (cbs ? cbs->len : 0); i < n; i++) { inject_cb( - &g_array_index(cbs, struct qemu_plugin_dyn_cb, i)); + &g_array_index(cbs, struct qemu_plugin_dyn_cb, i), + &gen_ra); } break; @@ -288,7 +328,7 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) cbs = insn->mem_cbs; for (i = 0, n = (cbs ? cbs->len : 0); i < n; i++) { inject_mem_cb(&g_array_index(cbs, struct qemu_plugin_dyn_cb, i), - rw, meminfo, addr); + &gen_ra, rw, meminfo, addr); } tcg_ctx->emit_before_op = NULL; From patchwork Tue Apr 16 04:06:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1923978 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=dmmm1wld; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJVqf1vpGz1yYB for ; Tue, 16 Apr 2024 14:07:25 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rwa5L-00081Q-6A; Tue, 16 Apr 2024 00:06:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rwa5J-0007t8-5t for qemu-devel@nongnu.org; Tue, 16 Apr 2024 00:06:17 -0400 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rwa5H-00079u-8g for qemu-devel@nongnu.org; Tue, 16 Apr 2024 00:06:16 -0400 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-1e6723c606dso14272295ad.1 for ; Mon, 15 Apr 2024 21:06:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713240374; x=1713845174; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aAiLRxdfYErxgfOh0gQk21KRRPoDj9hGg+dmJqqgE+Q=; b=dmmm1wld2bdTpFmPVDYZi7adYMZi+fk1ubyDMpALGVZS8AuhmDoRjn6dX7hvrCoxdv QpLgzv2tNGr6oFUDljkM66mFhgy0J4E+PExZKzzuMVcg4PvIcW3Bgjnzn4JwipRMISqQ md9WeCWnlqWc4X50XYl6DJrV9hiinGq69eONhxqL5eJrnoXoVfjjl8jE+LsuISN2UBGu Cwp9fZbuaPmrdKJ8v7SfjqAvPRsuiZC7bxFvfvLrCNM/Z0zCoshl+UEsEdPWh3iyYB3r At62ILxfPWredZPsPad/PbEQ+PVyyP8n6uFlzvK3i9fiH1anu/HfHYGEIlqAtWWUqFQc yt6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713240374; x=1713845174; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aAiLRxdfYErxgfOh0gQk21KRRPoDj9hGg+dmJqqgE+Q=; b=v6RdAS+4WWRSaSwFkuEqYgFauvzhXzEJcWsdPwGOLojIl64ZZ1bSmyKQMbatFx6Q53 qT0KdDdZMANrSQF0/hDquqb7WOdnG9MfHPBDz1u8QE27EbJ92Rw3iZxr80WTkkJdbkBC X5vmKPfdDe4lGb4SbmNmLGQKMcAOBXRY6RcXpNbJrHyt3Gim7QL9ct3OVseZYh8luI2M 4wfJtEiL/nV0t4gFmYI3kjzKzR0cYZZRb9mEa7jAKaNqducK+JmnhyyOEcySanu+2/gR O8ADow+mItif3D//rmRgcuk18hwseNiz3moujBY83/TTzSFqI1bjpTux+v7Jkt7ZRNSc GyIg== X-Gm-Message-State: AOJu0YyceXigHApE/Kx8+bI0c7XGrnoyW0QxVyoKrut6RIy9FNwVLgDI 2EmPxLf7v4OnlhVkDc/g5B0ngkHujFdBaJAQ8pHIaqvxBCdSxEXVBWJfl/wKA6kMXLEmLr+v4K+ y X-Google-Smtp-Source: AGHT+IEgvbOda4SoTtCo0RS7v5GODFA/XHhXV5nmZafOfpYSGwklwj+wYQHcjgsrMc066qgF/v11iw== X-Received: by 2002:a17:902:ed4c:b0:1dd:e114:121c with SMTP id y12-20020a170902ed4c00b001dde114121cmr13250311plb.56.1713240373959; Mon, 15 Apr 2024 21:06:13 -0700 (PDT) Received: from stoup.. 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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id l1-20020a170902f68100b001e3e244e5c0sm8694439plg.78.2024.04.15.21.06.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 21:06:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org Subject: [PATCH 3/7] accel/tcg: Return the TranslationBlock from cpu_unwind_state_data Date: Mon, 15 Apr 2024 21:06:05 -0700 Message-Id: <20240416040609.1313605-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240416040609.1313605-1-richard.henderson@linaro.org> References: <20240416040609.1313605-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Fix the i386 get_memio_eip function to use tb->cflags instead of cs->tcg_cflags. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/cpu-common.h | 9 +++++---- accel/tcg/translate-all.c | 9 +++++---- target/i386/helper.c | 6 ++++-- 3 files changed, 14 insertions(+), 10 deletions(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 6346df17ce..f056132cab 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -176,12 +176,13 @@ void list_cpus(void); * @host_pc: the host pc within the translation * @data: output data * - * Attempt to load the the unwind state for a host pc occurring in - * translated code. If @host_pc is not in translated code, the - * function returns false; otherwise @data is loaded. + * Attempt to load the the unwind state for a host pc occurring in translated + * code. If @host_pc is not in translated code, the function returns NULL; + * otherwise @data is loaded and the TranslationBlock is returned. * This is the same unwind info as given to restore_state_to_opc. */ -bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data); +const TranslationBlock *cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, + uint64_t *data); /** * cpu_restore_state: diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 83cc14fbde..c745bc5b6c 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -243,15 +243,16 @@ bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc) return false; } -bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data) +const TranslationBlock * +cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data) { if (in_code_gen_buffer((const void *)(host_pc - tcg_splitwx_diff))) { TranslationBlock *tb = tcg_tb_lookup(host_pc); - if (tb) { - return cpu_unwind_data_from_tb(tb, host_pc, data) >= 0; + if (tb && cpu_unwind_data_from_tb(tb, host_pc, data) >= 0) { + return tb; } } - return false; + return NULL; } void page_init(void) diff --git a/target/i386/helper.c b/target/i386/helper.c index 23ccb23a5b..eaa691a851 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -517,13 +517,15 @@ static inline target_ulong get_memio_eip(CPUX86State *env) #ifdef CONFIG_TCG uint64_t data[TARGET_INSN_START_WORDS]; CPUState *cs = env_cpu(env); + const TranslationBlock *tb; - if (!cpu_unwind_state_data(cs, cs->mem_io_pc, data)) { + tb = cpu_unwind_state_data(cs, cs->mem_io_pc, data); + if (!tb) { return env->eip; } /* Per x86_restore_state_to_opc. */ - if (cs->tcg_cflags & CF_PCREL) { + if (tb->cflags & CF_PCREL) { return (env->eip & TARGET_PAGE_MASK) | data[0]; } else { return data[0] - env->segs[R_CS].base; From patchwork Tue Apr 16 04:06:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1923979 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id l1-20020a170902f68100b001e3e244e5c0sm8694439plg.78.2024.04.15.21.06.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 21:06:15 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org Subject: [PATCH 5/7] target/i386: Split out gdb-internal.h Date: Mon, 15 Apr 2024 21:06:07 -0700 Message-Id: <20240416040609.1313605-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240416040609.1313605-1-richard.henderson@linaro.org> References: <20240416040609.1313605-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Alex Bennée --- target/i386/gdb-internal.h | 65 ++++++++++++++++++++++++++++++++++++++ target/i386/gdbstub.c | 1 + 2 files changed, 66 insertions(+) create mode 100644 target/i386/gdb-internal.h diff --git a/target/i386/gdb-internal.h b/target/i386/gdb-internal.h new file mode 100644 index 0000000000..7cf4c1a656 --- /dev/null +++ b/target/i386/gdb-internal.h @@ -0,0 +1,65 @@ +/* + * x86 gdb server stub + * + * Copyright (c) 2003-2005 Fabrice Bellard + * Copyright (c) 2013 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef I386_GDB_INTERNAL_H +#define I386_GDB_INTERNAL_H + +/* + * Keep these in sync with assignment to + * gdb_num_core_regs in target/i386/cpu.c + * and with the machine description + */ + +/* + * SEG: 6 segments, plus fs_base, gs_base, kernel_gs_base + */ + +/* + * general regs -----> 8 or 16 + */ +#define IDX_NB_IP 1 +#define IDX_NB_FLAGS 1 +#define IDX_NB_SEG (6 + 3) +#define IDX_NB_CTL 6 +#define IDX_NB_FP 16 +/* + * fpu regs ----------> 8 or 16 + */ +#define IDX_NB_MXCSR 1 +/* + * total ----> 8+1+1+9+6+16+8+1=50 or 16+1+1+9+6+16+16+1=66 + */ + +#define IDX_IP_REG CPU_NB_REGS +#define IDX_FLAGS_REG (IDX_IP_REG + IDX_NB_IP) +#define IDX_SEG_REGS (IDX_FLAGS_REG + IDX_NB_FLAGS) +#define IDX_CTL_REGS (IDX_SEG_REGS + IDX_NB_SEG) +#define IDX_FP_REGS (IDX_CTL_REGS + IDX_NB_CTL) +#define IDX_XMM_REGS (IDX_FP_REGS + IDX_NB_FP) +#define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS) + +#define IDX_CTL_CR0_REG (IDX_CTL_REGS + 0) +#define IDX_CTL_CR2_REG (IDX_CTL_REGS + 1) +#define IDX_CTL_CR3_REG (IDX_CTL_REGS + 2) +#define IDX_CTL_CR4_REG (IDX_CTL_REGS + 3) +#define IDX_CTL_CR8_REG (IDX_CTL_REGS + 4) +#define IDX_CTL_EFER_REG (IDX_CTL_REGS + 5) + +#endif diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c index ebb000df6a..9662509b82 100644 --- a/target/i386/gdbstub.c +++ b/target/i386/gdbstub.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "include/gdbstub/helpers.h" +#include "gdb-internal.h" #ifdef TARGET_X86_64 static const int gpr_map[16] = { From patchwork Tue Apr 16 04:06:08 2024 Content-Type: text/plain; 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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id l1-20020a170902f68100b001e3e244e5c0sm8694439plg.78.2024.04.15.21.06.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 21:06:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org Subject: [PATCH 6/7] target/i386: Introduce cpu_compute_eflags_ccop Date: Mon, 15 Apr 2024 21:06:08 -0700 Message-Id: <20240416040609.1313605-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240416040609.1313605-1-richard.henderson@linaro.org> References: <20240416040609.1313605-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is a generalization of cpu_compute_eflags, with a dynamic value of cc_op, and is thus tcg specific. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- target/i386/cpu.h | 2 ++ target/i386/tcg/cc_helper.c | 10 ++++++++++ 2 files changed, 12 insertions(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 6b05738079..285f26d99d 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2379,6 +2379,8 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank, uint32_t cpu_cc_compute_all(CPUX86State *env1); +uint32_t cpu_compute_eflags_ccop(CPUX86State *env, CCOp op); + static inline uint32_t cpu_compute_eflags(CPUX86State *env) { uint32_t eflags = env->eflags; diff --git a/target/i386/tcg/cc_helper.c b/target/i386/tcg/cc_helper.c index f76e9cb8cf..8203682ca8 100644 --- a/target/i386/tcg/cc_helper.c +++ b/target/i386/tcg/cc_helper.c @@ -225,6 +225,16 @@ uint32_t cpu_cc_compute_all(CPUX86State *env) return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, CC_OP); } +uint32_t cpu_compute_eflags_ccop(CPUX86State *env, CCOp op) +{ + uint32_t eflags; + + eflags = helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, op); + eflags |= env->df & DF_MASK; + eflags |= env->eflags & ~(VM_MASK | RF_MASK); + return eflags; +} + target_ulong helper_cc_compute_c(target_ulong dst, target_ulong src1, target_ulong src2, int op) { From patchwork Tue Apr 16 04:06:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1923977 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=qnvBKeqv; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJVqQ6PBxz1yZh for ; Tue, 16 Apr 2024 14:07:14 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rwa5P-0008Ff-As; Tue, 16 Apr 2024 00:06:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rwa5N-0008C0-5E for qemu-devel@nongnu.org; Tue, 16 Apr 2024 00:06:21 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rwa5K-0007Aa-St for qemu-devel@nongnu.org; Tue, 16 Apr 2024 00:06:20 -0400 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-1e3ff14f249so30376775ad.1 for ; Mon, 15 Apr 2024 21:06:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713240377; x=1713845177; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SGHcSo147SgN6rnFLSb3VGek6gUZYoiow/EIARfgQaI=; b=qnvBKeqvUCwKHGbcCgTHflcOR52tZpqyQ3ziHizT+ldJO9Z2Xe72jluHKDGdjStJPX 2lVqogXRpVUiU3Nrl3iVM5AmaS/P7Dl4VKd0GwFBG0xqsDO3Nc/NHy4YPn6GZmYYtPUv ZgUQ8ofPQfp9mFnSzz5huoXWdWzSJUaMVdy5KcKu0PCdpUYDvsL/GggYmkWrQJt9K11y 6Fw7QXaiqWidt6V+HJkx4bg0+rYFk6dm7/rPGNSCwmTJLwH4g1ucFOPezP6NCemyLx19 VtVBQ7iI4TiXU84Z7ng4QblT42b44e0wwkI9DTbjKhuyDbGoa2GFxPhwLyzSWI9+JtY9 v4DQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713240377; x=1713845177; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SGHcSo147SgN6rnFLSb3VGek6gUZYoiow/EIARfgQaI=; b=cx9bqepdFcVCV54jYIZnzyIUloNCnf5hbGxXt7F6/AwbxwZKvkwzVUyAfQ/x15usfV tGzFkd0MIYHGmIcuZEFD7JK10a/87HP0INZ7Gziz1dXrG23onB1VxaZWVTlgorx/cJ/W bGyzDBsGJhFfkvexaUmM9P9tWPMY3Kro/g4v8ZOasAinSU1tHefauI5ebThTgLpxQEIi 6d5JEMyHTRZDgaQylw9XDViwqgXEy1i7F8bSoZRuC67CAIjhzEBT5GCnQbU7XK8tp8iW Gcv8WBgNsWXViUzvMSwOzWRbFx0NbI3F/U1sm3XI1BoAN50CRWk04j/XREIwQzVXSwxH V78A== X-Gm-Message-State: AOJu0YzYPeMDB1MdfmF6tAM1g0qbLgsdDBZF8fRY6cp1ZkZU6+t+EyEq cDqJnsGHHP7IxIlBfMqVDwYi0MgDj0I4dsewgpJSUPg/ICYPDRhVPeSw62PpzWjEk9xqzaDNM36 n X-Google-Smtp-Source: AGHT+IFHSl4pIJ3RQk0j5ij5rqS3i2lJqANY3IMNaWQosD3WTiI19+ZfVg5NraQMgWrTXuEhdSsacQ== X-Received: by 2002:a17:903:41c7:b0:1e3:ce12:ef77 with SMTP id u7-20020a17090341c700b001e3ce12ef77mr1256616ple.11.1713240377293; Mon, 15 Apr 2024 21:06:17 -0700 (PDT) Received: from stoup.. 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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id l1-20020a170902f68100b001e3e244e5c0sm8694439plg.78.2024.04.15.21.06.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 21:06:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org Subject: [PATCH 7/7] target/i386: Implement TCGCPUOps for plugin register reads Date: Mon, 15 Apr 2024 21:06:09 -0700 Message-Id: <20240416040609.1313605-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240416040609.1313605-1-richard.henderson@linaro.org> References: <20240416040609.1313605-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- target/i386/tcg/tcg-cpu.c | 72 ++++++++++++++++++++++++++++++--------- 1 file changed, 56 insertions(+), 16 deletions(-) diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index cca19cd40e..2370053df2 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -22,9 +22,11 @@ #include "helper-tcg.h" #include "qemu/accel.h" #include "hw/core/accel-cpu.h" - +#include "gdbstub/helpers.h" +#include "gdb-internal.h" #include "tcg-cpu.h" + /* Frob eflags into and out of the CPU temporary format. */ static void x86_cpu_exec_enter(CPUState *cs) @@ -61,38 +63,74 @@ static void x86_cpu_synchronize_from_tb(CPUState *cs, } } -static void x86_restore_state_to_opc(CPUState *cs, - const TranslationBlock *tb, - const uint64_t *data) +static uint64_t eip_from_unwind(CPUX86State *env, const TranslationBlock *tb, + uint64_t data0) { - X86CPU *cpu = X86_CPU(cs); - CPUX86State *env = &cpu->env; - int cc_op = data[1]; uint64_t new_pc; if (tb_cflags(tb) & CF_PCREL) { /* - * data[0] in PC-relative TBs is also a linear address, i.e. an address with - * the CS base added, because it is not guaranteed that EIP bits 12 and higher - * stay the same across the translation block. Add the CS base back before - * replacing the low bits, and subtract it below just like for !CF_PCREL. + * data[0] in PC-relative TBs is also a linear address, + * i.e. an address with the CS base added, because it is + * not guaranteed that EIP bits 12 and higher stay the + * same across the translation block. Add the CS base + * back before replacing the low bits, and subtract it + * below just like for !CF_PCREL. */ uint64_t pc = env->eip + tb->cs_base; - new_pc = (pc & TARGET_PAGE_MASK) | data[0]; + new_pc = (pc & TARGET_PAGE_MASK) | data0; } else { - new_pc = data[0]; + new_pc = data0; } if (tb->flags & HF_CS64_MASK) { - env->eip = new_pc; - } else { - env->eip = (uint32_t)(new_pc - tb->cs_base); + return new_pc; } + return (uint32_t)(new_pc - tb->cs_base); +} +static void x86_restore_state_to_opc(CPUState *cs, + const TranslationBlock *tb, + const uint64_t *data) +{ + CPUX86State *env = cpu_env(cs); + CCOp cc_op; + + env->eip = eip_from_unwind(env, tb, data[0]); + + cc_op = data[1]; if (cc_op != CC_OP_DYNAMIC) { env->cc_op = cc_op; } } +static bool x86_plugin_need_unwind_for_reg(CPUState *cs, int reg) +{ + return reg == IDX_IP_REG || reg == IDX_FLAGS_REG; +} + +static int x86_plugin_unwind_read_reg(CPUState *cs, GByteArray *buf, int reg, + const TranslationBlock *tb, + const uint64_t *data) +{ + CPUX86State *env = cpu_env(cs); + CCOp cc_op; + + switch (reg) { + case IDX_IP_REG: + return gdb_get_regl(buf, eip_from_unwind(env, tb, data[0])); + + case IDX_FLAGS_REG: + cc_op = data[1]; + if (cc_op == CC_OP_DYNAMIC) { + cc_op = env->cc_op; + } + return gdb_get_reg32(buf, cpu_compute_eflags_ccop(env, cc_op)); + + default: + g_assert_not_reached(); + } +} + #ifndef CONFIG_USER_ONLY static bool x86_debug_check_breakpoint(CPUState *cs) { @@ -110,6 +148,8 @@ static const TCGCPUOps x86_tcg_ops = { .initialize = tcg_x86_init, .synchronize_from_tb = x86_cpu_synchronize_from_tb, .restore_state_to_opc = x86_restore_state_to_opc, + .plugin_need_unwind_for_reg = x86_plugin_need_unwind_for_reg, + .plugin_unwind_read_reg = x86_plugin_unwind_read_reg, .cpu_exec_enter = x86_cpu_exec_enter, .cpu_exec_exit = x86_cpu_exec_exit, #ifdef CONFIG_USER_ONLY