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Sat, 9 Mar 2024 07:25:29 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DA0102004F; Sat, 9 Mar 2024 07:25:23 +0000 (GMT) Received: from localhost.localdomain (unknown [9.43.52.192]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Sat, 9 Mar 2024 07:25:23 +0000 (GMT) From: Athira Rajeev To: acme@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, irogers@google.com, namhyung@kernel.org Subject: [PATCH 1/3] tools/perf/arch/powerpc: Add load/store in powerpc annotate instructions for data type profling Date: Sat, 9 Mar 2024 12:55:11 +0530 Message-Id: <20240309072513.9418-2-atrajeev@linux.vnet.ibm.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20240309072513.9418-1-atrajeev@linux.vnet.ibm.com> References: <20240309072513.9418-1-atrajeev@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: IU3hWHIpmGFsKhvaIziNNbmw1jTRaR5c X-Proofpoint-GUID: 490FcWbiZREUUz1S1McGcd3T_l5fHtaG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-08_08,2024-03-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=999 bulkscore=0 phishscore=0 impostorscore=0 mlxscore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 spamscore=0 malwarescore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2403090058 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: atrajeev@linux.vnet.ibm.com, kjain@linux.ibm.com, linux-perf-users@vger.kernel.org, maddy@linux.ibm.com, disgoel@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Add powerpc instruction nmemonic table to associate load/store instructions with move_ops. mov_ops is used to identify mem_type to associate instruction with data type and offset. Also initialize and allocate arch specific fields for nr_instructions, instructions and nr_instructions_allocate. Signed-off-by: Athira Rajeev --- .../perf/arch/powerpc/annotate/instructions.c | 66 +++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/tools/perf/arch/powerpc/annotate/instructions.c b/tools/perf/arch/powerpc/annotate/instructions.c index a3f423c27cae..07af4442be38 100644 --- a/tools/perf/arch/powerpc/annotate/instructions.c +++ b/tools/perf/arch/powerpc/annotate/instructions.c @@ -1,6 +1,65 @@ // SPDX-License-Identifier: GPL-2.0 #include +/* + * powerpc instruction nmemonic table to associate load/store instructions with + * move_ops. mov_ops is used to identify mem_type to associate instruction with + * data type and offset. + */ +static struct ins powerpc__instructions[] = { + { .name = "lbz", .ops = &mov_ops, }, + { .name = "lbzx", .ops = &mov_ops, }, + { .name = "lbzu", .ops = &mov_ops, }, + { .name = "lbzux", .ops = &mov_ops, }, + { .name = "lhz", .ops = &mov_ops, }, + { .name = "lhzx", .ops = &mov_ops, }, + { .name = "lhzu", .ops = &mov_ops, }, + { .name = "lhzux", .ops = &mov_ops, }, + { .name = "lha", .ops = &mov_ops, }, + { .name = "lhax", .ops = &mov_ops, }, + { .name = "lhau", .ops = &mov_ops, }, + { .name = "lhaux", .ops = &mov_ops, }, + { .name = "lwz", .ops = &mov_ops, }, + { .name = "lwzx", .ops = &mov_ops, }, + { .name = "lwzu", .ops = &mov_ops, }, + { .name = "lwzux", .ops = &mov_ops, }, + { .name = "lwa", .ops = &mov_ops, }, + { .name = "lwax", .ops = &mov_ops, }, + { .name = "lwaux", .ops = &mov_ops, }, + { .name = "ld", .ops = &mov_ops, }, + { .name = "ldx", .ops = &mov_ops, }, + { .name = "ldu", .ops = &mov_ops, }, + { .name = "ldux", .ops = &mov_ops, }, + { .name = "stb", .ops = &mov_ops, }, + { .name = "stbx", .ops = &mov_ops, }, + { .name = "stbu", .ops = &mov_ops, }, + { .name = "stbux", .ops = &mov_ops, }, + { .name = "sth", .ops = &mov_ops, }, + { .name = "sthx", .ops = &mov_ops, }, + { .name = "sthu", .ops = &mov_ops, }, + { .name = "sthux", .ops = &mov_ops, }, + { .name = "stw", .ops = &mov_ops, }, + { .name = "stwx", .ops = &mov_ops, }, + { .name = "stwu", .ops = &mov_ops, }, + { .name = "stwux", .ops = &mov_ops, }, + { .name = "std", .ops = &mov_ops, }, + { .name = "stdx", .ops = &mov_ops, }, + { .name = "stdu", .ops = &mov_ops, }, + { .name = "stdux", .ops = &mov_ops, }, + { .name = "lhbrx", .ops = &mov_ops, }, + { .name = "sthbrx", .ops = &mov_ops, }, + { .name = "lwbrx", .ops = &mov_ops, }, + { .name = "stwbrx", .ops = &mov_ops, }, + { .name = "ldbrx", .ops = &mov_ops, }, + { .name = "stdbrx", .ops = &mov_ops, }, + { .name = "lmw", .ops = &mov_ops, }, + { .name = "stmw", .ops = &mov_ops, }, + { .name = "lswi", .ops = &mov_ops, }, + { .name = "lswx", .ops = &mov_ops, }, + { .name = "stswi", .ops = &mov_ops, }, + { .name = "stswx", .ops = &mov_ops, }, +}; + static struct ins_ops *powerpc__associate_instruction_ops(struct arch *arch, const char *name) { int i; @@ -52,6 +111,13 @@ static struct ins_ops *powerpc__associate_instruction_ops(struct arch *arch, con static int powerpc__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { if (!arch->initialized) { + arch->nr_instructions = ARRAY_SIZE(powerpc__instructions); + arch->instructions = calloc(arch->nr_instructions, sizeof(struct ins)); + if (arch->instructions == NULL) + return -ENOMEM; + + memcpy(arch->instructions, (struct ins *)powerpc__instructions, sizeof(struct ins) * arch->nr_instructions); + arch->nr_instructions_allocated = arch->nr_instructions; arch->initialized = true; arch->associate_instruction_ops = powerpc__associate_instruction_ops; arch->objdump.comment_char = '#'; From patchwork Sat Mar 9 07:25:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Athira Rajeev X-Patchwork-Id: 1909920 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Sat, 9 Mar 2024 07:25:31 +0000 (GMT) From: Athira Rajeev To: acme@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, irogers@google.com, namhyung@kernel.org Subject: [PATCH 2/3] tools/erf/util/annotate: Set register_char and memory_ref_char for powerpc Date: Sat, 9 Mar 2024 12:55:12 +0530 Message-Id: <20240309072513.9418-3-atrajeev@linux.vnet.ibm.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20240309072513.9418-1-atrajeev@linux.vnet.ibm.com> References: <20240309072513.9418-1-atrajeev@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 1vILPxsCoA81CPPLa4vqYmwTmJvCatci X-Proofpoint-ORIG-GUID: zx1AJFM9EJB3F8iB_AM9B92-y1JqWLqD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-08_08,2024-03-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 spamscore=0 adultscore=0 phishscore=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=999 malwarescore=0 priorityscore=1501 impostorscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2403090058 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: atrajeev@linux.vnet.ibm.com, kjain@linux.ibm.com, linux-perf-users@vger.kernel.org, maddy@linux.ibm.com, disgoel@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" To identify if the instruction has any memory reference, "memory_ref_char" field needs to be set for specific architecture. Example memory instruction: lwz r10,0(r9) Here "(" is the memory_ref_char. Set this as part of arch->objdump To get register number and access offset from the given instruction, arch->objdump.register_char is used. In case of powerpc, the register char is "r" (since reg names are r0 to r31). Hence set register_char as "r". Signed-off-by: Athira Rajeev --- tools/perf/util/annotate.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c index ac002d907d81..d69bd6edafcb 100644 --- a/tools/perf/util/annotate.c +++ b/tools/perf/util/annotate.c @@ -216,6 +216,11 @@ static struct arch architectures[] = { { .name = "powerpc", .init = powerpc__annotate_init, + .objdump = { + .comment_char = '#', + .register_char = 'r', + .memory_ref_char = '(', + }, }, { .name = "riscv64", From patchwork Sat Mar 9 07:25:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Athira Rajeev X-Patchwork-Id: 1909921 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=Zzb20Wdt; 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Sat, 9 Mar 2024 07:25:39 +0000 (GMT) From: Athira Rajeev To: acme@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, irogers@google.com, namhyung@kernel.org Subject: [PATCH 3/3] tools/perf/arch/powerc: Add get_arch_regnum for powerpc Date: Sat, 9 Mar 2024 12:55:13 +0530 Message-Id: <20240309072513.9418-4-atrajeev@linux.vnet.ibm.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20240309072513.9418-1-atrajeev@linux.vnet.ibm.com> References: <20240309072513.9418-1-atrajeev@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: LNYe5azbYKUU78hZqQFE_oH_WKsRo5q8 X-Proofpoint-GUID: tQjFiCIGc-g2K4nuS_DE8wKojJXUS1OG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-08_08,2024-03-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxscore=0 phishscore=0 priorityscore=1501 impostorscore=0 mlxlogscore=999 clxscore=1015 lowpriorityscore=0 malwarescore=0 bulkscore=0 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2403090058 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: atrajeev@linux.vnet.ibm.com, kjain@linux.ibm.com, linux-perf-users@vger.kernel.org, maddy@linux.ibm.com, disgoel@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The function get_dwarf_regnum() returns a DWARF register number from a register name string. This calls arch specific function get_arch_regnum to return register number for corresponding arch. Add mappings for register name to register number in powerpc code: arch/powerpc/util/dwarf-regs.c Signed-off-by: Athira Rajeev --- tools/perf/arch/powerpc/util/dwarf-regs.c | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/tools/perf/arch/powerpc/util/dwarf-regs.c b/tools/perf/arch/powerpc/util/dwarf-regs.c index 0c4f4caf53ac..d955e3e577ea 100644 --- a/tools/perf/arch/powerpc/util/dwarf-regs.c +++ b/tools/perf/arch/powerpc/util/dwarf-regs.c @@ -98,3 +98,32 @@ int regs_query_register_offset(const char *name) return roff->ptregs_offset; return -EINVAL; } + +struct dwarf_regs_idx { + const char *name; + int idx; +}; + +static const struct dwarf_regs_idx powerpc_regidx_table[] = { + { "r0", 0 }, { "r1", 1 }, { "r2", 2 }, { "r3", 3 }, { "r4", 4 }, + { "r5", 5 }, { "r6", 6 }, { "r7", 7 }, { "r8", 8 }, { "r9", 9 }, + { "r10", 10 }, { "r11", 11 }, { "r12", 12 }, { "r13", 13 }, { "r14", 14 }, + { "r15", 15 }, { "r16", 16 }, { "r17", 17 }, { "r18", 18 }, { "r19", 19 }, + { "r20", 20 }, { "r21", 21 }, { "r22", 22 }, { "r23", 23 }, { "r24", 24 }, + { "r25", 25 }, { "r26", 26 }, { "r27", 27 }, { "r27", 27 }, { "r28", 28 }, + { "r29", 29 }, { "r30", 30 }, { "r31", 31 }, +}; + +int get_arch_regnum(const char *name) +{ + unsigned int i; + + if (*name != 'r') + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(powerpc_regidx_table); i++) + if (!strcmp(powerpc_regidx_table[i].name, name)) + return powerpc_regidx_table[i].idx; + + return -ENOENT; +}