From patchwork Fri Jan 12 14:01:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1886132 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=SlA7op4v; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TBNbc28zYz1yQ1 for ; Sat, 13 Jan 2024 01:05:32 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOI76-0003zb-UW; Fri, 12 Jan 2024 09:02:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOI75-0003yL-Mn for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:23 -0500 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOI6z-0005m9-Tb for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:23 -0500 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-1d41bb4da91so37793065ad.0 for ; Fri, 12 Jan 2024 06:02:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705068133; x=1705672933; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+8u7GJJLpSf1x3Yb63ga4XoLRSCLoYJR0FG/IzoZ8Vs=; b=SlA7op4vBENpFw1eolwxQqmpCPtbtTmBYQG4b7KwhrGIWxDug7iRA6DeN9p7oFM4mD Ya1Eh8LSv3N+fh9zADOHcySvEYA47xx1jq2+KnYoEqEqXahXFYiyti7WIbqqTtGkNb4e IXl0kTYJrDI6m+YlG8+zOidhheRL/W9NQ25amS92F+21pgnguDyBdR86QAcMDRv2SdQb Ebt+0mM+I9O3t8t8b4h8SkKaSAVk2D8kC3hF/uRM5flLi3yW5m4+gXzAcEwwQN47q6n9 8AIVuMooMR8XJI0kSdjaaXlXYBfv4TTBl3tNvhAPkpbKYOgRWcCOWGyy5ZQjPciJVny5 UhkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705068133; x=1705672933; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+8u7GJJLpSf1x3Yb63ga4XoLRSCLoYJR0FG/IzoZ8Vs=; b=B0r7Avf5wQ+vvdYP8w0rLM0PSOHvACAuBQbndpqKBkfHMjR7zYnRD50uR62PrckOXf uAsUsTK331KolHsEnWrc9zhfXz16+ZqkO4mSl/DGp6Ffw7pcy6UmyFuYFRnhtuMpoGhL +x3pfqb3G2qvj+ka5pF7C0niKXUNCXMuN2zpG3BWieXrkaUCzxQ7BYA6Xucab1aOnaLq jLr5XoOKQ1vIQRwJH1oNlfwe6IadO42UTXHyVSUvz4N45/1YLVVenqGcXZPA++S6y/gn 8VBg33ExCMpshY8cnXUrptRyAM3KYZw0jD3wMhclUSrK3ACiB9Jf3etHp5jtxFI1I3li +v6A== X-Gm-Message-State: AOJu0Yxhhl0xiGwngaShIPEXMHKXjPZZUcksuRfP7hYBdG9wzQm8j5z1 GwWy1A0ej0ZpffB5W3yAsUqUDNBCOtBrAU2hiCVibZoeiQIvzQ== X-Google-Smtp-Source: AGHT+IEYkgcOkSlPscDpHVXBDyZRhjE9fHG/iMig5UfbX3/GbO1AthKpXavl0ctIv+g2NWWV2+cRPg== X-Received: by 2002:a17:903:120d:b0:1d4:96d2:1079 with SMTP id l13-20020a170903120d00b001d496d21079mr962001plh.15.1705068133502; Fri, 12 Jan 2024 06:02:13 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id t5-20020a1709028c8500b001cf6453b237sm3116927plo.236.2024.01.12.06.02.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:02:13 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza Subject: [PATCH v5 1/8] target/riscv: create finalize_features() for KVM Date: Fri, 12 Jan 2024 11:01:54 -0300 Message-ID: <20240112140201.127083-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112140201.127083-1-dbarboza@ventanamicro.com> References: <20240112140201.127083-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org To turn cbom_blocksize and cboz_blocksize into class properties we need KVM specific changes. KVM is creating its own version of these options with a customized setter() that prevents users from picking an invalid value during init() time. This comes at the cost of duplicating each option that KVM supports. This will keep happening for each new shared option KVM implements in the future. We can avoid that by using the same property TCG uses and adding specific KVM handling during finalize() time, like TCG already does with riscv_tcg_cpu_finalize_features(). To do that, the common CPU property offers a way of knowing if an option was user set or not, sparing us from doing unneeded syscalls. riscv_kvm_cpu_finalize_features() is then created using the same KVMScratch CPU we already use during init() time, since finalize() time is still too early to use the official KVM CPU for it. cbom_blocksize and cboz_blocksize are then handled during finalize() in the same way they're handled by their KVM specific setter. With this change we can proceed with the blocksize changes in the common code without breaking the KVM driver. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 16 +++++++--- target/riscv/cpu.h | 1 + target/riscv/kvm/kvm-cpu.c | 59 ++++++++++++++++++++++++++++++++++++ target/riscv/kvm/kvm_riscv.h | 1 + 4 files changed, 72 insertions(+), 5 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 8d3ec74a1c..d64fce5a73 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -68,6 +68,11 @@ static void cpu_option_add_user_setting(const char *optname, uint32_t value) GUINT_TO_POINTER(value)); } +bool riscv_cpu_option_set(const char *optname) +{ + return g_hash_table_contains(general_user_opts, optname); +} + #define ISA_EXT_DATA_ENTRY(_name, _min_ver, _prop) \ {#_name, _min_ver, CPU_CFG_OFFSET(_prop)} @@ -1109,17 +1114,18 @@ void riscv_cpu_finalize_features(RISCVCPU *cpu, Error **errp) } #endif - /* - * KVM accel does not have a specialized finalize() - * callback because its extensions are validated - * in the get()/set() callbacks of each property. - */ if (tcg_enabled()) { riscv_tcg_cpu_finalize_features(cpu, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); return; } + } else if (kvm_enabled()) { + riscv_kvm_cpu_finalize_features(cpu, &local_err); + if (local_err != NULL) { + error_propagate(errp, local_err); + return; + } } } diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 11df226a00..2dc28429e6 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -510,6 +510,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); char *riscv_isa_string(RISCVCPU *cpu); +bool riscv_cpu_option_set(const char *optname); #define cpu_mmu_index riscv_cpu_mmu_index diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 680a729cd8..dc0466df69 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -1598,6 +1598,65 @@ static bool kvm_cpu_realize(CPUState *cs, Error **errp) return true; } +void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp) +{ + CPURISCVState *env = &cpu->env; + KVMScratchCPU kvmcpu; + struct kvm_one_reg reg; + uint64_t val; + int ret; + + /* short-circuit without spinning the scratch CPU */ + if (!cpu->cfg.ext_zicbom && !cpu->cfg.ext_zicboz) { + return; + } + + if (!kvm_riscv_create_scratch_vcpu(&kvmcpu)) { + error_setg(errp, "Unable to create scratch KVM cpu"); + return; + } + + if (cpu->cfg.ext_zicbom && + riscv_cpu_option_set(kvm_cbom_blocksize.name)) { + + reg.id = kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CONFIG, + kvm_cbom_blocksize.kvm_reg_id); + reg.addr = (uint64_t)&val; + ret = ioctl(kvmcpu.cpufd, KVM_GET_ONE_REG, ®); + if (ret != 0) { + error_setg(errp, "Unable to read cbom_blocksize, error %d", errno); + return; + } + + if (cpu->cfg.cbom_blocksize != val) { + error_setg(errp, "Unable to set cbom_blocksize to a different " + "value than the host (%lu)", val); + return; + } + } + + if (cpu->cfg.ext_zicboz && + riscv_cpu_option_set(kvm_cboz_blocksize.name)) { + + reg.id = kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CONFIG, + kvm_cboz_blocksize.kvm_reg_id); + reg.addr = (uint64_t)&val; + ret = ioctl(kvmcpu.cpufd, KVM_GET_ONE_REG, ®); + if (ret != 0) { + error_setg(errp, "Unable to read cboz_blocksize, error %d", errno); + return; + } + + if (cpu->cfg.cboz_blocksize != val) { + error_setg(errp, "Unable to set cboz_blocksize to a different " + "value than the host (%lu)", val); + return; + } + } + + kvm_riscv_destroy_scratch_vcpu(&kvmcpu); +} + static void kvm_cpu_accel_class_init(ObjectClass *oc, void *data) { AccelCPUClass *acc = ACCEL_CPU_CLASS(oc); diff --git a/target/riscv/kvm/kvm_riscv.h b/target/riscv/kvm/kvm_riscv.h index 8329cfab82..4bd98fddc7 100644 --- a/target/riscv/kvm/kvm_riscv.h +++ b/target/riscv/kvm/kvm_riscv.h @@ -27,5 +27,6 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift, uint64_t guest_num); void riscv_kvm_aplic_request(void *opaque, int irq, int level); int kvm_riscv_sync_mpstate_to_kvm(RISCVCPU *cpu, int state); +void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp); #endif From patchwork Fri Jan 12 14:01:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1886125 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=QkAsrISw; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TBNYv31qvz1yQ2 for ; Sat, 13 Jan 2024 01:04:03 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOI75-0003yH-N9; Fri, 12 Jan 2024 09:02:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOI73-0003w5-NH for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:21 -0500 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOI70-0005na-F3 for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:21 -0500 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-1d3f29fea66so39263995ad.3 for ; Fri, 12 Jan 2024 06:02:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705068136; x=1705672936; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eEILIInaRE1Jo+ikjAVm+GwK5HxHOMFfTD8MoghY3lI=; b=QkAsrISwjdKV0EDKrSeTgHaBC0xOTj/6RvRhY2wDfwpF+M3d7D5r7rGReUuW3Iflls G/Oh8fhpi26fqmSy6l/DfMTqeiGP/NxAD3xv4fBtTnLr/2wCV3VoIv5AL9/mxrK4mVIJ iMhsIHNGKiT9+48mmMbqG3LvvujoWLuqxTTaBcpOUFuf0Lhij1wGiXXMAf6j6fGQ9cbm zmsdDDAc3ZZRLaIC+4V/mKkDgJk3Mj1bMUPHD/B8Nw2E4Yvpz7VJhj/VDJByZ6tVUlWl 5o4xdxtuCwIdB/pWfMPhHVul9DMj8PT0HNk5bMFvw5VQvoax2kpziOolrPDG3WPTtgAL eKSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705068136; x=1705672936; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eEILIInaRE1Jo+ikjAVm+GwK5HxHOMFfTD8MoghY3lI=; b=KwQZlArh2+mCADOkRia6wcDHdmTB7MksgbzgvgfO6FxDqH7VqAwsl/l6ByGr32vCVk J7hFE1F1NwPvPEIa40gH1q3Y4VICNwYkOSKrPocGINP/4NJgECT/5aVXkLtLa8MKoec0 c4ZoZe1NI/Kxh2Pb7Q03t/5EVuoxWZzMoSxRonaRNdgVbE2UhpqJSBPYihYLaDeudawC mOY+T0zC+nt2W7/dsxrNraqJsiA8uXgUmlBoOfQvqv5uE3TaTDWSHv2xZezEdZ3rhedh jxec8EJQ6aCn1MteonYtaJVFQ0hJLqzQyB0n0vagWjhv2h/7JvFB1RZ4oxzen+Dr2fY2 isJA== X-Gm-Message-State: AOJu0YwLm3FuERlLtjug22qXB8BUaSu5R5xLXq39b9KMkgc+mDPmiz4k 0iNNyJtK2ejB7TmxmUHvIqZRUJg9vs/Ar9HCrypFVkifqN75bA== X-Google-Smtp-Source: AGHT+IFy3Nj5ljz9PHmk0Avt0h39x2tiQ27jyGWoPSUvYIUO6VzjBYLTaN7u3EbE79lpNyS3Uo9J/w== X-Received: by 2002:a17:902:d64e:b0:1d5:a0a6:c40c with SMTP id y14-20020a170902d64e00b001d5a0a6c40cmr745355plh.6.1705068136505; Fri, 12 Jan 2024 06:02:16 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id t5-20020a1709028c8500b001cf6453b237sm3116927plo.236.2024.01.12.06.02.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:02:16 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza , Vladimir Isaev Subject: [PATCH v5 2/8] target/riscv: move 'cbom_blocksize' to riscv_cpu_properties[] Date: Fri, 12 Jan 2024 11:01:55 -0300 Message-ID: <20240112140201.127083-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112140201.127083-1-dbarboza@ventanamicro.com> References: <20240112140201.127083-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org After adding a KVM finalize() implementation, turn cbom_blocksize into a class property. Follow the same design we used with 'vlen' and 'elen'. The duplicated 'cbom_blocksize' KVM property can be removed from kvm_riscv_add_cpu_user_properties(). Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Tested-by: Vladimir Isaev --- target/riscv/cpu.c | 39 +++++++++++++++++++++++++++++++++++++- target/riscv/kvm/kvm-cpu.c | 4 ---- 2 files changed, 38 insertions(+), 5 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index d64fce5a73..0391f16e28 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1321,6 +1321,7 @@ static void riscv_cpu_init(Object *obj) cpu->cfg.pmu_mask = MAKE_64BIT_MASK(3, 16); cpu->cfg.vlen = 128; cpu->cfg.elen = 64; + cpu->cfg.cbom_blocksize = 64; cpu->env.vext_ver = VEXT_VERSION_1_00_0; } @@ -1872,8 +1873,42 @@ static const PropertyInfo prop_elen = { .set = prop_elen_set, }; +static void prop_cbom_blksize_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + RISCVCPU *cpu = RISCV_CPU(obj); + uint16_t value; + + if (!visit_type_uint16(v, name, &value, errp)) { + return; + } + + if (value != cpu->cfg.cbom_blocksize && riscv_cpu_is_vendor(obj)) { + cpu_set_prop_err(cpu, name, errp); + error_append_hint(errp, "Current '%s' val: %u\n", + name, cpu->cfg.cbom_blocksize); + return; + } + + cpu_option_add_user_setting(name, value); + cpu->cfg.cbom_blocksize = value; +} + +static void prop_cbom_blksize_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint16_t value = RISCV_CPU(obj)->cfg.cbom_blocksize; + + visit_type_uint16(v, name, &value, errp); +} + +static const PropertyInfo prop_cbom_blksize = { + .name = "cbom_blocksize", + .get = prop_cbom_blksize_get, + .set = prop_cbom_blksize_set, +}; + Property riscv_cpu_options[] = { - DEFINE_PROP_UINT16("cbom_blocksize", RISCVCPU, cfg.cbom_blocksize, 64), DEFINE_PROP_UINT16("cbop_blocksize", RISCVCPU, cfg.cbop_blocksize, 64), DEFINE_PROP_UINT16("cboz_blocksize", RISCVCPU, cfg.cboz_blocksize, 64), @@ -1962,6 +1997,8 @@ static Property riscv_cpu_properties[] = { {.name = "vlen", .info = &prop_vlen}, {.name = "elen", .info = &prop_elen}, + {.name = "cbom_blocksize", .info = &prop_cbom_blksize}, + #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), #endif diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index dc0466df69..094bc5f47c 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -493,10 +493,6 @@ static void kvm_riscv_add_cpu_user_properties(Object *cpu_obj) NULL, multi_cfg); } - object_property_add(cpu_obj, "cbom_blocksize", "uint16", - NULL, kvm_cpu_set_cbomz_blksize, - NULL, &kvm_cbom_blocksize); - object_property_add(cpu_obj, "cboz_blocksize", "uint16", NULL, kvm_cpu_set_cbomz_blksize, NULL, &kvm_cboz_blocksize); From patchwork Fri Jan 12 14:01:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1886127 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=WaTt3ESV; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TBNZD4gGXz1yP3 for ; Sat, 13 Jan 2024 01:04:20 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOI78-00040R-QF; Fri, 12 Jan 2024 09:02:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOI75-0003y4-BP for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:23 -0500 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOI73-0005pu-GZ for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:22 -0500 Received: by mail-pl1-x62a.google.com with SMTP id d9443c01a7336-1d54b763d15so32977405ad.0 for ; Fri, 12 Jan 2024 06:02:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705068139; x=1705672939; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3AxxIze3Hqx7PnD8MMH/lnxGiGJCFGHgXBnisoTkwaY=; b=WaTt3ESVQ+2GyQslhDBXd2S5PGWNAjZZuC5WeoU42rkdPgkjwaOKRe6t0gwJR05gQp 5NGcyIVQ+WBRjRnVWzigP8jqL0CxLwfgYGCiOkpBlk2zRloXmzLRrq+fMVA3bNqQr1cO sPgvRb00cn9mtcW+A6iCtVFJMqBuur97MAI6vchsNL/84+E1E6XkL2XjgxrN9FGbBcCf i6gvjKNwCyCb/bJVZfMWSrg9F4Gt/VjhQfHSe5ljj0PFCjUeTWlkk+Bsdaf0H6spkcHw 8eKIUP8CBtB6HCd3T1OAWVioIV/pHzrKgigPuSqSJLrCWJEno8dD4p7R4GNUbtun9m0u thcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705068139; x=1705672939; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3AxxIze3Hqx7PnD8MMH/lnxGiGJCFGHgXBnisoTkwaY=; b=LsbwZfb0s814w2A3HHHN66yUc/VgZQYg7c353Y2lznBUSyuLLqYI6HTXPXgCCnSQiZ QnpH4Oa6QrOEX4vFFGAvmuAiLGomhVdhA70ogNNcpWqyHvsrlOUgjJ7CowJPcWRnvSIr cT3iSFeVavYPyErNEYd4JrS0X+iU+8W964TNm54eCSCh0J/8o+hXJbBDZr9LtzxIwSNt LI2j7W93HUPmapjGTFapZjJ32vmT/z20dVrOrdhlPzObjFslwMiQAbNSgzSFiuZfBLc5 cOYQfv7YzO7sXctjbMobzPhLqdvFvBpn4P98zoIX2WX0VW+5hmqBf0Fxs+5xO59B41SN CmWw== X-Gm-Message-State: AOJu0Yzqtt+e94ROu8aZYw7FsVlLabmiXsNioDlgutm1HguUciXXDbzt Pc0oEX8OIPxm3qjsS+XqhT40xzSFHpGCEq6l+nDtyQwmVC/zFg== X-Google-Smtp-Source: AGHT+IGG8C+T/3NcTdNFKgJ6s9LABnsFHEXewcnBuLMQUfdf2gVniQ+Midip4jbE/kPeOWn1xdFUgw== X-Received: by 2002:a17:903:260e:b0:1d5:9b12:fd52 with SMTP id jd14-20020a170903260e00b001d59b12fd52mr905120plb.83.1705068139559; Fri, 12 Jan 2024 06:02:19 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id t5-20020a1709028c8500b001cf6453b237sm3116927plo.236.2024.01.12.06.02.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:02:19 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza , Vladimir Isaev Subject: [PATCH v5 3/8] target/riscv: move 'cbop_blocksize' to riscv_cpu_properties[] Date: Fri, 12 Jan 2024 11:01:56 -0300 Message-ID: <20240112140201.127083-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112140201.127083-1-dbarboza@ventanamicro.com> References: <20240112140201.127083-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Do the same we did with 'cbom_blocksize' in the previous patch. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Tested-by: Vladimir Isaev --- target/riscv/cpu.c | 38 +++++++++++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 0391f16e28..8976dc26a3 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1322,6 +1322,7 @@ static void riscv_cpu_init(Object *obj) cpu->cfg.vlen = 128; cpu->cfg.elen = 64; cpu->cfg.cbom_blocksize = 64; + cpu->cfg.cbop_blocksize = 64; cpu->env.vext_ver = VEXT_VERSION_1_00_0; } @@ -1908,8 +1909,42 @@ static const PropertyInfo prop_cbom_blksize = { .set = prop_cbom_blksize_set, }; +static void prop_cbop_blksize_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + RISCVCPU *cpu = RISCV_CPU(obj); + uint16_t value; + + if (!visit_type_uint16(v, name, &value, errp)) { + return; + } + + if (value != cpu->cfg.cbop_blocksize && riscv_cpu_is_vendor(obj)) { + cpu_set_prop_err(cpu, name, errp); + error_append_hint(errp, "Current '%s' val: %u\n", + name, cpu->cfg.cbop_blocksize); + return; + } + + cpu_option_add_user_setting(name, value); + cpu->cfg.cbop_blocksize = value; +} + +static void prop_cbop_blksize_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint16_t value = RISCV_CPU(obj)->cfg.cbop_blocksize; + + visit_type_uint16(v, name, &value, errp); +} + +static const PropertyInfo prop_cbop_blksize = { + .name = "cbop_blocksize", + .get = prop_cbop_blksize_get, + .set = prop_cbop_blksize_set, +}; + Property riscv_cpu_options[] = { - DEFINE_PROP_UINT16("cbop_blocksize", RISCVCPU, cfg.cbop_blocksize, 64), DEFINE_PROP_UINT16("cboz_blocksize", RISCVCPU, cfg.cboz_blocksize, 64), DEFINE_PROP_END_OF_LIST(), @@ -1998,6 +2033,7 @@ static Property riscv_cpu_properties[] = { {.name = "elen", .info = &prop_elen}, {.name = "cbom_blocksize", .info = &prop_cbom_blksize}, + {.name = "cbop_blocksize", .info = &prop_cbop_blksize}, #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), From patchwork Fri Jan 12 14:01:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1886128 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=JlntuWQJ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TBNZF3dXtz1yQ1 for ; Sat, 13 Jan 2024 01:04:21 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOI7C-00041L-01; Fri, 12 Jan 2024 09:02:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOI78-00040C-4y for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:26 -0500 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOI76-0005qo-Fa for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:25 -0500 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-1d3eae5c1d7so36704005ad.2 for ; Fri, 12 Jan 2024 06:02:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705068143; x=1705672943; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tUjZzYJ5AXvpsVQ3nGeKnk+ExcciChRIgPNJ0TDDNuA=; b=JlntuWQJ5IaHG5ZvNawjjfbRQyLtWIB7BtH+1sFG89BOm5C6ioDYS5V+8UzgB3pCzH zsNuIk+gFfhErMqbhMR9d50ho32fRrEMX3SO0WUQ8jJ778yWHMhgJYuE7s//wHTdymc6 UZOQOz7dvAJ9lGlwEKGmLkWjxU7fzNGca+V6T4wcJHtZbdXOakpzB4shCDyOUUfjxcAB V13y2STB/wumvmgHCHznk2l/90FwZd+ofH4fzri+PaAAsvk3tTGCe2S+B2nLwwp1B1Ho sFytyOUuPLtqhx6MpD0Sz6Qbt6WoJnfOZx9H+HuD+ui0K8HE8ul/DAI7dIHGljEe/+XZ qFIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705068143; x=1705672943; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tUjZzYJ5AXvpsVQ3nGeKnk+ExcciChRIgPNJ0TDDNuA=; b=iwC+ji0P5vYUFWTW6HNzVmbL8poRfHDAKBYiYqVfhO+DZlDdKnh5aDXcBrnxYKWWdz Phi+RCU6Mj7N3dcrij2sxNCRf/qfMdcTguMpLT4+ytGkFHOj3jI510MR2pKHlpIaxLPA 7WK7THGnjS4wsep1LTEKKdLMxKe7CQG/6KcUeQi6riY2Vop0QpGLmufxuJN6TDYmGxjv +8JmcrDjMFQZya9pK8NbgIzh9n541pqGG4TUM6MzDZmu9dVdHNMfKw734kLf2wQaTeBW K3nPtemBfm0XkrGLDP5muXG+V9OBkyOD367kQUdiC2rFr+SR3mTHbli9UpzGT/TEgo7w /Eng== X-Gm-Message-State: AOJu0YzeoB5hLAXAkzoY8PM2uTMwe4NKrpwVUBp0b1MnwNWSovAVlvVi UeAHjm30RuwqVOg+KS13+bp6xnGmglqlh/ffkZ28uIy01BudGw== X-Google-Smtp-Source: AGHT+IF47w1OyY/JCkDPJpxyCKSoA+RFRGO69K9sgn2g8gdwKEEZ9ea9TE2lMY6wa73i6D2j+4RikA== X-Received: by 2002:a17:902:e541:b0:1d4:11a8:a2a8 with SMTP id n1-20020a170902e54100b001d411a8a2a8mr1043571plf.57.1705068142740; Fri, 12 Jan 2024 06:02:22 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id t5-20020a1709028c8500b001cf6453b237sm3116927plo.236.2024.01.12.06.02.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:02:22 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza , Vladimir Isaev Subject: [PATCH v5 4/8] target/riscv: move 'cboz_blocksize' to riscv_cpu_properties[] Date: Fri, 12 Jan 2024 11:01:57 -0300 Message-ID: <20240112140201.127083-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112140201.127083-1-dbarboza@ventanamicro.com> References: <20240112140201.127083-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org And remove the now unused kvm_cpu_set_cbomz_blksize() setter. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Tested-by: Vladimir Isaev --- target/riscv/cpu.c | 38 +++++++++++++++++++++++++++++++++++++- target/riscv/kvm/kvm-cpu.c | 28 ---------------------------- 2 files changed, 37 insertions(+), 29 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 8976dc26a3..ce4fdfaf0e 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1323,6 +1323,7 @@ static void riscv_cpu_init(Object *obj) cpu->cfg.elen = 64; cpu->cfg.cbom_blocksize = 64; cpu->cfg.cbop_blocksize = 64; + cpu->cfg.cboz_blocksize = 64; cpu->env.vext_ver = VEXT_VERSION_1_00_0; } @@ -1944,8 +1945,42 @@ static const PropertyInfo prop_cbop_blksize = { .set = prop_cbop_blksize_set, }; +static void prop_cboz_blksize_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + RISCVCPU *cpu = RISCV_CPU(obj); + uint16_t value; + + if (!visit_type_uint16(v, name, &value, errp)) { + return; + } + + if (value != cpu->cfg.cboz_blocksize && riscv_cpu_is_vendor(obj)) { + cpu_set_prop_err(cpu, name, errp); + error_append_hint(errp, "Current '%s' val: %u\n", + name, cpu->cfg.cboz_blocksize); + return; + } + + cpu_option_add_user_setting(name, value); + cpu->cfg.cboz_blocksize = value; +} + +static void prop_cboz_blksize_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint16_t value = RISCV_CPU(obj)->cfg.cboz_blocksize; + + visit_type_uint16(v, name, &value, errp); +} + +static const PropertyInfo prop_cboz_blksize = { + .name = "cboz_blocksize", + .get = prop_cboz_blksize_get, + .set = prop_cboz_blksize_set, +}; + Property riscv_cpu_options[] = { - DEFINE_PROP_UINT16("cboz_blocksize", RISCVCPU, cfg.cboz_blocksize, 64), DEFINE_PROP_END_OF_LIST(), }; @@ -2034,6 +2069,7 @@ static Property riscv_cpu_properties[] = { {.name = "cbom_blocksize", .info = &prop_cbom_blksize}, {.name = "cbop_blocksize", .info = &prop_cbop_blksize}, + {.name = "cboz_blocksize", .info = &prop_cboz_blksize}, #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 094bc5f47c..748a690b73 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -352,30 +352,6 @@ static KVMCPUConfig kvm_cboz_blocksize = { .kvm_reg_id = KVM_REG_RISCV_CONFIG_REG(zicboz_block_size) }; -static void kvm_cpu_set_cbomz_blksize(Object *obj, Visitor *v, - const char *name, - void *opaque, Error **errp) -{ - KVMCPUConfig *cbomz_cfg = opaque; - RISCVCPU *cpu = RISCV_CPU(obj); - uint16_t value, *host_val; - - if (!visit_type_uint16(v, name, &value, errp)) { - return; - } - - host_val = kvmconfig_get_cfg_addr(cpu, cbomz_cfg); - - if (value != *host_val) { - error_report("Unable to set %s to a different value than " - "the host (%u)", - cbomz_cfg->name, *host_val); - exit(EXIT_FAILURE); - } - - cbomz_cfg->user_set = true; -} - static void kvm_riscv_update_cpu_cfg_isa_ext(RISCVCPU *cpu, CPUState *cs) { CPURISCVState *env = &cpu->env; @@ -493,10 +469,6 @@ static void kvm_riscv_add_cpu_user_properties(Object *cpu_obj) NULL, multi_cfg); } - object_property_add(cpu_obj, "cboz_blocksize", "uint16", - NULL, kvm_cpu_set_cbomz_blksize, - NULL, &kvm_cboz_blocksize); - riscv_cpu_add_kvm_unavail_prop_array(cpu_obj, riscv_cpu_extensions); riscv_cpu_add_kvm_unavail_prop_array(cpu_obj, riscv_cpu_vendor_exts); riscv_cpu_add_kvm_unavail_prop_array(cpu_obj, riscv_cpu_experimental_exts); From patchwork Fri Jan 12 14:01:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1886126 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=FiamW92/; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TBNYv2KgQz1yQ1 for ; Sat, 13 Jan 2024 01:04:03 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOI7E-00043f-9e; Fri, 12 Jan 2024 09:02:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOI7C-00041w-VH for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:30 -0500 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOI7A-0005rE-Gl for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:29 -0500 Received: by mail-pl1-x62c.google.com with SMTP id d9443c01a7336-1d4ca2fd2fbso37190315ad.2 for ; Fri, 12 Jan 2024 06:02:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705068146; x=1705672946; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=di00vhBKsSZDlg6WkglKu0DdymzljpcChw9HjOV50Tc=; b=FiamW92/txqaAkXT9NNKp0zPmJnXwaOStlm9hMefxqHlM8idiDzPGCsJtQK9BT3ikk XNY5n3TbXNdHtuRRbrmhVM6crJCJLhYfRwCxqSiYmWgbIg/MmioeS8R+xpYbtA7kPyec bEG84TC0XEuFLlJdl2KVLwtln+bnrYtW+lRU2vfPm6/rITE1C9j7ELJMR5pZ5hX5uNvZ XfEIfZi0QMJYDLaPFtdcWWmo+x6AkTqnsnWEqFA02TD6R4FsQM9Yp+18e5o5GbPzTjRm 0dXw1YOhLlMZvTxv6rPz0JUdbToM0bkLMoZbqsc3kNl6vHjSGt2N14wUgpuS6xqED+Is jcDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705068146; x=1705672946; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=di00vhBKsSZDlg6WkglKu0DdymzljpcChw9HjOV50Tc=; b=cL37V1qKtUoF2llI4YwVX8VR2SVaK/oRxLO47QYYRGq6n1uExlRzLCV7I76+guE2F5 67mqjnl1dXXyzIUBVJd3fNBqg1xnRDUnrCME5IbJr17YiGlXvmlj0tI/HujwYLbgXNg6 TgMI8crtX9PfkeS0DK+lF7NMeIGuCg3q6/dcl/AU0WLoDjz+DG+DgAR2acRxvbWgR1Pm 3rvJ7yiRy6gUxsts8xo7Ir77SclZhX6XM++wtecArlYKR8YgNkTXVPgKKj3G7Ws0j4tf fi5d4uoKVNVZ6OlxXIHDXX/32Ka/QidErrZmLfgqqSDxYwW7AAf20M3cgWtL0CPnk1lO 1JAw== X-Gm-Message-State: AOJu0YzXLaODWYRVAeEDOV8f5jG/NDGpyzuYlMqL/WXPqvf4+MaiC3kr I8p/mwhjqMzDARB+7xFrsFLzJ6FRpGxwhbUNcwOBeyHKcDaT+w== X-Google-Smtp-Source: AGHT+IEdlDd4qzphxdpeurAd8xoOaMClXCtER240QxTHhLv3MJL1YIxuZr7NEjLAepq9iAM678/8xw== X-Received: by 2002:a17:902:c3c1:b0:1d5:7a46:920f with SMTP id j1-20020a170902c3c100b001d57a46920fmr746086plj.18.1705068145721; Fri, 12 Jan 2024 06:02:25 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id t5-20020a1709028c8500b001cf6453b237sm3116927plo.236.2024.01.12.06.02.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:02:25 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza , Vladimir Isaev Subject: [PATCH v5 5/8] target/riscv: remove riscv_cpu_options[] Date: Fri, 12 Jan 2024 11:01:58 -0300 Message-ID: <20240112140201.127083-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112140201.127083-1-dbarboza@ventanamicro.com> References: <20240112140201.127083-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The array is empty and can be removed. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Tested-by: Vladimir Isaev --- target/riscv/cpu.c | 5 ----- target/riscv/cpu.h | 1 - target/riscv/kvm/kvm-cpu.c | 9 --------- target/riscv/tcg/tcg-cpu.c | 4 ---- 4 files changed, 19 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index ce4fdfaf0e..be5fa13df1 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1980,11 +1980,6 @@ static const PropertyInfo prop_cboz_blksize = { .set = prop_cboz_blksize_set, }; -Property riscv_cpu_options[] = { - - DEFINE_PROP_END_OF_LIST(), -}; - /* * RVA22U64 defines some 'named features' or 'synthetic extensions' * that are cache related: Za64rs, Zic64b, Ziccif, Ziccrse, Ziccamoa diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 2dc28429e6..0ed6879a9b 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -790,7 +790,6 @@ extern const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[]; extern const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[]; extern const RISCVCPUMultiExtConfig riscv_cpu_named_features[]; extern const RISCVCPUMultiExtConfig riscv_cpu_deprecated_exts[]; -extern Property riscv_cpu_options[]; typedef struct isa_ext_data { const char *name; diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 748a690b73..4dec91740b 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -1527,19 +1527,10 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift, static void kvm_cpu_instance_init(CPUState *cs) { Object *obj = OBJECT(RISCV_CPU(cs)); - DeviceState *dev = DEVICE(obj); riscv_init_kvm_registers(obj); kvm_riscv_add_cpu_user_properties(obj); - - for (Property *prop = riscv_cpu_options; prop && prop->name; prop++) { - /* Check if we have a specific KVM handler for the option */ - if (object_property_find(obj, prop->name)) { - continue; - } - qdev_property_add_static(dev, prop); - } } /* diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index daff0b8f60..ea68182426 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -1301,10 +1301,6 @@ static void riscv_cpu_add_user_properties(Object *obj) riscv_cpu_add_multiext_prop_array(obj, riscv_cpu_deprecated_exts); riscv_cpu_add_profiles(obj); - - for (Property *prop = riscv_cpu_options; prop && prop->name; prop++) { - qdev_property_add_static(DEVICE(obj), prop); - } } /* From patchwork Fri Jan 12 14:01:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1886130 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=MouFdNNZ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TBNZT586Rz1yP3 for ; Sat, 13 Jan 2024 01:04:33 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOI7G-00044K-4s; Fri, 12 Jan 2024 09:02:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOI7E-00043t-Hn for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:32 -0500 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOI7C-0005u9-HG for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:32 -0500 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-1d3eb299e2eso42122165ad.2 for ; Fri, 12 Jan 2024 06:02:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705068148; x=1705672948; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pWiUWuH45Jmv7NBrPssakc1tKisLjOt8ZUPrvR2h+lM=; b=MouFdNNZUYCviSiZg6JY4h+suJX9GBb6bsYYmKOtoXaMeRedZ/AO4UbOamly07lFvo 6hex0CQykQwIbara+uVhoyFZDNDVbLzoFltaNovrAtEjphUr4VF9rOL8YmK3Yt0AiHjl IJS1ssQDRQKeBXXv/BF14yZhOAA2W7u8VBSkovHl0vK/Amm7zceRz0YBM0v3UYC9HcxC yr73Nm6y7SBupRUTg8RsQ8WBIoDCP4w8wGGPZbiAsGaO+cSvLlk8ks0ceTM+HJRAAIRV tg3/epAm/j9uzVIsqo5lVo/uzhzdVf+Phz9g8RwLDbpcbK/saX2vIcUMOvwORsxz2dx7 dwIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705068148; x=1705672948; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pWiUWuH45Jmv7NBrPssakc1tKisLjOt8ZUPrvR2h+lM=; b=EsxyFG/B2xkitESYcfscqEqY2O0MNL+pLAhsRkhQ0qjuRdXzc8ZCyUQblbInsLd6My 6s9nyDc1IwloNz0gBOD8h7JBzX7jm8ygx+MOTVtkglpkR8hfnoo8SRWG8D+UYk8p0qKG AxkkelvhiRY4JjJFWxnqEN6nOfcIgyAIELzm8AjBcbTrScardyGIb/9CKTAySiWRp181 KBD6GvVXf76bAptpsvpJDeCpz46pBzMzxYL0u6gHi88HXLYvv4Y6ISv9ZkPDsvAGkxpZ SSQH2s3s+pOT1GjiDO/0KkDBvhHpsMUiQ2EPdmtoc4h5EgCzfJL598RZk6ezEXiF9+6v opTg== X-Gm-Message-State: AOJu0Yy2zQcQdReFGzZJRAK043wLS8EGSQD5mbJMefEOAr/B+TiXKBGn lqdlL1BZCSMh0Onfvri0LBXuaB+dgcnjuPvJXyF18bBKBQEB8g== X-Google-Smtp-Source: AGHT+IHNc/PAn5xzMhFYYqTxOyutQz+y9NcMs04Ai/bqUkZyjJJJH7DdVj2nC2Em0fFXlGfAI9S++A== X-Received: by 2002:a17:902:f681:b0:1d5:6648:5f1 with SMTP id l1-20020a170902f68100b001d5664805f1mr964047plg.36.1705068148673; Fri, 12 Jan 2024 06:02:28 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id t5-20020a1709028c8500b001cf6453b237sm3116927plo.236.2024.01.12.06.02.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:02:28 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza , Vladimir Isaev Subject: [PATCH v5 6/8] target/riscv/cpu.c: move 'mvendorid' to riscv_cpu_properties[] Date: Fri, 12 Jan 2024 11:01:59 -0300 Message-ID: <20240112140201.127083-7-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112140201.127083-1-dbarboza@ventanamicro.com> References: <20240112140201.127083-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Keep all class properties in riscv_cpu_properties[]. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Tested-by: Vladimir Isaev --- target/riscv/cpu.c | 69 +++++++++++++++++++++++++--------------------- 1 file changed, 37 insertions(+), 32 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index be5fa13df1..3adc3a04f8 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1980,6 +1980,41 @@ static const PropertyInfo prop_cboz_blksize = { .set = prop_cboz_blksize_set, }; +static void prop_mvendorid_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + bool dynamic_cpu = riscv_cpu_is_dynamic(obj); + RISCVCPU *cpu = RISCV_CPU(obj); + uint32_t prev_val = cpu->cfg.mvendorid; + uint32_t value; + + if (!visit_type_uint32(v, name, &value, errp)) { + return; + } + + if (!dynamic_cpu && prev_val != value) { + error_setg(errp, "Unable to change %s mvendorid (0x%x)", + object_get_typename(obj), prev_val); + return; + } + + cpu->cfg.mvendorid = value; +} + +static void prop_mvendorid_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint32_t value = RISCV_CPU(obj)->cfg.mvendorid; + + visit_type_uint32(v, name, &value, errp); +} + +static const PropertyInfo prop_mvendorid = { + .name = "mvendorid", + .get = prop_mvendorid_get, + .set = prop_mvendorid_set, +}; + /* * RVA22U64 defines some 'named features' or 'synthetic extensions' * that are cache related: Za64rs, Zic64b, Ziccif, Ziccrse, Ziccamoa @@ -2066,6 +2101,8 @@ static Property riscv_cpu_properties[] = { {.name = "cbop_blocksize", .info = &prop_cbop_blksize}, {.name = "cboz_blocksize", .info = &prop_cboz_blksize}, + {.name = "mvendorid", .info = &prop_mvendorid}, + #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), #endif @@ -2146,35 +2183,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { }; #endif -static void cpu_set_mvendorid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - bool dynamic_cpu = riscv_cpu_is_dynamic(obj); - RISCVCPU *cpu = RISCV_CPU(obj); - uint32_t prev_val = cpu->cfg.mvendorid; - uint32_t value; - - if (!visit_type_uint32(v, name, &value, errp)) { - return; - } - - if (!dynamic_cpu && prev_val != value) { - error_setg(errp, "Unable to change %s mvendorid (0x%x)", - object_get_typename(obj), prev_val); - return; - } - - cpu->cfg.mvendorid = value; -} - -static void cpu_get_mvendorid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - uint32_t value = RISCV_CPU(obj)->cfg.mvendorid; - - visit_type_uint32(v, name, &value, errp); -} - static void cpu_set_mimpid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -2284,9 +2292,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->gdb_arch_name = riscv_gdb_arch_name; cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml; - object_class_property_add(c, "mvendorid", "uint32", cpu_get_mvendorid, - cpu_set_mvendorid, NULL, NULL); - object_class_property_add(c, "mimpid", "uint64", cpu_get_mimpid, cpu_set_mimpid, NULL, NULL); From patchwork Fri Jan 12 14:02:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1886124 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=kY1w8LMo; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TBNYv0qvTz1yP3 for ; Sat, 13 Jan 2024 01:04:03 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOI7N-00048f-NB; Fri, 12 Jan 2024 09:02:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOI7H-00045U-LI for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:38 -0500 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOI7F-00060Z-NH for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:35 -0500 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-1d426ad4433so43168475ad.0 for ; Fri, 12 Jan 2024 06:02:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705068151; x=1705672951; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dTdGOl9slcZkcRMyhG4duGeAzjUzLWjR8F5t/SxIbuQ=; b=kY1w8LMoutBh5GvxxBtYMVX8IGAmUDvdoqNBOxzDpP7IAY0G18HQUB+15ANxkvqrVh SeifhNa3Jz2yQNy+KCacz9fXPV5taDK7qKnvOWTj9wretRW4tHAGIbnxBhjDB/Ep+agD qY5MRm78mITOCbBE5bjCIGPNqDyiffOEtojr/fDyQhlPMWC3w+hBnYtn5kwB+cdOs+Xi p/iGI06H1iDzb7fi8F2v4P0ImtJNOVXCnTAb4B8wVfqVw/+nh6K5z7V1ZPmQ7CCu/uuy WMBURP8BI2+Sdz3Jm+zTX3wfQ7lJVoyeAl+a+xU1I8uVTQscN7k6hcJpwKitv3tvBYC4 2KiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705068151; x=1705672951; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dTdGOl9slcZkcRMyhG4duGeAzjUzLWjR8F5t/SxIbuQ=; b=e2sLcCVN5Cf8/2zX36584cIGnIocoWgHjAHwYuiLb2YUctDFYmvvqPdag3tyF3a6kc FhrOLfg0ceQlXwDaiLsNOwOCc37imXYqN9qtQpe9ORXz6YWWrwMiAMj1v2sPO488FWOD g8Ubs3zi0heZjhmTbpmJ6BGU89zr6gOBM05sGD/aYzDGwMMP3FjUNZj7ORoXRT3jCBu5 ItCZSAkOn5P8pl0PruvWWiFzqu9ILOdiZS/ZVVeKfyCSb/dq/s3CGHhqE8uK+vIHJwMP weTfLZXcR89IBn+5gwwS33y3wwyAGxgGM0SgW/Udz+QzX3gi6jnVoaIkmxOzf93tcg1+ yFPQ== X-Gm-Message-State: AOJu0Yx6fTOMSCz/ty/c7JH+PxJ+g3xCpo/twgWgZgM5TLN12ct50vgM 9FwtNXYd7s3mGQXmcrfI2P00WgOk7kazE01rxJ8+2/+Uuosh7g== X-Google-Smtp-Source: AGHT+IEhjHIRhjBwt2KokMMHci8G8VatSp8O2awaWSFk3DBXzLA7XD+N7eAKB0FJg07Iq7Hd45hKCw== X-Received: by 2002:a17:902:8214:b0:1d5:844:da22 with SMTP id x20-20020a170902821400b001d50844da22mr778108pln.15.1705068151608; Fri, 12 Jan 2024 06:02:31 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id t5-20020a1709028c8500b001cf6453b237sm3116927plo.236.2024.01.12.06.02.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:02:31 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza , Vladimir Isaev Subject: [PATCH v5 7/8] target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[] Date: Fri, 12 Jan 2024 11:02:00 -0300 Message-ID: <20240112140201.127083-8-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112140201.127083-1-dbarboza@ventanamicro.com> References: <20240112140201.127083-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Keep all class properties in riscv_cpu_properties[]. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Tested-by: Vladimir Isaev --- target/riscv/cpu.c | 68 ++++++++++++++++++++++++---------------------- 1 file changed, 36 insertions(+), 32 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 3adc3a04f8..ab77649c4c 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2015,6 +2015,41 @@ static const PropertyInfo prop_mvendorid = { .set = prop_mvendorid_set, }; +static void prop_mimpid_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + bool dynamic_cpu = riscv_cpu_is_dynamic(obj); + RISCVCPU *cpu = RISCV_CPU(obj); + uint64_t prev_val = cpu->cfg.mimpid; + uint64_t value; + + if (!visit_type_uint64(v, name, &value, errp)) { + return; + } + + if (!dynamic_cpu && prev_val != value) { + error_setg(errp, "Unable to change %s mimpid (0x%" PRIu64 ")", + object_get_typename(obj), prev_val); + return; + } + + cpu->cfg.mimpid = value; +} + +static void prop_mimpid_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint64_t value = RISCV_CPU(obj)->cfg.mimpid; + + visit_type_uint64(v, name, &value, errp); +} + +static const PropertyInfo prop_mimpid = { + .name = "mimpid", + .get = prop_mimpid_get, + .set = prop_mimpid_set, +}; + /* * RVA22U64 defines some 'named features' or 'synthetic extensions' * that are cache related: Za64rs, Zic64b, Ziccif, Ziccrse, Ziccamoa @@ -2102,6 +2137,7 @@ static Property riscv_cpu_properties[] = { {.name = "cboz_blocksize", .info = &prop_cboz_blksize}, {.name = "mvendorid", .info = &prop_mvendorid}, + {.name = "mimpid", .info = &prop_mimpid}, #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), @@ -2183,35 +2219,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { }; #endif -static void cpu_set_mimpid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - bool dynamic_cpu = riscv_cpu_is_dynamic(obj); - RISCVCPU *cpu = RISCV_CPU(obj); - uint64_t prev_val = cpu->cfg.mimpid; - uint64_t value; - - if (!visit_type_uint64(v, name, &value, errp)) { - return; - } - - if (!dynamic_cpu && prev_val != value) { - error_setg(errp, "Unable to change %s mimpid (0x%" PRIu64 ")", - object_get_typename(obj), prev_val); - return; - } - - cpu->cfg.mimpid = value; -} - -static void cpu_get_mimpid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - uint64_t value = RISCV_CPU(obj)->cfg.mimpid; - - visit_type_uint64(v, name, &value, errp); -} - static void cpu_set_marchid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -2292,9 +2299,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->gdb_arch_name = riscv_gdb_arch_name; cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml; - object_class_property_add(c, "mimpid", "uint64", cpu_get_mimpid, - cpu_set_mimpid, NULL, NULL); - object_class_property_add(c, "marchid", "uint64", cpu_get_marchid, cpu_set_marchid, NULL, NULL); From patchwork Fri Jan 12 14:02:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1886129 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=DS8dvDpm; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TBNZG3XZjz1yP3 for ; Sat, 13 Jan 2024 01:04:22 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOI7j-0004HS-82; Fri, 12 Jan 2024 09:03:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOI7M-00047S-KN for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:40 -0500 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOI7I-00061A-Lp for qemu-devel@nongnu.org; Fri, 12 Jan 2024 09:02:40 -0500 Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-6db0fdd2b8fso2292084b3a.2 for ; Fri, 12 Jan 2024 06:02:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705068154; x=1705672954; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=R6Q5bivfbiytXNpFrdD9LjBJsQMv6Y1Yl0Gh7cIbpPc=; b=DS8dvDpmvBSymtuHqB/BYxbZd/zj5NnGU0UU7vwOEMxEvM8J6/qkHxk4bG6XzIBrCo qaCfONav5jlLug0uBpjN9n5gQhqwjzZVdbEZ2jcleVtcCbku8sTKPZNTXoFulcuR2HnM G6+9fqejnaY6HYq2IgES65uG5Vt0GTNh8DL55m/ZkJvUcQSZvWoOstPoCt/qFUXmYmEu /hClEfzS1EMIbeY5YQ5pVCVKznI8zaZmmrU7gh05ikOltx92vxRfDdSNslll3g0wwLZ5 5E4fDO+WioLPP3yNRp7339gKej0bUwZrrHWA+E9eCL9uHnCzIf+E3v0FAGnBBgC+HZ/r PvlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705068154; x=1705672954; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=R6Q5bivfbiytXNpFrdD9LjBJsQMv6Y1Yl0Gh7cIbpPc=; b=jZxr+q4CUQeRyhCWHPnHJmBjscsrQ3JcCUdZjMaCIMLdySUz6PifmHTR1s3OX6UGfA Rq7QfeUrsEVfrFtcSdV+I04y6d87nmKLIGgFHexj3dXgLDIFNaSDaZ6Vi2wsiro5T6dL dUxCY6fGmhYP/iFPGMcWZPx3qolEx5w2U29bWpNwz3ynHchc/55eJxDESwk3uY5ltj6D btciv4MU3sEttutBdtwpoiY8TKvSuO1udSuHwBt9Ijtf0/TtLSQBMfKk+5yz9cyXMXGF OOCYQnhau17CSG2sI5slW0Pmy+FB1YIdeFoHVv/jd4d60eIOiebwvFTImSv0ofKWXtRQ qnVg== X-Gm-Message-State: AOJu0YwEHOUe4Wx//l/f04ne2PuYTgZCFLG6qCY3hLJ6FwUVgC0xv+hN B7EDacGuxjeqbt3FqpivSoQ9+YKom2fQ3dgDqqPPGhMCBdhynw== X-Google-Smtp-Source: AGHT+IG2wR5q2exGDH6ColLm3VKvmXPvy17IcIZayzVUdh0t1f9lTxh7d3A6JakyKkDNFx4vauKgLQ== X-Received: by 2002:a17:902:db09:b0:1d5:5742:d163 with SMTP id m9-20020a170902db0900b001d55742d163mr959511plx.108.1705068154560; Fri, 12 Jan 2024 06:02:34 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id t5-20020a1709028c8500b001cf6453b237sm3116927plo.236.2024.01.12.06.02.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:02:34 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza , Vladimir Isaev Subject: [PATCH v5 8/8] target/riscv/cpu.c: move 'marchid' to riscv_cpu_properties[] Date: Fri, 12 Jan 2024 11:02:01 -0300 Message-ID: <20240112140201.127083-9-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112140201.127083-1-dbarboza@ventanamicro.com> References: <20240112140201.127083-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=dbarboza@ventanamicro.com; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Keep all class properties in riscv_cpu_properties[]. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Tested-by: Vladimir Isaev --- target/riscv/cpu.c | 110 +++++++++++++++++++++++---------------------- 1 file changed, 57 insertions(+), 53 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index ab77649c4c..ad1df2318b 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2050,6 +2050,62 @@ static const PropertyInfo prop_mimpid = { .set = prop_mimpid_set, }; +static void prop_marchid_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + bool dynamic_cpu = riscv_cpu_is_dynamic(obj); + RISCVCPU *cpu = RISCV_CPU(obj); + uint64_t prev_val = cpu->cfg.marchid; + uint64_t value, invalid_val; + uint32_t mxlen = 0; + + if (!visit_type_uint64(v, name, &value, errp)) { + return; + } + + if (!dynamic_cpu && prev_val != value) { + error_setg(errp, "Unable to change %s marchid (0x%" PRIu64 ")", + object_get_typename(obj), prev_val); + return; + } + + switch (riscv_cpu_mxl(&cpu->env)) { + case MXL_RV32: + mxlen = 32; + break; + case MXL_RV64: + case MXL_RV128: + mxlen = 64; + break; + default: + g_assert_not_reached(); + } + + invalid_val = 1LL << (mxlen - 1); + + if (value == invalid_val) { + error_setg(errp, "Unable to set marchid with MSB (%u) bit set " + "and the remaining bits zero", mxlen); + return; + } + + cpu->cfg.marchid = value; +} + +static void prop_marchid_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint64_t value = RISCV_CPU(obj)->cfg.marchid; + + visit_type_uint64(v, name, &value, errp); +} + +static const PropertyInfo prop_marchid = { + .name = "marchid", + .get = prop_marchid_get, + .set = prop_marchid_set, +}; + /* * RVA22U64 defines some 'named features' or 'synthetic extensions' * that are cache related: Za64rs, Zic64b, Ziccif, Ziccrse, Ziccamoa @@ -2138,6 +2194,7 @@ static Property riscv_cpu_properties[] = { {.name = "mvendorid", .info = &prop_mvendorid}, {.name = "mimpid", .info = &prop_mimpid}, + {.name = "marchid", .info = &prop_marchid}, #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), @@ -2219,56 +2276,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { }; #endif -static void cpu_set_marchid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - bool dynamic_cpu = riscv_cpu_is_dynamic(obj); - RISCVCPU *cpu = RISCV_CPU(obj); - uint64_t prev_val = cpu->cfg.marchid; - uint64_t value, invalid_val; - uint32_t mxlen = 0; - - if (!visit_type_uint64(v, name, &value, errp)) { - return; - } - - if (!dynamic_cpu && prev_val != value) { - error_setg(errp, "Unable to change %s marchid (0x%" PRIu64 ")", - object_get_typename(obj), prev_val); - return; - } - - switch (riscv_cpu_mxl(&cpu->env)) { - case MXL_RV32: - mxlen = 32; - break; - case MXL_RV64: - case MXL_RV128: - mxlen = 64; - break; - default: - g_assert_not_reached(); - } - - invalid_val = 1LL << (mxlen - 1); - - if (value == invalid_val) { - error_setg(errp, "Unable to set marchid with MSB (%u) bit set " - "and the remaining bits zero", mxlen); - return; - } - - cpu->cfg.marchid = value; -} - -static void cpu_get_marchid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - uint64_t value = RISCV_CPU(obj)->cfg.marchid; - - visit_type_uint64(v, name, &value, errp); -} - static void riscv_cpu_class_init(ObjectClass *c, void *data) { RISCVCPUClass *mcc = RISCV_CPU_CLASS(c); @@ -2299,9 +2306,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->gdb_arch_name = riscv_gdb_arch_name; cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml; - object_class_property_add(c, "marchid", "uint64", cpu_get_marchid, - cpu_set_marchid, NULL, NULL); - device_class_set_props(dc, riscv_cpu_properties); }