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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id m16-20020a7bca50000000b00405d9a950a2sm4335932wml.28.2023.10.19.06.13.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 1/7] hw/ppc/spapr_vio: Realize SPAPR_VIO_BRIDGE device before accessing it Date: Thu, 19 Oct 2023 15:12:59 +0200 Message-ID: <20231019131305.19157-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22b; envelope-from=philmd@linaro.org; helo=mail-lj1-x22b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org qbus_new() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- hw/ppc/spapr_vio.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 9d4fec2c04..f8ef2b6fa8 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -574,13 +574,14 @@ SpaprVioBus *spapr_vio_bus_init(void) /* Create bridge device */ dev = qdev_new(TYPE_SPAPR_VIO_BRIDGE); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Create bus on bridge device */ qbus = qbus_new(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); bus = SPAPR_VIO_BUS(qbus); bus->next_reg = SPAPR_VIO_REG_BASE; + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + /* hcall-vio */ spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal); From patchwork Thu Oct 19 13:13:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1851681 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=jR/NU8jJ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4SB7V80lSJz23kJ for ; Fri, 20 Oct 2023 00:14:40 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qtSr6-0000aR-E5; Thu, 19 Oct 2023 09:14:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qtSq5-0007LQ-2y for qemu-devel@nongnu.org; Thu, 19 Oct 2023 09:13:30 -0400 Received: from mail-lj1-x22e.google.com ([2a00:1450:4864:20::22e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qtSq2-0002Sz-Vn for qemu-devel@nongnu.org; Thu, 19 Oct 2023 09:13:24 -0400 Received: by mail-lj1-x22e.google.com with SMTP id 38308e7fff4ca-2c50cf61f6dso91433421fa.2 for ; Thu, 19 Oct 2023 06:13:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697721201; x=1698326001; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ldJFXb9fdD2sfJu6FP/y4XyBQnTwT0OjDzwlspACaHE=; b=jR/NU8jJ5LO3DqRLNXoJ+YzJfle8KgeLvIYXMMjX/D0Y8mPtOYrgbl+2v5CHjnKDLZ cBm2dK2aOkGktzAY4S8Zd9OQJohNmJcrHBfWIXThz0+O+Ccrqyr2vZBrj/2qeGdTG8ts mcfNwjAs2vf77MyuvsYf9r/oKlM88Ask8dUpm3TA5NcA9/uoMaRz4ztp8OJIbsbBCt3R agRS6zBWTihq7u3Smvf/G0kXar+17je8AaPX6g+8Gc7kd9WjrVbKoXdvH+f9ThkgxJdA ci9TTdz4K1+oDJsjlOyzU+4cZlZkFP5Wrb+dlPjYB7gKIWLN4Aj3seSakzRsyb4D7Ehy rCUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697721201; x=1698326001; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ldJFXb9fdD2sfJu6FP/y4XyBQnTwT0OjDzwlspACaHE=; b=jTs2P9BoumKLUMFA509otan0oOMeMir/nmy/3c2RAaS8GoJ/Eu421D1IDrHyH5JrGI /SFWFLzPcWuLaDebirPkTWzgRxQKEp8JfF7jjyf0fh96FodbuLOfCf83BqATRicBMBFf I8UyuNFhD/e8XpWyG8XWxvpaE7P3tsjYS1yL7knh76yUmo9vP202l+auvkUX1VjVi0Bp gb8BNn72T1dgV3wFrCFzADTPkREVboB4hYuvbKjRFmXWOO26EZ9+isKoxODRhXYreu60 SFu7Es/Vqcn59yadvzSoV/d00ZwT9lilXfHfg5pzSoKPOf/g44y6z1WLgXgEezK9zVRF uALQ== X-Gm-Message-State: AOJu0YwdXyfIj+x7LCrYcdCMx//jFe7ZnKgZO1EEgWOy9Wet/f+SmIXq xIt40CCIBvc02/AnX+nj+XeOIq0+wKHUF3QHDuI0Xw== X-Google-Smtp-Source: AGHT+IGZoh11Uln0OxwxV9e+G1pJ51ZBYlvraf2PQOpg6T2qO8PpNAyNFDq2TIREEcITmteJYBfEdg== X-Received: by 2002:a19:5f53:0:b0:507:a003:57a2 with SMTP id a19-20020a195f53000000b00507a00357a2mr1677205lfj.52.1697721201002; Thu, 19 Oct 2023 06:13:21 -0700 (PDT) Received: from m1x-phil.lan (176-131-216-177.abo.bbox.fr. [176.131.216.177]) by smtp.gmail.com with ESMTPSA id q7-20020adffec7000000b0031980294e9fsm4462971wrs.116.2023.10.19.06.13.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 2/7] hw/ppc/pnv_xscom: Rename pnv_xscom_realize(Error **) -> pnv_xscom_init() Date: Thu, 19 Oct 2023 15:13:00 +0200 Message-ID: <20231019131305.19157-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22e; envelope-from=philmd@linaro.org; helo=mail-lj1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org pnv_xscom_realize() is not used to *realize* QDev object, rename it as pnv_xscom_init(). The Error** argument is unused: remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- include/hw/ppc/pnv_xscom.h | 2 +- hw/ppc/pnv.c | 18 +++--------------- hw/ppc/pnv_xscom.c | 2 +- 3 files changed, 5 insertions(+), 17 deletions(-) diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 9bc6463547..41671001da 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -170,7 +170,7 @@ struct PnvXScomInterfaceClass { #define PNV10_XSCOM_PEC_PCI_BASE 0x8010800 /* index goes upwards ... */ #define PNV10_XSCOM_PEC_PCI_SIZE 0x200 -void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp); +void pnv_xscom_init(PnvChip *chip, uint64_t size); int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset, uint64_t xscom_base, uint64_t xscom_size, const char *compat, int compat_size); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index eb54f93986..456631c9dc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1249,11 +1249,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) assert(chip8->xics); /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); @@ -1512,11 +1508,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV9_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV9_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); @@ -1727,11 +1719,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV10_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV10_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV10_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index d820e05e40..af57b55863 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -221,7 +221,7 @@ const MemoryRegionOps pnv_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; -void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp) +void pnv_xscom_init(PnvChip *chip, uint64_t size) { SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; From patchwork Thu Oct 19 13:13:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1851679 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=TN1ocfb/; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id c16-20020a05600c0ad000b003fee567235bsm4375612wmr.1.2023.10.19.06.13.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 3/7] hw/ppc/pnv_xscom: Move sysbus_mmio_map() call within pnv_xscom_init() Date: Thu, 19 Oct 2023 15:13:01 +0200 Message-ID: <20231019131305.19157-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In order to make the next commit trivial, move sysbus_init_mmio() calls just before the corresponding sysbus_mmio_map() calls. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- include/hw/ppc/pnv_xscom.h | 2 +- hw/ppc/pnv.c | 9 +++------ hw/ppc/pnv_xscom.c | 3 ++- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 41671001da..35b19610f7 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -170,7 +170,7 @@ struct PnvXScomInterfaceClass { #define PNV10_XSCOM_PEC_PCI_BASE 0x8010800 /* index goes upwards ... */ #define PNV10_XSCOM_PEC_PCI_SIZE 0x200 -void pnv_xscom_init(PnvChip *chip, uint64_t size); +void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr); int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset, uint64_t xscom_base, uint64_t xscom_size, const char *compat, int compat_size); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 456631c9dc..10158f7684 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1249,8 +1249,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) assert(chip8->xics); /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV_XSCOM_SIZE, PNV_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { @@ -1508,8 +1507,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV9_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV9_XSCOM_SIZE, PNV9_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { @@ -1719,8 +1717,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV10_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV10_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV10_XSCOM_SIZE, PNV10_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index af57b55863..cf892c9fe8 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -221,7 +221,7 @@ const MemoryRegionOps pnv_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; -void pnv_xscom_init(PnvChip *chip, uint64_t size) +void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr) { SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; @@ -230,6 +230,7 @@ void pnv_xscom_init(PnvChip *chip, uint64_t size) memory_region_init_io(&chip->xscom_mmio, OBJECT(chip), &pnv_xscom_ops, chip, name, size); sysbus_init_mmio(sbd, &chip->xscom_mmio); + sysbus_mmio_map(sbd, 0, addr); memory_region_init(&chip->xscom, OBJECT(chip), name, size); address_space_init(&chip->xscom_as, &chip->xscom, name); From patchwork Thu Oct 19 13:13:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1851690 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=C32TxjN1; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id f19-20020adfb613000000b003232380ffd7sm4431399wre.102.2023.10.19.06.13.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:32 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 4/7] hw/ppc/pnv_xscom: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 15:13:02 +0200 Message-ID: <20231019131305.19157-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- hw/ppc/pnv_xscom.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index cf892c9fe8..805b1d0c87 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -223,14 +223,12 @@ const MemoryRegionOps pnv_xscom_ops = { void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr) { - SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; name = g_strdup_printf("xscom-%x", chip->chip_id); memory_region_init_io(&chip->xscom_mmio, OBJECT(chip), &pnv_xscom_ops, chip, name, size); - sysbus_init_mmio(sbd, &chip->xscom_mmio); - sysbus_mmio_map(sbd, 0, addr); + memory_region_add_subregion(get_system_memory(), addr, &chip->xscom_mmio); memory_region_init(&chip->xscom, OBJECT(chip), name, size); address_space_init(&chip->xscom_as, &chip->xscom, name); From patchwork Thu Oct 19 13:13:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1851688 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=zC0Lta4A; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4SB7Vl64hRz20cx for ; Fri, 20 Oct 2023 00:15:11 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qtSrK-0001lR-Ka; Thu, 19 Oct 2023 09:14:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qtSqS-0007nB-G0 for qemu-devel@nongnu.org; Thu, 19 Oct 2023 09:13:51 -0400 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qtSqL-0002Ws-V0 for qemu-devel@nongnu.org; Thu, 19 Oct 2023 09:13:46 -0400 Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-407c3adef8eso23648355e9.2 for ; Thu, 19 Oct 2023 06:13:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697721219; x=1698326019; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Be57N8xZeT1c4/L41PlRl8GZmps32g61PsDN8JovFx4=; b=zC0Lta4A/5ZMidXyHUzFprlnGVS4yNg01aKZF+5PyicoV/PSrVN2Pn5yJQPuw3JCVl 6A1T0YmEVxDFem/Lh9kegBZpa1wtJ7dgoHCxE4Hu9oAt4b/lLG3nzz4DP+rEuO+qZYIf BQbox6OajUpbLhdra05kIrMO1uN4N+0rOj3LdLdphc36kBFDA4FzIImiyyL2UULBKNzv QWfXwUix63DqwrD4Cow6ThkjzwrIXiRvtvp8qMvV/6VIh16l4br4iIDiMhSctfP4lgw3 23PM6mGwJaKgoXBWF6G7+w0FL/eM9YEV9OMTogonVH9lpkB2ekraBn6vWCQNxnK3j1T6 JTMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697721219; x=1698326019; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Be57N8xZeT1c4/L41PlRl8GZmps32g61PsDN8JovFx4=; b=MUzetiibfkfQwR7I9CmnbfRovk8RveNangLMDEP8CWz0VyOKIPcFtEw6x5OosWd/iU 9wGdzHfXDO60fAEcxnE6COAlgNqXKdlfzGhoTMnZMkATdPrHZWUX6se1rrYXV3Tl9Tft X4dIM4wQTgr983MFjgDAyYGvN4eDkzjolgz51iRnwfupUyLU7heUEVkaeKxlkeweFvFh UqgVg8EeL0LjP9bo99AaCfKA8zAzKOCVwaMO/5/6BjRh7g+WeD9M+LZTgy6jyAphqd6a owuaJ3Ne4tVXt+XDnnkvffAA7DFKEq/xNGFrDzv8bqP7z7cTFNG9GqR6UgzOrHU8bDPa QPhA== X-Gm-Message-State: AOJu0YwOL8QtfS2X7P0o+euUb/CSafFftquzJBGxzbTrqrKgXVLlJYdI sZLHjBFGRCo+1NGBHNbaXs+mKWTQbYE9y7dVgGtx5g== X-Google-Smtp-Source: AGHT+IEfEoHNh/Sd/k1fvpeN5XgBP/L133U3pJV1rKCJlNOa7atRBbglaCzXMrwXZgviZISd48gavQ== X-Received: by 2002:a05:600c:1389:b0:404:7659:ba39 with SMTP id u9-20020a05600c138900b004047659ba39mr1743426wmf.16.1697721218949; Thu, 19 Oct 2023 06:13:38 -0700 (PDT) Received: from m1x-phil.lan (176-131-216-177.abo.bbox.fr. [176.131.216.177]) by smtp.gmail.com with ESMTPSA id f17-20020a05600c155100b00405959bbf4fsm4497832wmg.19.2023.10.19.06.13.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 5/7] hw/ppc/pnv: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 15:13:03 +0200 Message-ID: <20231019131305.19157-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- hw/ppc/pnv.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 10158f7684..c0e34fffbc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1217,10 +1217,9 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp) name = g_strdup_printf("icp-%x", chip->chip_id); memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE); - sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio); g_free(name); - - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip)); + memory_region_add_subregion(get_system_memory(), PNV_ICP_BASE(chip), + &chip8->icp_mmio); /* Map the ICP registers for each thread */ for (i = 0; i < chip->nr_cores; i++) { From patchwork Thu Oct 19 13:13:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1851677 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=j1IZgfB0; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4SB7Tm0z0jz20Zj for ; Fri, 20 Oct 2023 00:14:20 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qtSqi-0008DW-KE; Thu, 19 Oct 2023 09:14:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qtSqU-0007pT-6F for qemu-devel@nongnu.org; Thu, 19 Oct 2023 09:13:52 -0400 Received: from mail-lj1-x22a.google.com ([2a00:1450:4864:20::22a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qtSqS-0002Z8-7z for qemu-devel@nongnu.org; Thu, 19 Oct 2023 09:13:49 -0400 Received: by mail-lj1-x22a.google.com with SMTP id 38308e7fff4ca-2c5071165d5so2235741fa.0 for ; Thu, 19 Oct 2023 06:13:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697721225; x=1698326025; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MvrIYZ1SHVtY4jy7jskbyHF3SwQhysiF+69uIEKUTD0=; b=j1IZgfB0cbnIrIT4fOqb20s9nnxwsH2A6l8DkzY1txv6/lP8uuY7rLGaJnhcxPWh4z gwPZbb0KgCVRFAPqgVipcGW6NDxRMbhyFWa5o14+B4JLyldSgnsqILblsi1mi3GgKJ7O Rz3mOOQF3uckjhwgcLZCUmtXk1sz0qL/XwGQl+Gh2j9jNbhL7aW3yl+Noy4Ql8FxhhiH NpgewVDg6xJd0IWj6upseLThJY72CzbU8JRkw/SSGRUh9aROCodWnGa9dndtXENbW32O 6EBhWNr7klbaUonjsBAbd0IvxWFWgIkJdmHWuVGJfoPpcj11/H66Rc2sDwGk29lAwmPu jmYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697721225; x=1698326025; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MvrIYZ1SHVtY4jy7jskbyHF3SwQhysiF+69uIEKUTD0=; b=N8ISWRTYEwMOOfa6NKULwwD57GrSyw4j9xxLGcaBCn36grVCeLuHSbE3xi58PkqbIj btrUVus0lYayH1iwYV1glgR2z5Hb81CY9p4RBSOqVz/5fkU6VPMUOXAJubyQ0N7f4BZg nTsx5+TVJHOoj76b3fuRgLPvIPrmFMVj2AkSwYCfpRpiZLf7xSrlwkR42p6GM8CJDOmO B6+S2EAbae0Xj8kQORxLRl0SgwpiyxNp1I+edVFz0nQRpBJ/t79QurJE8v+5l6Ql3bU4 ydKCRoCRT0EG3qIE7geutMqzNRaVqX5NPvbOHjCCLA13M76BFkpEyd50+Ds1NJjlFx+V DZ5g== X-Gm-Message-State: AOJu0YyFGoCTRuHp94SCmyI4yNAfKcI+J6y53ngIw8N9enwuHobr+o24 QN9FJYBlMBVfDZU2eN43cByQ738yrjUubXOzuzydqA== X-Google-Smtp-Source: AGHT+IGh521xT62aOCRYydIsAR1LVelmUqVQtokkq5wdwus576n16xHQv5E7EmOKSnupqiyAtlI4rA== X-Received: by 2002:a2e:b601:0:b0:2c5:1a89:41c0 with SMTP id r1-20020a2eb601000000b002c51a8941c0mr1337177ljn.23.1697721225070; Thu, 19 Oct 2023 06:13:45 -0700 (PDT) Received: from m1x-phil.lan (176-131-216-177.abo.bbox.fr. [176.131.216.177]) by smtp.gmail.com with ESMTPSA id f7-20020a05600c4e8700b00403b63e87f2sm4506590wmq.32.2023.10.19.06.13.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 6/7] hw/intc/spapr_xive: Move sysbus_init_mmio() calls around Date: Thu, 19 Oct 2023 15:13:04 +0200 Message-ID: <20231019131305.19157-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22a; envelope-from=philmd@linaro.org; helo=mail-lj1-x22a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In order to make the next commit trivial, move sysbus_init_mmio() calls just before the corresponding sysbus_mmio_map() calls. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- hw/intc/spapr_xive.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 7f701d414b..12057ffe5b 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -316,7 +316,6 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) if (!qdev_realize(DEVICE(xsrc), NULL, errp)) { return; } - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); /* * Initialize the END ESB source @@ -328,7 +327,6 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) if (!qdev_realize(DEVICE(end_xsrc), NULL, errp)) { return; } - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); /* Set the mapping address of the END ESB pages after the source ESBs */ xive->end_base = xive->vc_base + xive_source_esb_len(xsrc); @@ -347,14 +345,16 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) /* TIMA initialization */ memory_region_init_io(&xive->tm_mmio, OBJECT(xive), &spapr_xive_tm_ops, xive, "xive.tima", 4ull << TM_SHIFT); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); /* * Map all regions. These will be enabled or disabled at reset and * can also be overridden by KVM memory regions if active */ + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 0, xive->vc_base); + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 1, xive->end_base); + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); } From patchwork Thu Oct 19 13:13:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1851691 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=xadH6JqO; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4SB7Vz2MMRz20cx for ; Fri, 20 Oct 2023 00:15:23 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qtSrV-00026e-Pn; Thu, 19 Oct 2023 09:14:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qtSqZ-00080z-NQ for qemu-devel@nongnu.org; Thu, 19 Oct 2023 09:13:56 -0400 Received: from mail-lj1-x231.google.com ([2a00:1450:4864:20::231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qtSqX-0002bY-5M for qemu-devel@nongnu.org; Thu, 19 Oct 2023 09:13:54 -0400 Received: by mail-lj1-x231.google.com with SMTP id 38308e7fff4ca-2c514cbbe7eso75083041fa.1 for ; Thu, 19 Oct 2023 06:13:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697721231; x=1698326031; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wtQTvP35/R8Mqpc3lXMAne5CQvH4pHB2/4W4n7b7ncs=; b=xadH6JqO+0k4uwSthL38IgtGt9LIlkOENM8plMk93X6Ll53NpMiprg50MWOQjX6D56 NQznZIkd2Whe2LEHCMwLEI2SUf6W+hLVLlLnGCHfPdDb86Blt5OXjKBg0asEGrs5hyug VjNgpPSrJTBAIGkRG/SOzHP+cuGEIAcNUpWEACluS/C2FPufcPn6Ntk3s+2iWcvM2WU+ /2MTPxaVkN18yIaxnMpuqiRXaDXaZf/2++UyoHrozU2dQbCoZooRuSc463njmM5g1Nh0 Ff/LvsqdOSlxl3woYQp159kM3yDaAxsyW4REJmIhAbLqBD4d+u1gJaiqYDu3rXwysVGf kGBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697721231; x=1698326031; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wtQTvP35/R8Mqpc3lXMAne5CQvH4pHB2/4W4n7b7ncs=; b=hvbJEYUOk0K+6Ktbxp7rQ3kjAtItC9ZKU1otuzg2hZUWgdsvubMVjckVnAwYIuYkrK Yd6HThrB0CUJoMKUliKF/LRUYf55+XgBBVZ3TZJlUtNMTTfb9I+Rppjll7jY2x10MZpJ 5D8yvbHrV5ISxgpw7/DdfFfljDVua7vaPdtVUbEgfzEv8Zp0MaFzWNXsXS5ZcknTpMQw 5rJIaPthWBk2RXj6Yi30T+wWw/4Fmk5aJHdbpngOuXqz4VJUqUiMRGM8ew7co0vzM+qB jpN88hoLbWMpPl4RuJinXS9YI2+Su9NvYBrZdUeXxMq8aL0AYiBerxHnIRl9pmpnSOrw fiMA== X-Gm-Message-State: AOJu0YwjNJOjyPfYJQJLkyG/JEU2oUXzCXpnZ9NePt1opV21tcJ58Z8X oNz6NKqVAIS07lG6GApbzA93EkezPEK24qQhMSjJnw== X-Google-Smtp-Source: AGHT+IH4c3VowCxRbypXJFO0ItaJ1HZ1CHs5j7W8RjFjyk7lFPPWPNuGhyCixslgrpWwhwZdALfxRg== X-Received: by 2002:a05:651c:1688:b0:2c1:6b9c:48d6 with SMTP id bd8-20020a05651c168800b002c16b9c48d6mr1201003ljb.16.1697721230915; Thu, 19 Oct 2023 06:13:50 -0700 (PDT) Received: from m1x-phil.lan (176-131-216-177.abo.bbox.fr. [176.131.216.177]) by smtp.gmail.com with ESMTPSA id q12-20020a05600c2e4c00b0040648217f4fsm4341857wmf.39.2023.10.19.06.13.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 7/7] hw/intc/spapr_xive: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 15:13:05 +0200 Message-ID: <20231019131305.19157-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::231; envelope-from=philmd@linaro.org; helo=mail-lj1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- hw/intc/spapr_xive.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 12057ffe5b..199c261b07 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -350,12 +350,12 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) * Map all regions. These will be enabled or disabled at reset and * can also be overridden by KVM memory regions if active */ - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 0, xive->vc_base); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 1, xive->end_base); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); + memory_region_add_subregion(get_system_memory(), xive->vc_base, + &xsrc->esb_mmio); + memory_region_add_subregion(get_system_memory(), xive->end_base, + &end_xsrc->esb_mmio); + memory_region_add_subregion(get_system_memory(), xive->tm_base, + &xive->tm_mmio); } static int spapr_xive_get_eas(XiveRouter *xrtr, uint8_t eas_blk,