From patchwork Wed Oct 18 16:37:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srikar Dronamraju X-Patchwork-Id: 1851073 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=ZZTH15WB; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=patchwork.ozlabs.org) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4S9cfN3h3Jz20Zj for ; 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Wed, 18 Oct 2023 16:38:08 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F01FB20049; Wed, 18 Oct 2023 16:38:05 +0000 (GMT) Received: from sapthagiri.in.ibm.com (unknown [9.43.47.66]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 18 Oct 2023 16:38:05 +0000 (GMT) From: Srikar Dronamraju To: Michael Ellerman Subject: [PATCH v2 1/6] powerpc/smp: Cache CPU has Asymmetric SMP Date: Wed, 18 Oct 2023 22:07:41 +0530 Message-ID: <20231018163751.2423181-2-srikar@linux.vnet.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> References: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 6vLPCBCAxijA96s6UPL7XrT1zS9Gylz2 X-Proofpoint-ORIG-GUID: YZNut4nXH1nZZFaLtI_YCW8a6lgS7Dni X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-18_15,2023-10-18_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 suspectscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310180138 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Valentin Schneider , Srikar Dronamraju , Peter Zijlstra , "ndesaulniers@google.com" , linux-kernel@vger.kernel.org, Rohan McLure , Nicholas Piggin , linuxppc-dev , Josh Poimboeuf Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Currently cpu feature flag is checked whenever powerpc_smt_flags gets called. This is an unnecessary overhead. CPU_FTR_ASYM_SMT is set based on the processor and all processors will either have this set or will have it unset. Hence only check for the feature flag once and cache it to be used subsequently. This commit will help avoid a branch in powerpc_smt_flags Signed-off-by: Srikar Dronamraju --- Changelog: v1->v2: Using static keys instead of a variable. Using pr_info_once instead of printk arch/powerpc/kernel/smp.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 5826f5108a12..37c41297c9ce 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -988,18 +988,16 @@ static int __init init_thread_group_cache_map(int cpu, int cache_property) } static bool shared_caches; +DEFINE_STATIC_KEY_FALSE(powerpc_asym_packing); #ifdef CONFIG_SCHED_SMT /* cpumask of CPUs with asymmetric SMT dependency */ static int powerpc_smt_flags(void) { - int flags = SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES; + if (static_branch_unlikely(&powerpc_asym_packing)) + return SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES | SD_ASYM_PACKING; - if (cpu_has_feature(CPU_FTR_ASYM_SMT)) { - printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n"); - flags |= SD_ASYM_PACKING; - } - return flags; + return SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES; } #endif @@ -1686,6 +1684,11 @@ static void __init fixup_topology(void) { int i; + if (cpu_has_feature(CPU_FTR_ASYM_SMT)) { + pr_info_once("Enabling Asymmetric SMT scheduling\n"); + static_branch_enable(&powerpc_asym_packing); + } + #ifdef CONFIG_SCHED_SMT if (has_big_cores) { pr_info("Big cores detected but using small core scheduling\n"); From patchwork Wed Oct 18 16:37:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srikar Dronamraju X-Patchwork-Id: 1851071 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=Y+N04GRW; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; 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Wed, 18 Oct 2023 16:38:12 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7F8002004B; Wed, 18 Oct 2023 16:38:12 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E9C6D20049; Wed, 18 Oct 2023 16:38:09 +0000 (GMT) Received: from sapthagiri.in.ibm.com (unknown [9.43.47.66]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 18 Oct 2023 16:38:09 +0000 (GMT) From: Srikar Dronamraju To: Michael Ellerman Subject: [PATCH v2 2/6] powerpc/smp: Enable Asym packing for cores on shared processor Date: Wed, 18 Oct 2023 22:07:42 +0530 Message-ID: <20231018163751.2423181-3-srikar@linux.vnet.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> References: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: BcExjZMSDBzge-EgCUOOIGtaL9bdkVcU X-Proofpoint-GUID: wu7AyA6M__Aom8r4Or2DHk3yYqWque_D X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-18_15,2023-10-18_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 mlxscore=0 mlxlogscore=999 spamscore=0 malwarescore=0 adultscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310180139 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Valentin Schneider , Srikar Dronamraju , Peter Zijlstra , linux-kernel@vger.kernel.org, Rohan McLure , Nicholas Piggin , linuxppc-dev , Josh Poimboeuf Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" If there are shared processor LPARs, underlying Hypervisor can have more virtual cores to handle than actual physical cores. Starting with Power 9, a core has 2 nearly independent thread groups. On a shared processors LPARs, it helps to pack threads to lesser number of cores so that the overall system performance and utilization improves. PowerVM schedules at a core level. Hence packing to fewer cores helps. For example: Lets says there are two 8-core Shared LPARs that are actually sharing a 8 Core shared physical pool, each running 8 threads each. Then Consolidating 8 threads to 4 cores on each LPAR would help them to perform better. This is because each of the LPAR will get 100% time to run applications and there will no switching required by the Hypervisor. To achieve this, enable SD_ASYM_PACKING flag at CACHE, MC and DIE level. Signed-off-by: Srikar Dronamraju --- Changelog: v1->v2: Using static key instead of a variable. arch/powerpc/kernel/smp.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 37c41297c9ce..498c2d51fc20 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -1009,9 +1009,20 @@ static int powerpc_smt_flags(void) */ static int powerpc_shared_cache_flags(void) { + if (static_branch_unlikely(&powerpc_asym_packing)) + return SD_SHARE_PKG_RESOURCES | SD_ASYM_PACKING; + return SD_SHARE_PKG_RESOURCES; } +static int powerpc_shared_proc_flags(void) +{ + if (static_branch_unlikely(&powerpc_asym_packing)) + return SD_ASYM_PACKING; + + return 0; +} + /* * We can't just pass cpu_l2_cache_mask() directly because * returns a non-const pointer and the compiler barfs on that. @@ -1048,8 +1059,8 @@ static struct sched_domain_topology_level powerpc_topology[] = { { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) }, #endif { shared_cache_mask, powerpc_shared_cache_flags, SD_INIT_NAME(CACHE) }, - { cpu_mc_mask, SD_INIT_NAME(MC) }, - { cpu_cpu_mask, SD_INIT_NAME(DIE) }, + { cpu_mc_mask, powerpc_shared_proc_flags, SD_INIT_NAME(MC) }, + { cpu_cpu_mask, powerpc_shared_proc_flags, SD_INIT_NAME(DIE) }, { NULL, }, }; @@ -1687,6 +1698,8 @@ static void __init fixup_topology(void) if (cpu_has_feature(CPU_FTR_ASYM_SMT)) { pr_info_once("Enabling Asymmetric SMT scheduling\n"); static_branch_enable(&powerpc_asym_packing); + } else if (is_shared_processor() && has_big_cores) { + static_branch_enable(&powerpc_asym_packing); } #ifdef CONFIG_SCHED_SMT From patchwork Wed Oct 18 16:37:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srikar Dronamraju X-Patchwork-Id: 1851052 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=ZXlSWsvm; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; 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Wed, 18 Oct 2023 16:38:13 +0000 (GMT) From: Srikar Dronamraju To: Michael Ellerman Subject: [PATCH v2 3/6] powerpc/smp: Move shared_processor static key to smp.h Date: Wed, 18 Oct 2023 22:07:43 +0530 Message-ID: <20231018163751.2423181-4-srikar@linux.vnet.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> References: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 23DZZcsu80wNom_eFt3vDqy-hoFxjry0 X-Proofpoint-GUID: T51MEs9XAoj6v_JKyaeG342_6IVln8iw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-18_15,2023-10-18_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 mlxscore=0 malwarescore=0 bulkscore=0 clxscore=1011 lowpriorityscore=0 mlxlogscore=870 impostorscore=0 suspectscore=0 phishscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310180135 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Valentin Schneider , Srikar Dronamraju , Peter Zijlstra , linux-kernel@vger.kernel.org, x86@kernel.org, Ajay Kaher , virtualization@lists.linux-foundation.org, VMware PV-Drivers Reviewers , Rohan McLure , Nicholas Piggin , Alexey Makhalov , linuxppc-dev , Josh Poimboeuf Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The ability to detect if the system is running in a shared processor mode is helpful in few more generic cases not just in paravirtualization. For example: At boot time, different scheduler/ topology flags may be set based on the processor mode. Hence move it to a more generic file. Signed-off-by: Srikar Dronamraju --- arch/powerpc/include/asm/paravirt.h | 12 ------------ arch/powerpc/include/asm/smp.h | 14 ++++++++++++++ 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/include/asm/paravirt.h b/arch/powerpc/include/asm/paravirt.h index 0372b0093f72..cf83e837a571 100644 --- a/arch/powerpc/include/asm/paravirt.h +++ b/arch/powerpc/include/asm/paravirt.h @@ -15,13 +15,6 @@ #include #include -DECLARE_STATIC_KEY_FALSE(shared_processor); - -static inline bool is_shared_processor(void) -{ - return static_branch_unlikely(&shared_processor); -} - #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING extern struct static_key paravirt_steal_enabled; extern struct static_key paravirt_steal_rq_enabled; @@ -77,11 +70,6 @@ static inline bool is_vcpu_idle(int vcpu) return lppaca_of(vcpu).idle; } #else -static inline bool is_shared_processor(void) -{ - return false; -} - static inline u32 yield_count_of(int cpu) { return 0; diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h index aaaa576d0e15..08631b2a4528 100644 --- a/arch/powerpc/include/asm/smp.h +++ b/arch/powerpc/include/asm/smp.h @@ -34,6 +34,20 @@ extern bool coregroup_enabled; extern int cpu_to_chip_id(int cpu); extern int *chip_id_lookup_table; +#ifdef CONFIG_PPC_SPLPAR +DECLARE_STATIC_KEY_FALSE(shared_processor); + +static inline bool is_shared_processor(void) +{ + return static_branch_unlikely(&shared_processor); +} +#else +static inline bool is_shared_processor(void) +{ + return false; +} +#endif + DECLARE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map); DECLARE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map); DECLARE_PER_CPU(cpumask_var_t, thread_group_l3_cache_map); From patchwork Wed Oct 18 16:37:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srikar Dronamraju X-Patchwork-Id: 1851065 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=bv1QuYkp; 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Wed, 18 Oct 2023 16:38:18 +0000 (GMT) From: Srikar Dronamraju To: Michael Ellerman Subject: [PATCH v2 4/6] powerpc/smp: Disable MC domain for shared processor Date: Wed, 18 Oct 2023 22:07:44 +0530 Message-ID: <20231018163751.2423181-5-srikar@linux.vnet.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> References: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: a4Ym7-iAwiJUDTUxcA8fqJOVR_pkTpgR X-Proofpoint-GUID: 2Ml_aGUVkwGNY6quFC6n5sR7BPyBfFGX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-18_15,2023-10-18_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 mlxscore=0 malwarescore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 mlxlogscore=999 impostorscore=0 suspectscore=0 phishscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310180135 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Valentin Schneider , Srikar Dronamraju , Peter Zijlstra , linux-kernel@vger.kernel.org, Rohan McLure , Nicholas Piggin , linuxppc-dev , Josh Poimboeuf Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Like L2-cache info, coregroup information which is used to determine MC sched domains is only present on dedicated LPARs. i.e PowerVM doesn't export coregroup information for shared processor LPARs. Hence disable creating MC domains on shared LPAR Systems. Signed-off-by: Srikar Dronamraju --- arch/powerpc/kernel/smp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 498c2d51fc20..29da9262cb17 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -1046,6 +1046,10 @@ static struct cpumask *cpu_coregroup_mask(int cpu) static bool has_coregroup_support(void) { + /* Coregroup identification not available on shared systems */ + if (is_shared_processor()) + return 0; + return coregroup_enabled; } From patchwork Wed Oct 18 16:37:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srikar Dronamraju X-Patchwork-Id: 1851064 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=AHzaqe//; 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Wed, 18 Oct 2023 16:38:21 +0000 (GMT) From: Srikar Dronamraju To: Michael Ellerman Subject: [PATCH v2 5/6] powerpc/smp: Add read_mostly attribute Date: Wed, 18 Oct 2023 22:07:45 +0530 Message-ID: <20231018163751.2423181-6-srikar@linux.vnet.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> References: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: aEAxBG_TAP_K-fj3Z0VDeCVz5gkG5Slc X-Proofpoint-GUID: SYibiaOliV8cKZtevOTiW_ap_E5nL3tY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-18_15,2023-10-18_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 mlxscore=0 malwarescore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 mlxlogscore=999 impostorscore=0 suspectscore=0 phishscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310180135 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Valentin Schneider , Srikar Dronamraju , Peter Zijlstra , "ndesaulniers@google.com" , linux-kernel@vger.kernel.org, Rohan McLure , Nicholas Piggin , linuxppc-dev , Josh Poimboeuf Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" There are some variables that are only updated at boot time. So add read_mostly attribute to such variables Signed-off-by: Srikar Dronamraju --- arch/powerpc/kernel/smp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 29da9262cb17..b1eb11a66902 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -77,10 +77,10 @@ static DEFINE_PER_CPU(int, cpu_state) = { 0 }; #endif struct task_struct *secondary_current; -bool has_big_cores; -bool coregroup_enabled; -bool thread_group_shares_l2; -bool thread_group_shares_l3; +bool has_big_cores __read_mostly; +bool coregroup_enabled __read_mostly; +bool thread_group_shares_l2 __read_mostly; +bool thread_group_shares_l3 __read_mostly; DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map); DEFINE_PER_CPU(cpumask_var_t, cpu_smallcore_map); @@ -987,7 +987,7 @@ static int __init init_thread_group_cache_map(int cpu, int cache_property) return 0; } -static bool shared_caches; +static bool shared_caches __read_mostly; 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Wed, 18 Oct 2023 16:38:28 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 35E2620040; Wed, 18 Oct 2023 16:38:26 +0000 (GMT) Received: from sapthagiri.in.ibm.com (unknown [9.43.47.66]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 18 Oct 2023 16:38:25 +0000 (GMT) From: Srikar Dronamraju To: Michael Ellerman Subject: [PATCH v2 6/6] powerpc/smp: Avoid asym packing within thread_group of a core Date: Wed, 18 Oct 2023 22:07:46 +0530 Message-ID: <20231018163751.2423181-7-srikar@linux.vnet.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> References: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 5zcFTzW3cgn2tkT_kawQYByBZWYmIWuT X-Proofpoint-GUID: 3nPjRWY_fioBTO33AYGy4yBKjzx6YwO9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-18_15,2023-10-18_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 mlxscore=0 malwarescore=0 bulkscore=0 clxscore=1011 lowpriorityscore=0 mlxlogscore=999 impostorscore=0 suspectscore=0 phishscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310180135 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Valentin Schneider , Srikar Dronamraju , Peter Zijlstra , "ndesaulniers@google.com" , linux-kernel@vger.kernel.org, Rohan McLure , Nicholas Piggin , linuxppc-dev , Josh Poimboeuf Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" PowerVM Hypervisor will schedule at a core granularity. However each core can have more than one thread_groups. For better utilization in case of a shared processor, its preferable for the scheduler to pack to the lowest core. However there is no benefit of moving a thread between two thread groups of the same core. Signed-off-by: Srikar Dronamraju --- arch/powerpc/kernel/smp.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index b1eb11a66902..a710fb32a2a9 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -1695,6 +1695,8 @@ void start_secondary(void *unused) BUG(); } +DEFINE_STATIC_KEY_FALSE(splpar_asym_pack); + static void __init fixup_topology(void) { int i; @@ -1704,6 +1706,7 @@ static void __init fixup_topology(void) static_branch_enable(&powerpc_asym_packing); } else if (is_shared_processor() && has_big_cores) { static_branch_enable(&powerpc_asym_packing); + static_branch_enable(&splpar_asym_pack); } #ifdef CONFIG_SCHED_SMT @@ -1758,6 +1761,19 @@ void __init smp_cpus_done(unsigned int max_cpus) set_sched_topology(powerpc_topology); } +/* + * For asym packing, by default lower numbered CPU has higher priority. + * On shared processors, pack to lower numbered core. However avoid moving + * between thread_groups within the same core. + */ +int arch_asym_cpu_priority(int cpu) +{ + if (static_branch_unlikely(&splpar_asym_pack)) + return -cpu / threads_per_core; + + return -cpu; +} + #ifdef CONFIG_HOTPLUG_CPU int __cpu_disable(void) {