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Mon, 28 Aug 2023 15:13:23 -0700 (PDT) Received: from m1x-phil.lan ([176.164.201.64]) by smtp.gmail.com with ESMTPSA id u5-20020adfed45000000b0031984b370f2sm11756175wro.47.2023.08.28.15.13.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 28 Aug 2023 15:13:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 01/11] target/ppc/pmu: Include missing 'qemu/timer.h' header Date: Tue, 29 Aug 2023 00:13:04 +0200 Message-ID: <20230828221314.18435-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, SUSPICIOUS_RECIPS=2.51 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Since commit c2eff582a3 ("target/ppc: PMU basic cycle count for pseries TCG") pmu_update_cycles() uses QEMU_CLOCK_VIRTUAL and calls qemu_clock_get_ns(), both defined in "qemu/timer.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/ppc/power8-pmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c index 7bb4bf81f7..2537cded83 100644 --- a/target/ppc/power8-pmu.c +++ b/target/ppc/power8-pmu.c @@ -16,6 +16,7 @@ #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/error-report.h" +#include "qemu/timer.h" #include "qemu/main-loop.h" #include "hw/ppc/ppc.h" #include "power8-pmu.h" From patchwork Mon Aug 28 22:13:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1826982 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=ueRVCvKg; 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Mon, 28 Aug 2023 15:13:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 02/11] target/riscv/pmu: Restrict 'qemu/log.h' include to source Date: Tue, 29 Aug 2023 00:13:05 +0200 Message-ID: <20230828221314.18435-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, SUSPICIOUS_RECIPS=2.51 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Declarations from "riscv/pmu.h" don't need anything from "qemu/log.h", reduce it's inclusion to the source. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/riscv/pmu.h | 1 - target/riscv/pmu.c | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h index 0c819ca983..d2be06a133 100644 --- a/target/riscv/pmu.h +++ b/target/riscv/pmu.h @@ -16,7 +16,6 @@ * this program. If not, see . */ -#include "qemu/log.h" #include "cpu.h" #include "qemu/main-loop.h" #include "exec/exec-all.h" diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c index db06b3882f..36f6307d28 100644 --- a/target/riscv/pmu.c +++ b/target/riscv/pmu.c @@ -17,6 +17,7 @@ */ #include "qemu/osdep.h" +#include "qemu/log.h" #include "cpu.h" #include "pmu.h" #include "sysemu/cpu-timers.h" From patchwork Mon Aug 28 22:13:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1826971 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=FVfj+4+7; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; 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Mon, 28 Aug 2023 15:13:36 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 03/11] target/translate: Include missing 'exec/cpu_ldst.h' header Date: Tue, 29 Aug 2023 00:13:06 +0200 Message-ID: <20230828221314.18435-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org All these files access the CPU LD/ST API declared in "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/avr/helper.c | 1 + target/i386/tcg/fpu_helper.c | 1 + target/i386/tcg/sysemu/excp_helper.c | 1 + target/loongarch/cpu.c | 1 + target/mips/tcg/ldst_helper.c | 1 + target/mips/tcg/msa_helper.c | 1 + target/riscv/op_helper.c | 1 + target/riscv/vector_helper.c | 1 + 8 files changed, 8 insertions(+) diff --git a/target/avr/helper.c b/target/avr/helper.c index e6e7d51487..fdc9884ea0 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -24,6 +24,7 @@ #include "cpu.h" #include "hw/core/tcg-cpu-ops.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "exec/address-spaces.h" #include "exec/helper-proto.h" diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 6f3741b635..4430d3d380 100644 --- a/target/i386/tcg/fpu_helper.c +++ b/target/i386/tcg/fpu_helper.c @@ -21,6 +21,7 @@ #include #include "cpu.h" #include "tcg-cpu.h" +#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" #include "fpu/softfloat-macros.h" diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/excp_helper.c index b5f0abffa3..226689a4f2 100644 --- a/target/i386/tcg/sysemu/excp_helper.c +++ b/target/i386/tcg/sysemu/excp_helper.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "exec/cpu_ldst.h" #include "exec/exec-all.h" #include "tcg/helper-tcg.h" diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 27fc6e1f33..65f9320e34 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -11,6 +11,7 @@ #include "qapi/error.h" #include "qemu/module.h" #include "sysemu/qtest.h" +#include "exec/cpu_ldst.h" #include "exec/exec-all.h" #include "cpu.h" #include "internals.h" diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c index c1a8380e34..97056d00a2 100644 --- a/target/mips/tcg/ldst_helper.c +++ b/target/mips/tcg/ldst_helper.c @@ -24,6 +24,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "exec/memop.h" #include "internal.h" diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c index 29b31d70fe..c8597b9e30 100644 --- a/target/mips/tcg/msa_helper.c +++ b/target/mips/tcg/msa_helper.c @@ -22,6 +22,7 @@ #include "internal.h" #include "tcg/tcg.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "exec/memop.h" #include "fpu/softfloat.h" diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 9cdb9cdd06..7e2f1908ee 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -23,6 +23,7 @@ #include "internals.h" #include "qemu/main-loop.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" /* Exceptions processing helpers */ diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index bf7e0029a1..bc9e151aa9 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/memop.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" #include "tcg/tcg-gvec-desc.h" From patchwork Mon Aug 28 22:13:07 2023 Content-Type: text/plain; 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Mon, 28 Aug 2023 15:13:42 -0700 (PDT) Received: from m1x-phil.lan ([176.164.201.64]) by smtp.gmail.com with ESMTPSA id y3-20020adfe6c3000000b0031c5ce91ad6sm11720207wrm.97.2023.08.28.15.13.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 28 Aug 2023 15:13:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 04/11] target/translate: Remove unnecessary 'exec/cpu_ldst.h' header Date: Tue, 29 Aug 2023 00:13:07 +0200 Message-ID: <20230828221314.18435-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org All these files only access the translator_ld/st API declared in "exec/translator.h". The CPU ld/st API from declared in "exec/cpu_ldst.h" is not used, remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/alpha/translate.c | 1 - target/hexagon/translate.c | 1 - target/hppa/translate.c | 1 - target/m68k/translate.c | 1 - target/microblaze/translate.c | 1 - target/nios2/translate.c | 1 - target/openrisc/translate.c | 1 - target/ppc/translate.c | 1 - target/sh4/translate.c | 1 - target/sparc/translate.c | 1 - 10 files changed, 10 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 0839182a1f..9be912c50c 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -24,7 +24,6 @@ #include "qemu/host-utils.h" #include "exec/exec-all.h" #include "tcg/tcg-op.h" -#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" #include "exec/translator.h" diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 708339198e..c00254e4d5 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -23,7 +23,6 @@ #include "exec/helper-gen.h" #include "exec/helper-proto.h" #include "exec/translation-block.h" -#include "exec/cpu_ldst.h" #include "exec/log.h" #include "internal.h" #include "attribs.h" diff --git a/target/hppa/translate.c b/target/hppa/translate.c index e3af668252..c04dc15228 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -23,7 +23,6 @@ #include "qemu/host-utils.h" #include "exec/exec-all.h" #include "tcg/tcg-op.h" -#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" #include "exec/translator.h" diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 15b3701b8f..9e224fe796 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -25,7 +25,6 @@ #include "tcg/tcg-op.h" #include "qemu/log.h" #include "qemu/qemu-print.h" -#include "exec/cpu_ldst.h" #include "exec/translator.h" #include "exec/helper-proto.h" diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 7e7f837c63..d02c16296a 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -24,7 +24,6 @@ #include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "exec/helper-proto.h" -#include "exec/cpu_ldst.h" #include "exec/helper-gen.h" #include "exec/translator.h" #include "qemu/qemu-print.h" diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 4264c7ec6b..dfc546d3bb 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -29,7 +29,6 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" #include "exec/log.h" -#include "exec/cpu_ldst.h" #include "exec/translator.h" #include "qemu/qemu-print.h" #include "semihosting/semihost.h" diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 7c6f80daf1..d65758449f 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -26,7 +26,6 @@ #include "qemu/log.h" #include "qemu/bitops.h" #include "qemu/qemu-print.h" -#include "exec/cpu_ldst.h" #include "exec/translator.h" #include "exec/helper-proto.h" diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 74796ec7ba..49b6a757b7 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -27,7 +27,6 @@ #include "tcg/tcg-op-gvec.h" #include "qemu/host-utils.h" #include "qemu/main-loop.h" -#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 49c87d7a01..c1e590feb3 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -22,7 +22,6 @@ #include "disas/disas.h" #include "exec/exec-all.h" #include "tcg/tcg-op.h" -#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" #include "exec/translator.h" diff --git a/target/sparc/translate.c b/target/sparc/translate.c index fa80a91161..3bf0ab8135 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -25,7 +25,6 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "tcg/tcg-op.h" -#include "exec/cpu_ldst.h" #include "exec/helper-gen.h" From patchwork Mon Aug 28 22:13:08 2023 Content-Type: text/plain; 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Mon, 28 Aug 2023 15:13:48 -0700 (PDT) Received: from m1x-phil.lan ([176.164.201.64]) by smtp.gmail.com with ESMTPSA id z10-20020a7bc7ca000000b003fe1fe56202sm12031404wmk.33.2023.08.28.15.13.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 28 Aug 2023 15:13:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 05/11] target/translate: Restrict 'exec/cpu_ldst.h' to user emulation Date: Tue, 29 Aug 2023 00:13:08 +0200 Message-ID: <20230828221314.18435-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Only handle_sigsegv_accerr_write(), declared with user emulation, requires "exec/cpu_ldst.h" (for the abi_ptr typedef). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/exec-all.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index d02517e95f..b2f5cd4c2a 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -21,7 +21,7 @@ #define EXEC_ALL_H #include "cpu.h" -#ifdef CONFIG_TCG +#if defined(CONFIG_USER_ONLY) #include "exec/cpu_ldst.h" #endif #include "exec/translation-block.h" From patchwork Mon Aug 28 22:13:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1826990 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=gDjAWI8/; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; 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Mon, 28 Aug 2023 15:13:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 06/11] target/helpers: Remove unnecessary 'exec/cpu_ldst.h' header Date: Tue, 29 Aug 2023 00:13:09 +0200 Message-ID: <20230828221314.18435-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org These files don't use the CPU ld/st API, remove the unnecessary "exec/cpu_ldst.h" header. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/pmu.h | 1 - target/cris/op_helper.c | 1 - target/mips/tcg/fpu_helper.c | 1 - target/mips/tcg/sysemu/lcsr_helper.c | 1 - target/s390x/tcg/excp_helper.c | 1 - target/s390x/tcg/fpu_helper.c | 1 - target/xtensa/mmu_helper.c | 1 - target/xtensa/op_helper.c | 1 - 8 files changed, 8 deletions(-) diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h index d2be06a133..60fdd6f42c 100644 --- a/target/riscv/pmu.h +++ b/target/riscv/pmu.h @@ -18,7 +18,6 @@ #include "cpu.h" #include "qemu/main-loop.h" -#include "exec/exec-all.h" bool riscv_pmu_ctr_monitor_instructions(CPURISCVState *env, uint32_t target_ctr); diff --git a/target/cris/op_helper.c b/target/cris/op_helper.c index 40cb74ce73..98a9aaf504 100644 --- a/target/cris/op_helper.c +++ b/target/cris/op_helper.c @@ -24,7 +24,6 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" -#include "exec/cpu_ldst.h" //#define CRIS_OP_HELPER_DEBUG diff --git a/target/mips/tcg/fpu_helper.c b/target/mips/tcg/fpu_helper.c index 8ce56ed7c8..45d593de48 100644 --- a/target/mips/tcg/fpu_helper.c +++ b/target/mips/tcg/fpu_helper.c @@ -25,7 +25,6 @@ #include "internal.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" -#include "exec/cpu_ldst.h" #include "fpu/softfloat.h" #include "fpu_helper.h" diff --git a/target/mips/tcg/sysemu/lcsr_helper.c b/target/mips/tcg/sysemu/lcsr_helper.c index 942143d209..8f97d04313 100644 --- a/target/mips/tcg/sysemu/lcsr_helper.c +++ b/target/mips/tcg/sysemu/lcsr_helper.c @@ -13,7 +13,6 @@ #include "qemu/host-utils.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" -#include "exec/cpu_ldst.h" #define GET_MEMTXATTRS(cas) \ ((MemTxAttrs){.requester_id = env_cpu(cas)->cpu_index}) diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index b7116d0577..b875bf14e5 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -23,7 +23,6 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" -#include "exec/cpu_ldst.h" #include "s390x-internal.h" #include "tcg_s390x.h" #ifndef CONFIG_USER_ONLY diff --git a/target/s390x/tcg/fpu_helper.c b/target/s390x/tcg/fpu_helper.c index c329b31261..d8bd5748fa 100644 --- a/target/s390x/tcg/fpu_helper.c +++ b/target/s390x/tcg/fpu_helper.c @@ -23,7 +23,6 @@ #include "s390x-internal.h" #include "tcg_s390x.h" #include "exec/exec-all.h" -#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index fa66e8e867..57b75882c4 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -34,7 +34,6 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" -#include "exec/cpu_ldst.h" #define XTENSA_MPU_SEGMENT_MASK 0x0000001f #define XTENSA_MPU_ACC_RIGHTS_MASK 0x00000f00 diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 1af7becc54..10a2b51f91 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -31,7 +31,6 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" -#include "exec/cpu_ldst.h" #include "qemu/timer.h" #ifndef CONFIG_USER_ONLY From patchwork Mon Aug 28 22:13:10 2023 Content-Type: text/plain; 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Mon, 28 Aug 2023 15:14:02 -0700 (PDT) Received: from m1x-phil.lan ([176.164.201.64]) by smtp.gmail.com with ESMTPSA id o10-20020a1c750a000000b003fe29dc0ff2sm12152766wmc.21.2023.08.28.15.14.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 28 Aug 2023 15:14:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 07/11] target/helper: Remove unnecessary 'qemu/main-loop.h' header Date: Tue, 29 Aug 2023 00:13:10 +0200 Message-ID: <20230828221314.18435-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, SUSPICIOUS_RECIPS=2.51 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org "qemu/main-loop.h" declares functions related to QEMU's main loop mutex, which these files don't access. Remove the unused "qemu/main-loop.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/riscv/pmu.h | 1 - target/arm/ptw.c | 1 - target/loongarch/iocsr_helper.c | 1 - target/loongarch/op_helper.c | 1 - target/mips/tcg/sysemu/lcsr_helper.c | 1 - target/nios2/op_helper.c | 1 - target/ppc/int_helper.c | 1 - target/ppc/machine.c | 1 - target/ppc/mem_helper.c | 1 - target/ppc/mmu_common.c | 1 - target/ppc/mmu_helper.c | 1 - target/ppc/power8-pmu.c | 1 - target/ppc/translate.c | 1 - target/riscv/csr.c | 1 - target/riscv/m128_helper.c | 1 - target/riscv/op_helper.c | 1 - target/s390x/tcg/crypto_helper.c | 1 - target/s390x/tcg/misc_helper.c | 1 - target/xtensa/dbg_helper.c | 1 - target/xtensa/fpu_helper.c | 1 - target/xtensa/mmu_helper.c | 1 - target/xtensa/op_helper.c | 1 - target/xtensa/win_helper.c | 1 - 23 files changed, 23 deletions(-) diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h index 60fdd6f42c..2bfb71ba87 100644 --- a/target/riscv/pmu.h +++ b/target/riscv/pmu.h @@ -17,7 +17,6 @@ */ #include "cpu.h" -#include "qemu/main-loop.h" bool riscv_pmu_ctr_monitor_instructions(CPURISCVState *env, uint32_t target_ctr); diff --git a/target/arm/ptw.c b/target/arm/ptw.c index bfbab26b9b..a4b0172df3 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -9,7 +9,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu/range.h" -#include "qemu/main-loop.h" #include "exec/exec-all.h" #include "cpu.h" #include "internals.h" diff --git a/target/loongarch/iocsr_helper.c b/target/loongarch/iocsr_helper.c index dda9845d6c..6cd01d5f09 100644 --- a/target/loongarch/iocsr_helper.c +++ b/target/loongarch/iocsr_helper.c @@ -6,7 +6,6 @@ */ #include "qemu/osdep.h" -#include "qemu/main-loop.h" #include "cpu.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" diff --git a/target/loongarch/op_helper.c b/target/loongarch/op_helper.c index cf84f20aba..fe79c62fa4 100644 --- a/target/loongarch/op_helper.c +++ b/target/loongarch/op_helper.c @@ -7,7 +7,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" -#include "qemu/main-loop.h" #include "cpu.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" diff --git a/target/mips/tcg/sysemu/lcsr_helper.c b/target/mips/tcg/sysemu/lcsr_helper.c index 8f97d04313..fb57bcbb78 100644 --- a/target/mips/tcg/sysemu/lcsr_helper.c +++ b/target/mips/tcg/sysemu/lcsr_helper.c @@ -7,7 +7,6 @@ */ #include "qemu/osdep.h" -#include "qemu/main-loop.h" #include "cpu.h" #include "internal.h" #include "qemu/host-utils.h" diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c index 0aaf33ffc2..5017457c5e 100644 --- a/target/nios2/op_helper.c +++ b/target/nios2/op_helper.c @@ -22,7 +22,6 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" -#include "qemu/main-loop.h" void helper_raise_exception(CPUNios2State *env, uint32_t index) { diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 834da80fe3..96cdb3c7e3 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -21,7 +21,6 @@ #include "cpu.h" #include "internal.h" #include "qemu/host-utils.h" -#include "qemu/main-loop.h" #include "qemu/log.h" #include "exec/helper-proto.h" #include "crypto/aes.h" diff --git a/target/ppc/machine.c b/target/ppc/machine.c index 134b16c625..1270a1f7fc 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -7,7 +7,6 @@ #include "mmu-hash64.h" #include "migration/cpu.h" #include "qapi/error.h" -#include "qemu/main-loop.h" #include "kvm_ppc.h" #include "power8-pmu.h" diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index 46eae65819..c7535481d6 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -21,7 +21,6 @@ #include "cpu.h" #include "exec/exec-all.h" #include "qemu/host-utils.h" -#include "qemu/main-loop.h" #include "exec/helper-proto.h" #include "helper_regs.h" #include "exec/cpu_ldst.h" diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 8c000e250d..6ca5d12207 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -28,7 +28,6 @@ #include "exec/log.h" #include "helper_regs.h" #include "qemu/error-report.h" -#include "qemu/main-loop.h" #include "qemu/qemu-print.h" #include "internal.h" #include "mmu-book3s-v3.h" diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index d3ea7588f9..f87d35379a 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -28,7 +28,6 @@ #include "exec/log.h" #include "helper_regs.h" #include "qemu/error-report.h" -#include "qemu/main-loop.h" #include "qemu/qemu-print.h" #include "internal.h" #include "mmu-book3s-v3.h" diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c index 2537cded83..cbc5889d91 100644 --- a/target/ppc/power8-pmu.c +++ b/target/ppc/power8-pmu.c @@ -17,7 +17,6 @@ #include "exec/helper-proto.h" #include "qemu/error-report.h" #include "qemu/timer.h" -#include "qemu/main-loop.h" #include "hw/ppc/ppc.h" #include "power8-pmu.h" diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 49b6a757b7..7111b34030 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -26,7 +26,6 @@ #include "tcg/tcg-op.h" #include "tcg/tcg-op-gvec.h" #include "qemu/host-utils.h" -#include "qemu/main-loop.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" diff --git a/target/riscv/csr.c b/target/riscv/csr.c index ea7585329e..de31818daa 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -23,7 +23,6 @@ #include "cpu.h" #include "pmu.h" #include "time_helper.h" -#include "qemu/main-loop.h" #include "exec/exec-all.h" #include "exec/tb-flush.h" #include "sysemu/cpu-timers.h" diff --git a/target/riscv/m128_helper.c b/target/riscv/m128_helper.c index e6a4f6120a..ec14aaa901 100644 --- a/target/riscv/m128_helper.c +++ b/target/riscv/m128_helper.c @@ -19,7 +19,6 @@ #include "qemu/osdep.h" #include "cpu.h" -#include "qemu/main-loop.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 7e2f1908ee..5355225d56 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internals.h" -#include "qemu/main-loop.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c index 762b277884..93aabd236f 100644 --- a/target/s390x/tcg/crypto_helper.c +++ b/target/s390x/tcg/crypto_helper.c @@ -13,7 +13,6 @@ */ #include "qemu/osdep.h" -#include "qemu/main-loop.h" #include "qemu/guest-random.h" #include "s390x-internal.h" #include "tcg_s390x.h" diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c index 576157b1f3..e85658ce22 100644 --- a/target/s390x/tcg/misc_helper.c +++ b/target/s390x/tcg/misc_helper.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qemu/cutils.h" -#include "qemu/main-loop.h" #include "cpu.h" #include "s390x-internal.h" #include "qemu/host-utils.h" diff --git a/target/xtensa/dbg_helper.c b/target/xtensa/dbg_helper.c index ce2a820c60..3e0c9e8e8b 100644 --- a/target/xtensa/dbg_helper.c +++ b/target/xtensa/dbg_helper.c @@ -27,7 +27,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" -#include "qemu/main-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" diff --git a/target/xtensa/fpu_helper.c b/target/xtensa/fpu_helper.c index d2a10cc797..381e83ded8 100644 --- a/target/xtensa/fpu_helper.c +++ b/target/xtensa/fpu_helper.c @@ -27,7 +27,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" -#include "qemu/main-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index 57b75882c4..12552a3347 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -27,7 +27,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" -#include "qemu/main-loop.h" #include "qemu/qemu-print.h" #include "qemu/units.h" #include "cpu.h" diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 10a2b51f91..03e2c1889a 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -26,7 +26,6 @@ */ #include "qemu/osdep.h" -#include "qemu/main-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" diff --git a/target/xtensa/win_helper.c b/target/xtensa/win_helper.c index 5a1555360a..ec9ff44db0 100644 --- a/target/xtensa/win_helper.c +++ b/target/xtensa/win_helper.c @@ -27,7 +27,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" -#include "qemu/main-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" From patchwork Mon Aug 28 22:13:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1826979 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: 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5XpxdTHQlIEVEx0M+6k9K2TXEGH14d4fbmv3aFs= X-Google-Smtp-Source: AGHT+IG0aQKYb6DlbV2N24HjFxpA9NrADQwJU8AU1W1d0IIL2g5Eza/hYPPIaBvlWNUffe1U7ZTSpQ== X-Received: by 2002:a1c:7407:0:b0:401:c338:ab96 with SMTP id p7-20020a1c7407000000b00401c338ab96mr4610157wmc.34.1693260849479; Mon, 28 Aug 2023 15:14:09 -0700 (PDT) Received: from m1x-phil.lan ([176.164.201.64]) by smtp.gmail.com with ESMTPSA id x7-20020a1c7c07000000b003ffca80edb8sm12058270wmc.15.2023.08.28.15.14.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 28 Aug 2023 15:14:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 08/11] target/mips: Remove unused headers in lcsr_helper.c Date: Tue, 29 Aug 2023 00:13:11 +0200 Message-ID: <20230828221314.18435-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This files only access the address_space_ld/st API, declared in "exec/cpu-all.h", already included by "cpu.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/tcg/sysemu/lcsr_helper.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/target/mips/tcg/sysemu/lcsr_helper.c b/target/mips/tcg/sysemu/lcsr_helper.c index fb57bcbb78..25e03572fe 100644 --- a/target/mips/tcg/sysemu/lcsr_helper.c +++ b/target/mips/tcg/sysemu/lcsr_helper.c @@ -8,10 +8,7 @@ #include "qemu/osdep.h" #include "cpu.h" -#include "internal.h" -#include "qemu/host-utils.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #define GET_MEMTXATTRS(cas) \ ((MemTxAttrs){.requester_id = env_cpu(cas)->cpu_index}) From patchwork Mon Aug 28 22:13:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1826987 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; 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Mon, 28 Aug 2023 15:14:16 -0700 (PDT) Received: from m1x-phil.lan ([176.164.201.64]) by smtp.gmail.com with ESMTPSA id v18-20020adfedd2000000b0031934b035d2sm11710874wro.52.2023.08.28.15.14.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 28 Aug 2023 15:14:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 09/11] target/xtensa: Include missing 'qemu/atomic.h' header Date: Tue, 29 Aug 2023 00:13:12 +0200 Message-ID: <20230828221314.18435-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, SUSPICIOUS_RECIPS=2.51 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Since commit fa92bd4af7 ("target/xtensa: fix access to the INTERRUPT SR") these files use QEMU atomic API. Explicit the header inclusion instead of relying on implicit and indirect inclusion. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/xtensa/pic_cpu.c | 1 + target/xtensa/exc_helper.c | 1 + target/xtensa/op_helper.c | 1 + 3 files changed, 3 insertions(+) diff --git a/hw/xtensa/pic_cpu.c b/hw/xtensa/pic_cpu.c index 6c9447565d..8cef88c61b 100644 --- a/hw/xtensa/pic_cpu.c +++ b/hw/xtensa/pic_cpu.c @@ -30,6 +30,7 @@ #include "hw/irq.h" #include "qemu/log.h" #include "qemu/timer.h" +#include "qemu/atomic.h" void check_interrupts(CPUXtensaState *env) { diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c index 43f6a862de..91354884f7 100644 --- a/target/xtensa/exc_helper.c +++ b/target/xtensa/exc_helper.c @@ -31,6 +31,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" +#include "qemu/atomic.h" #include "exec/exec-all.h" void HELPER(exception)(CPUXtensaState *env, uint32_t excp) diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 03e2c1889a..7bb8cd6726 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -30,6 +30,7 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" +#include "qemu/atomic.h" #include "qemu/timer.h" #ifndef CONFIG_USER_ONLY From patchwork Mon Aug 28 22:13:13 2023 Content-Type: text/plain; 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Mon, 28 Aug 2023 15:14:22 -0700 (PDT) Received: from m1x-phil.lan ([176.164.201.64]) by smtp.gmail.com with ESMTPSA id f17-20020adfdb51000000b0031912c0ffebsm11673969wrj.23.2023.08.28.15.14.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 28 Aug 2023 15:14:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 10/11] qemu/processor: Remove unused 'qemu/atomic.h' header Date: Tue, 29 Aug 2023 00:13:13 +0200 Message-ID: <20230828221314.18435-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, SUSPICIOUS_RECIPS=2.51 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/qemu/processor.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/qemu/processor.h b/include/qemu/processor.h index 8e16c9277d..9f0dcdf28f 100644 --- a/include/qemu/processor.h +++ b/include/qemu/processor.h @@ -7,8 +7,6 @@ #ifndef QEMU_PROCESSOR_H #define QEMU_PROCESSOR_H -#include "qemu/atomic.h" - #if defined(__i386__) || defined(__x86_64__) # define cpu_relax() asm volatile("rep; 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Mon, 28 Aug 2023 15:14:28 -0700 (PDT) Received: from m1x-phil.lan ([176.164.201.64]) by smtp.gmail.com with ESMTPSA id m24-20020a7bca58000000b00401b242e2e6sm13062052wml.47.2023.08.28.15.14.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 28 Aug 2023 15:14:27 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 11/11] exec/translation-block: Clean up includes Date: Tue, 29 Aug 2023 00:13:14 +0200 Message-ID: <20230828221314.18435-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230828221314.18435-1-philmd@linaro.org> References: <20230828221314.18435-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, SUSPICIOUS_RECIPS=2.51 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org 'qemu/atomic.h' and 'exec/target_page.h' are not used. 'qemu/interval-tree.h' is only required for user emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/translation-block.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/exec/translation-block.h b/include/exec/translation-block.h index 5119924927..b785751774 100644 --- a/include/exec/translation-block.h +++ b/include/exec/translation-block.h @@ -7,11 +7,11 @@ #ifndef EXEC_TRANSLATION_BLOCK_H #define EXEC_TRANSLATION_BLOCK_H -#include "qemu/atomic.h" #include "qemu/thread.h" -#include "qemu/interval-tree.h" #include "exec/cpu-common.h" -#include "exec/target_page.h" +#ifdef CONFIG_USER_ONLY +#include "qemu/interval-tree.h" +#endif /* * Page tracking code uses ram addresses in system mode, and virtual