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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id t16-20020a5d6a50000000b0030ae901bc54sm5983854wrw.62.2023.07.21.23.21.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jul 2023 23:21:16 -0700 (PDT) From: Andrew Jones To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, mtosatti@redhat.com, peter.maydell@linaro.org, pasic@linux.ibm.com, borntraeger@linux.ibm.com, thuth@redhat.com, dbarboza@ventanamicro.com, kvm@vger.kernel.org, qemu-arm@nongnu.org, qemu-s390x@nongnu.org Subject: [PATCH] kvm: Remove KVM_CREATE_IRQCHIP support assumption Date: Sat, 22 Jul 2023 08:21:16 +0200 Message-ID: <20230722062115.11950-2-ajones@ventanamicro.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Content-type: text/plain Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=ajones@ventanamicro.com; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Since Linux commit 00f918f61c56 ("RISC-V: KVM: Skeletal in-kernel AIA irqchip support") checking KVM_CAP_IRQCHIP returns non-zero when the RISC-V platform has AIA. The cap indicates KVM supports at least one of the following ioctls: KVM_CREATE_IRQCHIP KVM_IRQ_LINE KVM_GET_IRQCHIP KVM_SET_IRQCHIP KVM_GET_LAPIC KVM_SET_LAPIC but the cap doesn't imply that KVM must support any of those ioctls in particular. However, QEMU was assuming the KVM_CREATE_IRQCHIP ioctl was supported. Stop making that assumption by introducing a KVM parameter that each architecture which supports KVM_CREATE_IRQCHIP sets. Adding parameters isn't awesome, but given how the KVM_CAP_IRQCHIP isn't very helpful on its own, we don't have a lot of options. Signed-off-by: Andrew Jones --- While this fixes booting guests on riscv KVM with AIA it's unlikely to get merged before the QEMU support for KVM AIA[1] lands, which would also fix the issue. I think this patch is still worth considering though since QEMU's assumption is wrong. [1] https://lore.kernel.org/all/20230714084429.22349-1-yongxuan.wang@sifive.com/ accel/kvm/kvm-all.c | 5 ++++- include/sysemu/kvm.h | 1 + target/arm/kvm.c | 3 +++ target/i386/kvm/kvm.c | 2 ++ target/s390x/kvm/kvm.c | 3 +++ 5 files changed, 13 insertions(+), 1 deletion(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 373d876c0580..0f5ff8630502 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -86,6 +86,7 @@ struct KVMParkedVcpu { }; KVMState *kvm_state; +bool kvm_has_create_irqchip; bool kvm_kernel_irqchip; bool kvm_split_irqchip; bool kvm_async_interrupts_allowed; @@ -2377,8 +2378,10 @@ static void kvm_irqchip_create(KVMState *s) if (s->kernel_irqchip_split == ON_OFF_AUTO_ON) { error_report("Split IRQ chip mode not supported."); exit(1); - } else { + } else if (kvm_has_create_irqchip) { ret = kvm_vm_ioctl(s, KVM_CREATE_IRQCHIP); + } else { + return; } } if (ret < 0) { diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 115f0cca79d1..84b1bb3dc91e 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -32,6 +32,7 @@ #ifdef CONFIG_KVM_IS_POSSIBLE extern bool kvm_allowed; +extern bool kvm_has_create_irqchip; extern bool kvm_kernel_irqchip; extern bool kvm_split_irqchip; extern bool kvm_async_interrupts_allowed; diff --git a/target/arm/kvm.c b/target/arm/kvm.c index b4c7654f4980..2fa87b495d68 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -250,6 +250,9 @@ int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa) int kvm_arch_init(MachineState *ms, KVMState *s) { int ret = 0; + + kvm_has_create_irqchip = kvm_check_extension(s, KVM_CAP_IRQCHIP); + /* For ARM interrupt delivery is always asynchronous, * whether we are using an in-kernel VGIC or not. */ diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index ebfaf3d24c79..6363e67f092d 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2771,6 +2771,8 @@ int kvm_arch_init(MachineState *ms, KVMState *s) } } + kvm_has_create_irqchip = kvm_check_extension(s, KVM_CAP_IRQCHIP); + return 0; } diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index a9e5880349d9..c053304adf94 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -391,6 +391,9 @@ int kvm_arch_init(MachineState *ms, KVMState *s) } kvm_set_max_memslot_size(KVM_SLOT_MAX_BYTES); + + kvm_has_create_irqchip = kvm_check_extension(s, KVM_CAP_S390_IRQCHIP); + return 0; }