From patchwork Mon Jul 10 17:50:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1805963 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=V6m1EVPS; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4R0BTl4F4qz20Ph for ; Tue, 11 Jul 2023 03:54:35 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qIv2x-000142-OA; Mon, 10 Jul 2023 13:51:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qIv2i-0000yK-Iy for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:26 -0400 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qIv2f-000070-Oc for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:24 -0400 Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-3159da54e95so1035829f8f.3 for ; Mon, 10 Jul 2023 10:51:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689011472; x=1691603472; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3N6F5aMrOUR9NN4jQ1KnUxsit6lU8XCjQJ4gcKL1MRw=; b=V6m1EVPSeqCVWicO+/rHjnCcNpkhEL/iqv2RogAXrTB1U7YrydIjf4GrICKB95LUt6 dmVndOyKeDp9ipw3v14498l33bPCm18TdAV8oJWPCi9dIma6Fzsmje4pWLuZ9RA1vUQt hoH80iBQYE48fJzeou89Wpv28rCzjlWI7V+affJwiV9sdxBF8Kwgr65ZBePTaUsXtzBS LFmTrOxCTe79GlNIc0732nFXNZHb7UYGoaE/nYjlBX40LNxDrsUfWx8rVPxy2s4nWbT+ SqMREOy02GAhdeHXABjkj7SI84cNaYIKdV8iauriivt6oBlRo6k9VPxPBYym7qw2j8VF pzKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689011472; x=1691603472; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3N6F5aMrOUR9NN4jQ1KnUxsit6lU8XCjQJ4gcKL1MRw=; b=UQDpQMKu7TaEW5JjG7c4q75MsGZP2A9oDZZ/EtRMhbLNKIAKSN6ZFfUVQRA9PiSUCJ ArhIXB7i+Xih/T/23pWjwdcw2EVH1CeMKtqKqcnamQH2dEdxAgg9bmx3YGtUEs2sWzvF ++KVEJNsAza+Dr80HDn91mR4sWvOd/0gQJxgAwkiEFI4WXz2opNCP6VfpQSWuOf5CdvI 2+hOZqMkPvvkPv12KfnRMGTLyCFfyXf5yEYbSTS7Z3/SOh1KwEhh2kARM4CFSI2XSCNP OVMowdY8Sa3zbBTdOSc2V5QNLTLJr90HEi838LB8NdC30vnEfz1UtG1TsgNJXsz1sHpb Iw+A== X-Gm-Message-State: ABy/qLY/cFVxP9EKNGLpuHxMjLt5iFpLgZMksp59Rhi9nJLiCYtSkzIf 9vov1LeEopwKGiFWBknFhvK9ReF/lskJTQgAsBECIw== X-Google-Smtp-Source: APBJJlEMKhigl9zNVvFziIhj5wOws/JGU3Th/RSu6I2YRCeySmK5ZXEtsWfqvzp6SIW6Npv5GvbNFQ== X-Received: by 2002:adf:f602:0:b0:314:34f3:10af with SMTP id t2-20020adff602000000b0031434f310afmr13287777wrp.14.1689011471834; Mon, 10 Jul 2023 10:51:11 -0700 (PDT) Received: from m1x-phil.lan (mst45-h01-176-184-47-225.dsl.sta.abo.bbox.fr. [176.184.47.225]) by smtp.gmail.com with ESMTPSA id f14-20020adfe90e000000b0030647449730sm18811wrm.74.2023.07.10.10.51.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:51:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 01/11] hw/char/pl011: Restrict MemoryRegionOps implementation access sizes Date: Mon, 10 Jul 2023 19:50:52 +0200 Message-Id: <20230710175102.32429-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The pl011_read() and pl011_write() handlers shift the offset argument by 2, so are implemented on a 32-bit boundary. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/char/pl011.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 77bbc2a982..73f1a3aea2 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -358,6 +358,8 @@ static const MemoryRegionOps pl011_ops = { .read = pl011_read, .write = pl011_write, .endianness = DEVICE_NATIVE_ENDIAN, + .impl.min_access_size = 4, + .impl.max_access_size = 4, }; static bool pl011_clock_needed(void *opaque) From patchwork Mon Jul 10 17:50:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1805957 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=y5uUmDnN; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4R0BSz6BH7z20Ph for ; Tue, 11 Jul 2023 03:53:55 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qIv2v-000111-OE; Mon, 10 Jul 2023 13:51:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qIv2h-0000yJ-V0 for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:26 -0400 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qIv2f-00007d-OH for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:23 -0400 Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-3fbc5d5746cso55566015e9.2 for ; Mon, 10 Jul 2023 10:51:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689011478; x=1691603478; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g1RcHKWAXUfeEYtWyqPORqFGKPtOv6GOxgVyqiigsFc=; b=y5uUmDnNbVC5zDbnaiFYq957DoXqqu8RAxBD+Y31SmxwKYvhYXyDnUznyyrt3IKYDV iqU8uy1ucCpoRNmb+IPUTJ4ofA+/rNgc2Tth6iCHJnLAm5qbO2hSYmrUoiZMK7GL3qeW 0QZWB7Gp25J2NmBuPKqPWWOXDWp/fb2GdD8Zwwv6SI8TmScJ5xxy1GUNkDt1rS3oC+0g v6ES36YiNezCPn8K01Pc/kTut1OYRurXHFIfY3Xulq3gg8nLVQotuhIILhzjJ5BIBovw RSPSsWpa7cK1yHFhOcGsT+uNY7/Jp0k7V+W+iah2pHSg/CHxE+9pBxPVUcN7ibINQMC7 179Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689011478; x=1691603478; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g1RcHKWAXUfeEYtWyqPORqFGKPtOv6GOxgVyqiigsFc=; b=dq7LsBLhZ1/Ksu6uw+67CVK4o05TCB/Pg0tmQohP7hxudPriP3fqm1oEwfFltG+XdY FhD/pptFEOZ+aEnzKAET7pFR6JZDYVQ9TqJE0E7l7BbW3Yt0ExrNmybHqTBCXpM/cUxz FVv/JvtLHJRgQO0KJhg8X2tsBgspupkc96ErMGwjTgf4sfFKwkGp/qKbADH07CBgoLxz JodVmTuUzqXw5DUX3dIuizO/mWz5V30S8HahIZ4I3tdPZl9euzheXLAckR7o+7rSzcDy mk4TDIUzVcVRdmsUxU2hf9wPFNqrwblbqPBTXkTxSvmy6epsMe9e0WqnmNrYHguT7ejj dABg== X-Gm-Message-State: ABy/qLaUBSG4CvnjshGfwsSZhX0+2qxObenTL5zgQokV8xkffHmB6Zv9 mpPJZhdRGmxgu+LafwM9j+s2prE8KVYEJx7UbMmclQ== X-Google-Smtp-Source: APBJJlEx0hBMzdSLWhtqdB4JBGPuHQNxCYSm6BEWNz2s21RtzUHtEVpA3XBVe+QWqAST5dYmUa7SLw== X-Received: by 2002:a05:600c:11cf:b0:3fc:e7d:ca3e with SMTP id b15-20020a05600c11cf00b003fc0e7dca3emr4982933wmi.2.1689011477981; Mon, 10 Jul 2023 10:51:17 -0700 (PDT) Received: from m1x-phil.lan (mst45-h01-176-184-47-225.dsl.sta.abo.bbox.fr. [176.184.47.225]) by smtp.gmail.com with ESMTPSA id w13-20020a5d4b4d000000b003143765e207sm30733wrs.49.2023.07.10.10.51.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:51:17 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 02/11] hw/char/pl011: Display register name in trace events Date: Mon, 10 Jul 2023 19:50:53 +0200 Message-Id: <20230710175102.32429-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org To avoid knowing the register addresses by heart, display their name along in the trace events. Since the MMIO region is 4K wide (0x1000 bytes), displaying the address with 3 digits is enough, so reduce the address format. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/char/pl011.c | 25 ++++++++++++++++++++++--- hw/char/trace-events | 4 ++-- 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 73f1a3aea2..c3203e5b41 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -51,6 +51,7 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) #define PL011_INT_TX 0x20 #define PL011_INT_RX 0x10 +/* Flag Register, UARTFR */ #define PL011_FLAG_TXFE 0x80 #define PL011_FLAG_RXFF 0x40 #define PL011_FLAG_TXFF 0x20 @@ -76,6 +77,24 @@ static const unsigned char pl011_id_arm[8] = static const unsigned char pl011_id_luminary[8] = { 0x11, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 }; +static const char *pl011_regname(hwaddr offset) +{ + static const char *const rname[] = { + [0] = "DR", [1] = "RSR", [6] = "FR", [8] = "ILPR", [9] = "IBRD", + [10] = "FBRD", [11] = "LCRH", [12] = "CR", [13] = "IFLS", [14] = "IMSC", + [15] = "RIS", [16] = "MIS", [17] = "ICR", [18] = "DMACR", + }; + unsigned idx = offset >> 2; + + if (idx < ARRAY_SIZE(rname) && rname[idx]) { + return rname[idx]; + } + if (idx >= 0x3f8 && idx <= 0x400) { + return "ID"; + } + return "UNKN"; +} + /* Which bits in the interrupt status matter for each outbound IRQ line ? */ static const uint32_t irqmask[] = { INT_E | INT_MS | INT_RT | INT_TX | INT_RX, /* combined IRQ */ @@ -191,7 +210,7 @@ static uint64_t pl011_read(void *opaque, hwaddr offset, break; } - trace_pl011_read(offset, r); + trace_pl011_read(offset, r, pl011_regname(offset)); return r; } @@ -234,7 +253,7 @@ static void pl011_write(void *opaque, hwaddr offset, PL011State *s = (PL011State *)opaque; unsigned char ch; - trace_pl011_write(offset, value); + trace_pl011_write(offset, value, pl011_regname(offset)); switch (offset >> 2) { case 0: /* UARTDR */ @@ -252,7 +271,7 @@ static void pl011_write(void *opaque, hwaddr offset, case 6: /* UARTFR */ /* Writes to Flag register are ignored. */ break; - case 8: /* UARTUARTILPR */ + case 8: /* UARTILPR */ s->ilpr = value; break; case 9: /* UARTIBRD */ diff --git a/hw/char/trace-events b/hw/char/trace-events index 2ecb36232e..babf4d35ea 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -54,9 +54,9 @@ escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=0x%0 # pl011.c pl011_irq_state(int level) "irq state %d" -pl011_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" +pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s" pl011_read_fifo(int read_count) "FIFO read, read_count now %d" -pl011_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" +pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s" pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d" pl011_put_fifo(uint32_t c, int read_count) "new char 0x%x read_count now %d" pl011_put_fifo_full(void) "FIFO now full, RXFF set" From patchwork Mon Jul 10 17:50:54 2023 Content-Type: text/plain; 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[176.184.47.225]) by smtp.gmail.com with ESMTPSA id u13-20020a7bcb0d000000b003fbc9b9699dsm433256wmj.45.2023.07.10.10.51.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:51:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 03/11] hw/char/pl011: Remove duplicated PL011_INT_[RT]X definitions Date: Mon, 10 Jul 2023 19:50:54 +0200 Message-Id: <20230710175102.32429-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org PL011_INT_TX duplicates INT_TX, and PL011_INT_RX INT_RX. Follow other register fields definitions from this file, keep the shorter form. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/char/pl011.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index c3203e5b41..96675f52cc 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -48,9 +48,6 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) return dev; } -#define PL011_INT_TX 0x20 -#define PL011_INT_RX 0x10 - /* Flag Register, UARTFR */ #define PL011_FLAG_TXFE 0x80 #define PL011_FLAG_RXFF 0x40 @@ -157,7 +154,7 @@ static uint64_t pl011_read(void *opaque, hwaddr offset, s->flags |= PL011_FLAG_RXFE; } if (s->read_count == s->read_trigger - 1) - s->int_level &= ~ PL011_INT_RX; + s->int_level &= ~ INT_RX; trace_pl011_read_fifo(s->read_count); s->rsr = c >> 8; pl011_update(s); @@ -262,7 +259,7 @@ static void pl011_write(void *opaque, hwaddr offset, /* XXX this blocks entire thread. Rewrite to use * qemu_chr_fe_write and background I/O callbacks */ qemu_chr_fe_write_all(&s->chr, &ch, 1); - s->int_level |= PL011_INT_TX; + s->int_level |= INT_TX; pl011_update(s); break; case 1: /* UARTRSR/UARTECR */ @@ -350,7 +347,7 @@ static void pl011_put_fifo(void *opaque, uint32_t value) s->flags |= PL011_FLAG_RXFF; } if (s->read_count == s->read_trigger) { - s->int_level |= PL011_INT_RX; + s->int_level |= INT_RX; pl011_update(s); } } From patchwork Mon Jul 10 17:50:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1805956 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=l1to8dCq; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4R0BSs1MhPz20Ph for ; Tue, 11 Jul 2023 03:53:49 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qIv31-000161-Il; Mon, 10 Jul 2023 13:51:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qIv2s-000115-KD for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:35 -0400 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qIv2r-0000I4-0s for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:34 -0400 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-3fbc63c2e84so53532165e9.3 for ; Mon, 10 Jul 2023 10:51:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689011489; x=1691603489; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5e/SO+N+RtoeTP991orha9zplbwHg+c4RLGUXXBx0k4=; b=l1to8dCqQMacVHqlZnoIvGbQ57CXMQdasA54stxvsEmNLwwh3akC+e078Wl7OxrXi6 2U7oyu7bcwuXqghuoNUsE4H0+0TpEhAXbmNlL4a2SQeuACisCQOAUPo8IpErTzEL37Tg uAXOsWG4bnorXqmr5Dj8/DanfwTLTJoFOyTLE+mY3H/L/8IIE4epH/CCtLGKqIvSkl99 NzUu1WR3S84/KACbsMdOfOMMCmKb4R3Qu/NJ0cKOn+KxiLH4q8BuX1JV9THt5DSMcFPI wdIulnYs/D/bjxlkFf2QWrLqU8DjHJ8zXeenUP8YbN0jVBu/qsxXunYGq/Jw8XPAvwmI U2+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689011489; x=1691603489; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5e/SO+N+RtoeTP991orha9zplbwHg+c4RLGUXXBx0k4=; b=OyhF/kVv6EJAMh7KCTZmwbziRUjC/6fXwGY+GLhTYxCwZY0N/TuIMboPermPGSXbyv cbamcSuJUr6Ig0Od/Dpwrrs5ZbzIrZeEl4vNbvFSBUEZR739etpak4StL9/nNdznE6Qb sKgsUYpadl/BaUZjQRShbIxzhfoDsDkTLhKv/t4Si2uMQP3lba64pElEGfLPKaAShpDA tMn/fq4d8GZAP/l0a8DJ4TpwnIZKxJgU5Gt8Nn0DMP0FGbMho0ObPe4dtsOzMwylEvCi OssShwLv8850k2z/2ta/zQ0my0+7sd3JiNQ/30MiqAOrUv0qrpdhZlxP5U7+trfGbqOX 59LA== X-Gm-Message-State: ABy/qLYiYlK8XsWie4Ks6g0FrIboyCdaMEHLXnCbyzXrFitSvry5rJuE SeR1+C4qmdmY+nbRqAQvkYxtxcnQTeibkuhVHp3aqw== X-Google-Smtp-Source: APBJJlGETkW6jonw0dwOMG9CLw8/pMo4Dtvltzj593tgf7jvZGD6BUaWE0iks31FZneLuDq9t3Pb5A== X-Received: by 2002:adf:ef0e:0:b0:314:1e47:8bc2 with SMTP id e14-20020adfef0e000000b003141e478bc2mr13833467wro.0.1689011489220; Mon, 10 Jul 2023 10:51:29 -0700 (PDT) Received: from m1x-phil.lan (mst45-h01-176-184-47-225.dsl.sta.abo.bbox.fr. [176.184.47.225]) by smtp.gmail.com with ESMTPSA id q14-20020a05600000ce00b003062b2c5255sm36246wrx.40.2023.07.10.10.51.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:51:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 04/11] hw/char/pl011: Replace magic values by register field definitions Date: Mon, 10 Jul 2023 19:50:55 +0200 Message-Id: <20230710175102.32429-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org 0x400 is Data Register Break Error (DR_BE), 0x10 is Line Control Register Fifo Enabled (LCR_FEN) and 0x1 is Send Break (LCR_BRK). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/char/pl011.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 96675f52cc..58edeb9ddb 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -54,6 +54,9 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) #define PL011_FLAG_TXFF 0x20 #define PL011_FLAG_RXFE 0x10 +/* Data Register, UARTDR */ +#define DR_BE (1 << 10) + /* Interrupt status bits in UARTRIS, UARTMIS, UARTIMSC */ #define INT_OE (1 << 10) #define INT_BE (1 << 9) @@ -69,6 +72,10 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) #define INT_E (INT_OE | INT_BE | INT_PE | INT_FE) #define INT_MS (INT_RI | INT_DSR | INT_DCD | INT_CTS) +/* Line Control Register, UARTLCR_H */ +#define LCR_FEN (1 << 4) +#define LCR_BRK (1 << 0) + static const unsigned char pl011_id_arm[8] = { 0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; static const unsigned char pl011_id_luminary[8] = @@ -116,7 +123,7 @@ static void pl011_update(PL011State *s) static bool pl011_is_fifo_enabled(PL011State *s) { - return (s->lcr & 0x10) != 0; + return (s->lcr & LCR_FEN) != 0; } static inline unsigned pl011_get_fifo_depth(PL011State *s) @@ -218,7 +225,7 @@ static void pl011_set_read_trigger(PL011State *s) the threshold. However linux only reads the FIFO in response to an interrupt. Triggering the interrupt when the FIFO is non-empty seems to make things work. */ - if (s->lcr & 0x10) + if (s->lcr & LCR_FEN) s->read_trigger = (s->ifl >> 1) & 0x1c; else #endif @@ -281,11 +288,11 @@ static void pl011_write(void *opaque, hwaddr offset, break; case 11: /* UARTLCR_H */ /* Reset the FIFO state on FIFO enable or disable */ - if ((s->lcr ^ value) & 0x10) { + if ((s->lcr ^ value) & LCR_FEN) { pl011_reset_fifo(s); } - if ((s->lcr ^ value) & 0x1) { - int break_enable = value & 0x1; + if ((s->lcr ^ value) & LCR_BRK) { + int break_enable = value & LCR_BRK; qemu_chr_fe_ioctl(&s->chr, CHR_IOCTL_SERIAL_SET_BREAK, &break_enable); } @@ -359,8 +366,9 @@ static void pl011_receive(void *opaque, const uint8_t *buf, int size) static void pl011_event(void *opaque, QEMUChrEvent event) { - if (event == CHR_EVENT_BREAK) - pl011_put_fifo(opaque, 0x400); + if (event == CHR_EVENT_BREAK) { + pl011_put_fifo(opaque, DR_BE); + } } static void pl011_clock_update(void *opaque, ClockEvent event) From patchwork Mon Jul 10 17:50:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1805960 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=jn7tXF0V; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4R0BTP1Sbfz20cW for ; Tue, 11 Jul 2023 03:54:17 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qIv31-00016C-O7; Mon, 10 Jul 2023 13:51:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qIv2z-00015Q-LC for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:41 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qIv2w-0000OO-Te for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:41 -0400 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-3090d3e9c92so5645048f8f.2 for ; Mon, 10 Jul 2023 10:51:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689011494; x=1691603494; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vINMBBFp0tNBmc0jxCNSawkrMv3zFmYswmW1JkHmuF4=; b=jn7tXF0Vb0kI9zsoLl9pbMSgyVMTyYig7Y7CT3MRnsBjQTEb/vS3dk7yZAseCFEMCk 6HeReqKI82E32hJ9ZZhOEoVtrMYY+bVlDHWa1XJsCuY2rmP388jPFHHBdtF9lN26/UU6 QcE16m6QH0l42CQgMTI8mgBeTOhXdyBBxNRU1bYSAkXlEpRRa6tgj9DVzgMnkepE6re4 KAv1z49zOkq6eJib3YdFIHV3RtSLZa+UFcXQ3WqhD5mjSv5EFEhTcy/T4txY9xJjRWON ozhEaklkTE6GFj0ozcd2bHIHB7qa2oGjGLuFCPrBfMHi8L1Ns6Ue5M66BnJ4X3B56R6h vVXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689011494; x=1691603494; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vINMBBFp0tNBmc0jxCNSawkrMv3zFmYswmW1JkHmuF4=; b=IcqCKqgJEXJ8abHARYuf3e2q2Ah91tSSfIrXFfn6YIeyn0/LFHLp9W3ydoynqUbiti oi0w9EgRRCKbx6edgRmhVJ2IMOHtG59yEgt9yP/BdOT7TjRjI+5sAtJAir9R9JJSbNmf eGTZvBCt0kF2Z2h9IxGcMd4fWH32hUfeoFn3ty6tPU5Lh9oClSR0p9HlojE2lpnKbPDq fJOqB3pf1Xl73bNmAqpsws8eF7nxEPI/CRrbUSAeNq9k0qLt8okLLFMeV3z4INtasi62 FmNU9I9sZStcGVr5TTp5tgOUKwWdmN0AlSFmLGdXz0o0Rw7weGWjUf4MUDUjPq33Tc/t gP4A== X-Gm-Message-State: ABy/qLZiUnsBgvltFee9B6bc3lecKA+ak2hFIVcoRqU5+4wAPXlEhd2L Yw52YlaVKqtTDnKMK0TOySWA2z2T3aGOyq2d7VdpNQ== X-Google-Smtp-Source: APBJJlGaBovkyYwERLmKrPb7OJiP9ZlPYVS5p/QuhJlB/wE5PatCPCuRKHLHBISsokvssjA8uAqG2A== X-Received: by 2002:a5d:4ec7:0:b0:314:3843:ebaa with SMTP id s7-20020a5d4ec7000000b003143843ebaamr16189249wrv.68.1689011494797; Mon, 10 Jul 2023 10:51:34 -0700 (PDT) Received: from m1x-phil.lan (mst45-h01-176-184-47-225.dsl.sta.abo.bbox.fr. [176.184.47.225]) by smtp.gmail.com with ESMTPSA id k3-20020a5d66c3000000b00314398e4dd4sm29988wrw.54.2023.07.10.10.51.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:51:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 05/11] hw/char/pl011: Split RX/TX path of pl011_reset_fifo() Date: Mon, 10 Jul 2023 19:50:56 +0200 Message-Id: <20230710175102.32429-6-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org To be able to reset the RX or TX FIFO separately, split pl011_reset_fifo() in two. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/char/pl011.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 58edeb9ddb..1f07c7b021 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -132,14 +132,21 @@ static inline unsigned pl011_get_fifo_depth(PL011State *s) return pl011_is_fifo_enabled(s) ? PL011_FIFO_DEPTH : 1; } -static inline void pl011_reset_fifo(PL011State *s) +static inline void pl011_reset_rx_fifo(PL011State *s) { s->read_count = 0; s->read_pos = 0; /* Reset FIFO flags */ - s->flags &= ~(PL011_FLAG_RXFF | PL011_FLAG_TXFF); - s->flags |= PL011_FLAG_RXFE | PL011_FLAG_TXFE; + s->flags &= ~PL011_FLAG_RXFF; + s->flags |= PL011_FLAG_RXFE; +} + +static inline void pl011_reset_tx_fifo(PL011State *s) +{ + /* Reset FIFO flags */ + s->flags &= ~PL011_FLAG_TXFF; + s->flags |= PL011_FLAG_TXFE; } static uint64_t pl011_read(void *opaque, hwaddr offset, @@ -289,7 +296,8 @@ static void pl011_write(void *opaque, hwaddr offset, case 11: /* UARTLCR_H */ /* Reset the FIFO state on FIFO enable or disable */ if ((s->lcr ^ value) & LCR_FEN) { - pl011_reset_fifo(s); + pl011_reset_rx_fifo(s); + pl011_reset_tx_fifo(s); } if ((s->lcr ^ value) & LCR_BRK) { int break_enable = value & LCR_BRK; @@ -506,7 +514,8 @@ static void pl011_reset(DeviceState *dev) s->ifl = 0x12; s->cr = 0x300; s->flags = 0; - pl011_reset_fifo(s); + pl011_reset_rx_fifo(s); + pl011_reset_tx_fifo(s); } static void pl011_class_init(ObjectClass *oc, void *data) From patchwork Mon Jul 10 17:50:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1805954 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=fY5N0dtv; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4R0BRW1XZCz20Ph for ; Tue, 11 Jul 2023 03:52:39 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qIv3B-00018r-7q; Mon, 10 Jul 2023 13:51:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qIv35-00016Q-RQ for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:47 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qIv31-0000P8-0p for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:47 -0400 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-313f1085ac2so4610044f8f.1 for ; Mon, 10 Jul 2023 10:51:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689011500; x=1691603500; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HV7jdQi4bEVcp54eyyf8vkcdig+8iB+0mpkWJfR4/DM=; b=fY5N0dtvRGCbZtWbx9sN0hPUOOyTjaaazesQVpbBowQuAMYOIiHwvVLID+MPWwLTdl bEJqJmUKCi/5rfiEJpw7zmtrtPAN0YsthmWKS0EdUuLqbyxCRofrj8yrWPj2YE4xKVVq wUfzDUgqczbSUPDBiG2nX7KXZxwuIYl6anyqUHAOdxlSQpTDjpb+CL2wP67ENCqvJtYO akpSSlAJCQvKYeko9CD8N6ZIi8R/GKEWDpJcP0c6bDZ0yxEYVKRAV1yy36aKojkHh+sW 9GMq6ESc+hn43rCQ3aP4Zwyalh+hc1whfMEnf4Lw6Z77JsmYOlHqQ0L0iR+eWpHHIrTG NpJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689011500; x=1691603500; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HV7jdQi4bEVcp54eyyf8vkcdig+8iB+0mpkWJfR4/DM=; b=Tuk0v+EVRYBaZsFHqeHi/3peo4eUC58vaPC73o3Go5AJr97/m/75qjB2vTUiaJWIv5 n+wDE7ovbdn2kN8K9AIAV7MXuh06lLq3hUy7zpeqgKwrCzRKLILOu4NyPKWyTU1b2TMP AzxYxPuktCXdNMnnf9felVVfmRj4+sAjS174PSmZg0dT0nBzt/xyQLmln/0o8FCZO73B YBXZr/ZZWa1WrfXhY9mnHUa6y0RU3F4McZbrfY46h6KQTyHJKIzjMZ6T4lTcXxtRgAa5 xNqgInVX5EWJOcpvOLNXw/AcoEIxUx+ACbI5oYDQPjpDLWIAyMI4ORbeRqaMDo4u/Iy2 oL+g== X-Gm-Message-State: ABy/qLaeyqPXt9AVLweHQyYW/n70Dt5Erv+XlYTl9YAN+P3f/dSXb8iB anHvi+qwUhknWr8H873D65KGDDXZ48wsj9p9rxrlhg== X-Google-Smtp-Source: APBJJlHDBaazICpyGhOY995Ivwofx9KroCWeobCu6JYe6jaUfJhR2XcBDZcPHcv5ddzbMHLn6etZFw== X-Received: by 2002:a5d:510d:0:b0:314:114e:6e0 with SMTP id s13-20020a5d510d000000b00314114e06e0mr12298007wrt.3.1689011500455; Mon, 10 Jul 2023 10:51:40 -0700 (PDT) Received: from m1x-phil.lan (mst45-h01-176-184-47-225.dsl.sta.abo.bbox.fr. [176.184.47.225]) by smtp.gmail.com with ESMTPSA id cr13-20020a05600004ed00b003143ba62cf4sm15384wrb.86.2023.07.10.10.51.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:51:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 06/11] hw/char/pl011: Extract pl011_write_txdata() from pl011_write() Date: Mon, 10 Jul 2023 19:50:57 +0200 Message-Id: <20230710175102.32429-7-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org When implementing FIFO, this code will become more complex. Start by factoring it out to a new pl011_write_txdata() function. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- hw/char/pl011.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 1f07c7b021..7bc7819d8b 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -149,6 +149,17 @@ static inline void pl011_reset_tx_fifo(PL011State *s) s->flags |= PL011_FLAG_TXFE; } +static void pl011_write_txdata(PL011State *s, const uint8_t *buf, int length) +{ + /* ??? Check if transmitter is enabled. */ + + /* XXX this blocks entire thread. Rewrite to use + * qemu_chr_fe_write and background I/O callbacks */ + qemu_chr_fe_write_all(&s->chr, buf, 1); + s->int_level |= INT_TX; + pl011_update(s); +} + static uint64_t pl011_read(void *opaque, hwaddr offset, unsigned size) { @@ -262,19 +273,12 @@ static void pl011_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { PL011State *s = (PL011State *)opaque; - unsigned char ch; trace_pl011_write(offset, value, pl011_regname(offset)); switch (offset >> 2) { case 0: /* UARTDR */ - /* ??? Check if transmitter is enabled. */ - ch = value; - /* XXX this blocks entire thread. Rewrite to use - * qemu_chr_fe_write and background I/O callbacks */ - qemu_chr_fe_write_all(&s->chr, &ch, 1); - s->int_level |= INT_TX; - pl011_update(s); + pl011_write_txdata(s, (uint8_t *) &value, 1); break; case 1: /* UARTRSR/UARTECR */ s->rsr = 0; From patchwork Mon Jul 10 17:50:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1805959 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=tsYQMg2N; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4R0BTP0l1cz20bq for ; Tue, 11 Jul 2023 03:54:17 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qIv3C-0001Bh-Cn; Mon, 10 Jul 2023 13:51:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qIv3A-00018t-1u for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:53 -0400 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qIv37-0000S3-UI for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:51:51 -0400 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-3fbca8935bfso49508965e9.3 for ; Mon, 10 Jul 2023 10:51:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689011506; x=1691603506; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OE5HK+6QzUc16kbWLHpwXHz/gljwcqm0t8YsiPIa+LE=; b=tsYQMg2NbC33ht6evJmCGeSa7UL/wN88thUqyVnXUKJhrqDGOgovZaK9R1khey0t0V PyoJRqKvVn/Yd+cPopI/5dvF2h0qS5Ezd/Im1smwkUbk3OpqrpR/tvk+ug/CPleCD2jn y7HspVdPfjr3jxxW0PKb706nk6VeyCqGidMkvB8pZg1HmAr7Runxp9kYODIH9pRBPijk 1ye/EBtVY9Q3/iQoNRVFuJG2wpbpVmTtigFlfhCCHW8XjN3GJLKryA6px8DXBb79ley3 0UqHyj1HLgdz1Den5lROTV5lGe0ApSKERlghFJHMykkaTtvmVczV0Al6RPPofYkiu2uA XjxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689011506; x=1691603506; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OE5HK+6QzUc16kbWLHpwXHz/gljwcqm0t8YsiPIa+LE=; b=fAi9dHOHg8Tci4zHaKnPF/2VvPAG4HWR976FbaMdSilumrYP8WvzJX/Cd42RGexcef TDO0eYTV5F4gt0zDDZ0A4c7qbTkSiiRUnI85iVCgcjNkFzdO1Bak338zZt6DxgL+ehET nLY4D3/LF90cX1E8bp6ptvqs8APzTwnqyGBuLRoSBogHAAtmgcG7WU8kVfGpc3dB8ej6 IgXI8kwCDesQujJZnfN5TGXgJ37LKx0mrEoDcUfHZD9HXOn/0CrQhWb3KmXFaBd//1yj YtZ1Eu+LkLThIccqtEuIA9NW3pAxbJQ9iu3HelPu8dkpi/G7tPVcX3iHTC2/n0WiaZtZ f3rg== X-Gm-Message-State: ABy/qLYaJNeooWxP3wfy1VQRXUnNjy8OKksnnuAz+MFM4yaFKeZ6TDw4 gEV5AtM7am8Q5Fcw3BlBgMbALHx7tI9wPlO1ecF5Jw== X-Google-Smtp-Source: APBJJlGTvuvn6A71yE7i5fL3LrX5XO9YvpLbbataZS1IeAugak+MoNlv7E7GWVtCndLHD/YCKFEzhQ== X-Received: by 2002:a7b:c5d0:0:b0:3fb:b008:1ff6 with SMTP id n16-20020a7bc5d0000000b003fbb0081ff6mr10921652wmk.0.1689011506342; Mon, 10 Jul 2023 10:51:46 -0700 (PDT) Received: from m1x-phil.lan (mst45-h01-176-184-47-225.dsl.sta.abo.bbox.fr. [176.184.47.225]) by smtp.gmail.com with ESMTPSA id k12-20020a7bc30c000000b003fba92fad35sm10908860wmj.26.2023.07.10.10.51.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:51:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 07/11] hw/char/pl011: Extract pl011_read_rxdata() from pl011_read() Date: Mon, 10 Jul 2023 19:50:58 +0200 Message-Id: <20230710175102.32429-8-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org To keep MemoryRegionOps read/write handlers with similar logic, factor pl011_read_txdata() out of pl011_read(), similar to the previous commit did to pl011_write(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/char/pl011.c | 40 +++++++++++++++++++++++----------------- 1 file changed, 23 insertions(+), 17 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 7bc7819d8b..e2e3d48b91 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -160,31 +160,37 @@ static void pl011_write_txdata(PL011State *s, const uint8_t *buf, int length) pl011_update(s); } +static uint32_t pl011_read_rxdata(PL011State *s) +{ + uint32_t c; + + s->flags &= ~PL011_FLAG_RXFF; + c = s->read_fifo[s->read_pos]; + if (s->read_count > 0) { + s->read_count--; + s->read_pos = (s->read_pos + 1) & (pl011_get_fifo_depth(s) - 1); + } + if (s->read_count == 0) { + s->flags |= PL011_FLAG_RXFE; + } + if (s->read_count == s->read_trigger - 1) + s->int_level &= ~ INT_RX; + trace_pl011_read_fifo(s->read_count); + s->rsr = c >> 8; + pl011_update(s); + qemu_chr_fe_accept_input(&s->chr); + return c; +} + static uint64_t pl011_read(void *opaque, hwaddr offset, unsigned size) { PL011State *s = (PL011State *)opaque; - uint32_t c; uint64_t r; switch (offset >> 2) { case 0: /* UARTDR */ - s->flags &= ~PL011_FLAG_RXFF; - c = s->read_fifo[s->read_pos]; - if (s->read_count > 0) { - s->read_count--; - s->read_pos = (s->read_pos + 1) & (pl011_get_fifo_depth(s) - 1); - } - if (s->read_count == 0) { - s->flags |= PL011_FLAG_RXFE; - } - if (s->read_count == s->read_trigger - 1) - s->int_level &= ~ INT_RX; - trace_pl011_read_fifo(s->read_count); - s->rsr = c >> 8; - pl011_update(s); - qemu_chr_fe_accept_input(&s->chr); - r = c; + r = pl011_read_rxdata(s); break; case 1: /* UARTRSR */ r = s->rsr; From patchwork Mon Jul 10 17:50:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1805953 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; 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[176.184.47.225]) by smtp.gmail.com with ESMTPSA id l3-20020a1ced03000000b003fc0062f0f8sm489126wmh.9.2023.07.10.10.51.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:51:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 08/11] hw/char/pl011: Warn when using disabled transmitter Date: Mon, 10 Jul 2023 19:50:59 +0200 Message-Id: <20230710175102.32429-9-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We shouldn't transmit characters when the full UART or its transmitter is disabled. However we don't want to break the possibly incomplete "my first bare metal assembly program"s, so we choose to simply display a warning when this occurs. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/char/pl011.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index e2e3d48b91..03dce0a1ec 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -76,6 +76,10 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) #define LCR_FEN (1 << 4) #define LCR_BRK (1 << 0) +/* Control Register, UARTCR */ +#define CR_TXE (1 << 8) +#define CR_UARTEN (1 << 0) + static const unsigned char pl011_id_arm[8] = { 0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; static const unsigned char pl011_id_luminary[8] = @@ -151,7 +155,12 @@ static inline void pl011_reset_tx_fifo(PL011State *s) static void pl011_write_txdata(PL011State *s, const uint8_t *buf, int length) { - /* ??? Check if transmitter is enabled. */ + if (!(s->cr & CR_UARTEN)) { + qemu_log_mask(LOG_GUEST_ERROR, "PL011 write data but UART disabled\n"); + } + if (!(s->cr & CR_TXE)) { + qemu_log_mask(LOG_GUEST_ERROR, "PL011 write data but TX disabled\n"); + } /* XXX this blocks entire thread. Rewrite to use * qemu_chr_fe_write and background I/O callbacks */ From patchwork Mon Jul 10 17:51:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1805958 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=eb39i6i7; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4R0BTN5j3Fz20Ph for ; Tue, 11 Jul 2023 03:54:16 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qIv3K-0001H7-NG; Mon, 10 Jul 2023 13:52:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qIv3I-0001Ei-OZ for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:52:00 -0400 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qIv3H-0000Xq-7j for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:52:00 -0400 Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-3143b72c5ffso5639329f8f.3 for ; Mon, 10 Jul 2023 10:51:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689011517; x=1691603517; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ef0gwQxZ6wwALYiU0bKC0wOaAk58Ouu2v7vVPMXHDsg=; b=eb39i6i7xi4nlBgWcpkrPATAugD/ggTyTyPTcXl+fGuW6SV0vt8rj+5FHUlxaH1vnX iLDdCSljVhVQRZBY0YhxR0w4s0lkssx6npLSXepZhggJnSx/z535pdpgeLuYUAHlcE5A AtkEXWML8t6KVRp4AbuNsBCjbYq9ahdSX2dnBbryKfxmr0OMA/LZQxXYsyNQBrA00JbK mE8xfj8oGKbuQEbSMD49k1ZCkR9YVWOFbGdbkTjvL5+UKjwm8hV7/Bas7q80Tl/Ckb72 6cdoWJkMxlaNMguwahRwZuIC2GcERO+FJryvCRgN02rtSQY9bJIq4EZ8vgxpcPD5JW7y n5nQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689011517; x=1691603517; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ef0gwQxZ6wwALYiU0bKC0wOaAk58Ouu2v7vVPMXHDsg=; b=OcNDKCv29qzdrynpgZ8RUUlg93kb9H8zZROhX71YggK5rtxyLBxIcRs9aWpnbpnTAG zo5by8/6tdC2e8mM6OoZLH8h8Hk9h2WQNkB3vRChOIWseoiw3HAgt+1hQMXBCjDLDr7w hSSYNXWl5L+rUgsaD53HSe6dfNAUb2EyUx02lV48DXeuwvcpjxjdGgQcR/ioTiXRortu n3Au3tdOVhgOvk0DmbfxRXU/k1uQfIqECIrw+wh9fK0TpeFqEyTZxF/rZ0NQMPXELAsp z33gimTc3BTAeXrCAqSm6U1yUW7bILtbja8ld1WKUbb7N3Gfo8VHkDX08WaEhEjEk062 DUIQ== X-Gm-Message-State: ABy/qLZA6Zwmds01xwL180dhWkHuKvOYz1zL3Rp9QJPxqAxAqYuEnqoF yrZRgG/svo5uJgU4GtwD3hvRwDy+aBEigwwWv7OvxQ== X-Google-Smtp-Source: APBJJlEw9Mu92KmORByDTBzHmJFR/rQlWsrR8POA7WWXn5RQfPn8wTX4kPsHuxuywA9ys0awNDcUvA== X-Received: by 2002:adf:d84e:0:b0:314:2d71:1f7a with SMTP id k14-20020adfd84e000000b003142d711f7amr16256091wrl.32.1689011517665; Mon, 10 Jul 2023 10:51:57 -0700 (PDT) Received: from m1x-phil.lan (mst45-h01-176-184-47-225.dsl.sta.abo.bbox.fr. [176.184.47.225]) by smtp.gmail.com with ESMTPSA id p7-20020a5d6387000000b003143801f8d8sm7154wru.103.2023.07.10.10.51.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:51:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 09/11] hw/char/pl011: Check if receiver is enabled Date: Mon, 10 Jul 2023 19:51:00 +0200 Message-Id: <20230710175102.32429-10-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Do not receive characters when UART or receiver are disabled. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/char/pl011.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 03dce0a1ec..59d239cb83 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -77,6 +77,7 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) #define LCR_BRK (1 << 0) /* Control Register, UARTCR */ +#define CR_RXE (1 << 9) #define CR_TXE (1 << 8) #define CR_UARTEN (1 << 0) @@ -357,9 +358,11 @@ static void pl011_write(void *opaque, hwaddr offset, static int pl011_can_receive(void *opaque) { PL011State *s = (PL011State *)opaque; - int r; + int r = 0; - r = s->read_count < pl011_get_fifo_depth(s); + if ((s->cr & CR_UARTEN) && (s->cr & CR_RXE)) { + r = s->read_count < pl011_get_fifo_depth(s); + } trace_pl011_can_receive(s->lcr, s->read_count, r); return r; } From patchwork Mon Jul 10 17:51:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1805962 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=jRPo//N8; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4R0BTY6wJDz20Ph for ; Tue, 11 Jul 2023 03:54:25 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qIv3T-0001JO-Qz; Mon, 10 Jul 2023 13:52:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qIv3R-0001Ip-5Q for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:52:09 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qIv3O-0000ZH-RZ for qemu-devel@nongnu.org; Mon, 10 Jul 2023 13:52:08 -0400 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-314417861b9so4857164f8f.0 for ; Mon, 10 Jul 2023 10:52:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689011523; x=1691603523; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NZ8DNr0ETWD1Ms+NV1FciyuZYg6CvPu0oUthK2WDbYk=; b=jRPo//N88Xz2LKiydkosg17oCPcLw8bBUkxqEyYDL7buG+CtATrHJ/0Vbr0KK7fESh Y5jZtAtBb8faX3h0hzHRjbwptN6JV3RM4wcvuB/vp5tLRlCa1dBWSDEDNiAeW0DafnjW cVjoJyKV3HpPk+nx5qSGVRBiYpe2tWgekqYqqOVLbk4eFR4XvB2CHu4fmRgUI7SuuSq/ E43UpmrWHYeEmxwFRXFWKHAxt3mjqsKzoi6pNuwKiZ3lo6BYo4CgzSSBuaxtms2TlrPh tFTK7zP+EkXeOlJjdwJQNP5FUn4zxArGF3/zMPyrWylERgd4g4BnzVxSE9DRcxEWtGbj MR4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689011523; x=1691603523; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NZ8DNr0ETWD1Ms+NV1FciyuZYg6CvPu0oUthK2WDbYk=; b=ci1I24bM+WLC7bzcp/t/ll8QWrcJhMTwSu0+y8xa3+sk2MF36HlN+8UMr4Dlvpa2pm nZawIcVcAZkwfC6EqJxy8PFrc3UkW+21hg1XE8T4c9VPxCI1ckQPR3vAE2UJEiSiIRdD YnklIcFbr0G9bO1mhbNx0Cvhq+ASku8YB4v2P3qwZWfS0s4CdkRsFuK9VruDSQpMUlJW H8rrPIhEhNnLg35a/YSz+6NiNgxUR4mscwqHdXqPzFpPlw9rVbUVZyi3axfd2tfVVe2h GfULj6v5XNItRy67DhWT7bYsUCbkZ4JDUMqvlNYXy2Uq7hXD1q7vdN6zarpqiD9Aj5xM bJHA== X-Gm-Message-State: ABy/qLbVpQldBrwpZ7Y52fgOlHX9gU7RCeWeaPTWtrGray0JbJ5bQqPm FF8iYFeU7YlS4mUV/KTHybdvOxJbIFrcywdcgLY/Ww== X-Google-Smtp-Source: APBJJlG0bCbTPyIF2mpHdv8nJElaML7v6z6Rr3jZG5bLcNpBm9grpTJxEx7vqk+D6GiDwuIo9COf9w== X-Received: by 2002:adf:ecc8:0:b0:30f:af06:7320 with SMTP id s8-20020adfecc8000000b0030faf067320mr12999692wro.23.1689011523373; Mon, 10 Jul 2023 10:52:03 -0700 (PDT) Received: from m1x-phil.lan (mst45-h01-176-184-47-225.dsl.sta.abo.bbox.fr. [176.184.47.225]) by smtp.gmail.com with ESMTPSA id d6-20020adfe846000000b0030fd03e3d25sm20872wrn.75.2023.07.10.10.52.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:52:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 10/11] hw/char/pl011: Rename RX FIFO methods Date: Mon, 10 Jul 2023 19:51:01 +0200 Message-Id: <20230710175102.32429-11-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In preparation of having a TX FIFO, rename the RX FIFO methods. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/char/pl011.c | 10 +++++----- hw/char/trace-events | 4 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 59d239cb83..7c785e7bb0 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -367,7 +367,7 @@ static int pl011_can_receive(void *opaque) return r; } -static void pl011_put_fifo(void *opaque, uint32_t value) +static void pl011_fifo_rx_put(void *opaque, uint32_t value) { PL011State *s = (PL011State *)opaque; int slot; @@ -378,9 +378,9 @@ static void pl011_put_fifo(void *opaque, uint32_t value) s->read_fifo[slot] = value; s->read_count++; s->flags &= ~PL011_FLAG_RXFE; - trace_pl011_put_fifo(value, s->read_count); + trace_pl011_fifo_rx_put(value, s->read_count); if (s->read_count == pipe_depth) { - trace_pl011_put_fifo_full(); + trace_pl011_fifo_rx_full(); s->flags |= PL011_FLAG_RXFF; } if (s->read_count == s->read_trigger) { @@ -391,13 +391,13 @@ static void pl011_put_fifo(void *opaque, uint32_t value) static void pl011_receive(void *opaque, const uint8_t *buf, int size) { - pl011_put_fifo(opaque, *buf); + pl011_fifo_rx_put(opaque, *buf); } static void pl011_event(void *opaque, QEMUChrEvent event) { if (event == CHR_EVENT_BREAK) { - pl011_put_fifo(opaque, DR_BE); + pl011_fifo_rx_put(opaque, DR_BE); } } diff --git a/hw/char/trace-events b/hw/char/trace-events index babf4d35ea..9fd40e3aae 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -58,8 +58,8 @@ pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x valu pl011_read_fifo(int read_count) "FIFO read, read_count now %d" pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s" pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d" -pl011_put_fifo(uint32_t c, int read_count) "new char 0x%x read_count now %d" -pl011_put_fifo_full(void) "FIFO now full, RXFF set" +pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count now %d" +pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set" pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")" # cmsdk-apb-uart.c From patchwork Mon Jul 10 17:51:02 2023 Content-Type: text/plain; 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[176.184.47.225]) by smtp.gmail.com with ESMTPSA id m20-20020a7bcb94000000b003fbfea1afffsm461613wmi.27.2023.07.10.10.52.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Jul 2023 10:52:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Evgeny Iakovlev , =?utf-8?q?Alex_Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mikko Rapeli Subject: [RFC PATCH v2 11/11] hw/char/pl011: Implement TX FIFO Date: Mon, 10 Jul 2023 19:51:02 +0200 Message-Id: <20230710175102.32429-12-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230710175102.32429-1-philmd@linaro.org> References: <20230710175102.32429-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org If the UART back-end chardev doesn't drain data as fast as stdout does or blocks, buffer in the TX FIFO to try again later. This avoids having the IO-thread busy waiting on chardev back-ends, reported recently when testing the Trusted Reference Stack and using the socket backend: https://linaro.atlassian.net/browse/TRS-149?focusedCommentId=149574 Implement registering a front-end 'watch' callback on back-end events, so we can resume transmitting when the back-end is writable again, not blocking the main loop. Similarly to the RX FIFO path, FIFO level selection is not implemented (interrupt is triggered when a single byte is available in the FIFO). We only migrate the TX FIFO if it is in use. Reported-by: Mikko Rapeli Suggested-by: Alex Bennée Signed-off-by: Philippe Mathieu-Daudé --- RFC: Again for the migration part. --- include/hw/char/pl011.h | 2 + hw/char/pl011.c | 108 ++++++++++++++++++++++++++++++++++++++-- hw/char/trace-events | 4 ++ 3 files changed, 109 insertions(+), 5 deletions(-) diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h index d853802132..20898f43a6 100644 --- a/include/hw/char/pl011.h +++ b/include/hw/char/pl011.h @@ -18,6 +18,7 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" #include "qom/object.h" +#include "qemu/fifo8.h" #define TYPE_PL011 "pl011" OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011) @@ -53,6 +54,7 @@ struct PL011State { Clock *clk; bool migrate_clk; const unsigned char *id; + Fifo8 xmit_fifo; }; DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr); diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 7c785e7bb0..4392773327 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -57,6 +57,9 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) /* Data Register, UARTDR */ #define DR_BE (1 << 10) +/* Receive Status Register/Error Clear Register, UARTRSR/UARTECR */ +#define RSR_OE (1 << 3) + /* Interrupt status bits in UARTRIS, UARTMIS, UARTIMSC */ #define INT_OE (1 << 10) #define INT_BE (1 << 9) @@ -152,6 +155,59 @@ static inline void pl011_reset_tx_fifo(PL011State *s) /* Reset FIFO flags */ s->flags &= ~PL011_FLAG_TXFF; s->flags |= PL011_FLAG_TXFE; + + fifo8_reset(&s->xmit_fifo); +} + +static gboolean pl011_drain_tx(PL011State *s) +{ + trace_pl011_fifo_tx_drain(fifo8_num_used(&s->xmit_fifo)); + pl011_reset_tx_fifo(s); + s->rsr &= ~RSR_OE; + return G_SOURCE_REMOVE; +} + +static gboolean pl011_xmit(void *do_not_use, GIOCondition cond, void *opaque) +{ + PL011State *s = opaque; + int ret; + const uint8_t *buf; + uint32_t buflen; + uint32_t count; + bool tx_enabled; + + if (!qemu_chr_fe_backend_connected(&s->chr)) { + /* Instant drain the fifo when there's no back-end */ + return pl011_drain_tx(s); + } + + tx_enabled = s->cr & CR_UARTEN; + /* Allow completing the current FIFO character before stopping. */ + count = tx_enabled ? fifo8_num_used(&s->xmit_fifo) : 1; /* current only */ + if (count) { + /* Transmit as much data as we can */ + buf = fifo8_peek_buf(&s->xmit_fifo, count, &buflen); + ret = qemu_chr_fe_write(&s->chr, buf, buflen); + if (ret >= 0) { + /* Pop the data we could transmit */ + trace_pl011_fifo_tx_xmit(ret); + fifo8_pop_buf(&s->xmit_fifo, ret, NULL); + s->int_level |= INT_TX; + } + + if (tx_enabled && !fifo8_is_empty(&s->xmit_fifo)) { + /* Reschedule another transmission if we couldn't transmit all */ + guint r = qemu_chr_fe_add_watch(&s->chr, G_IO_OUT | G_IO_HUP, + pl011_xmit, s); + if (!r) { + return pl011_drain_tx(s); + } + } + + pl011_update(s); + } + + return G_SOURCE_REMOVE; } static void pl011_write_txdata(PL011State *s, const uint8_t *buf, int length) @@ -162,12 +218,32 @@ static void pl011_write_txdata(PL011State *s, const uint8_t *buf, int length) if (!(s->cr & CR_TXE)) { qemu_log_mask(LOG_GUEST_ERROR, "PL011 write data but TX disabled\n"); } + if (!fifo8_is_empty(&s->xmit_fifo)) { + /* + * If the UART is disabled in the middle of transmission + * or reception, it completes the current character before + * stopping. + */ + pl011_xmit(NULL, G_IO_OUT, s); + return; + } - /* XXX this blocks entire thread. Rewrite to use - * qemu_chr_fe_write and background I/O callbacks */ - qemu_chr_fe_write_all(&s->chr, buf, 1); - s->int_level |= INT_TX; - pl011_update(s); + if (length > fifo8_num_free(&s->xmit_fifo)) { + /* + * The FIFO contents remain valid because no more data is + * written when the FIFO is full, only the contents of the + * shift register are overwritten. The CPU must now read + * the data, to empty the FIFO. + */ + trace_pl011_fifo_tx_overrun(); + s->rsr |= RSR_OE; + return; + } + + trace_pl011_fifo_tx_put(length); + fifo8_push_all(&s->xmit_fifo, buf, length); + + pl011_xmit(NULL, G_IO_OUT, s); } static uint32_t pl011_read_rxdata(PL011State *s) @@ -434,6 +510,13 @@ static const VMStateDescription vmstate_pl011_clock = { } }; +static bool pl011_xmit_fifo_state_needed(void *opaque, int version_id) +{ + PL011State* s = opaque; + + return pl011_is_fifo_enabled(s) && !fifo8_is_empty(&s->xmit_fifo); +} + static int pl011_post_load(void *opaque, int version_id) { PL011State* s = opaque; @@ -455,6 +538,11 @@ static int pl011_post_load(void *opaque, int version_id) s->read_pos = 0; } + if (pl011_xmit_fifo_state_needed(s, version_id)) { + /* Reschedule another transmission */ + qemu_chr_fe_add_watch(&s->chr, G_IO_OUT | G_IO_HUP, pl011_xmit, s); + } + return 0; } @@ -473,6 +561,7 @@ static const VMStateDescription vmstate_pl011 = { VMSTATE_UINT32(int_enabled, PL011State), VMSTATE_UINT32(int_level, PL011State), VMSTATE_UINT32_ARRAY(read_fifo, PL011State, PL011_FIFO_DEPTH), + VMSTATE_FIFO8_TEST(xmit_fifo, PL011State, pl011_xmit_fifo_state_needed), VMSTATE_UINT32(ilpr, PL011State), VMSTATE_UINT32(ibrd, PL011State), VMSTATE_UINT32(fbrd, PL011State), @@ -500,6 +589,7 @@ static void pl011_init(Object *obj) PL011State *s = PL011(obj); int i; + fifo8_create(&s->xmit_fifo, PL011_FIFO_DEPTH); memory_region_init_io(&s->iomem, OBJECT(s), &pl011_ops, s, "pl011", 0x1000); sysbus_init_mmio(sbd, &s->iomem); for (i = 0; i < ARRAY_SIZE(s->irq); i++) { @@ -512,6 +602,13 @@ static void pl011_init(Object *obj) s->id = pl011_id_arm; } +static void pl011_finalize(Object *obj) +{ + PL011State *s = PL011(obj); + + fifo8_destroy(&s->xmit_fifo); +} + static void pl011_realize(DeviceState *dev, Error **errp) { PL011State *s = PL011(dev); @@ -555,6 +652,7 @@ static const TypeInfo pl011_arm_info = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(PL011State), .instance_init = pl011_init, + .instance_finalize = pl011_finalize, .class_init = pl011_class_init, }; diff --git a/hw/char/trace-events b/hw/char/trace-events index 9fd40e3aae..4c25564066 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -60,6 +60,10 @@ pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x val pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d" pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count now %d" pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set" +pl011_fifo_tx_put(int count) "TX FIFO push %d" +pl011_fifo_tx_xmit(int count) "TX FIFO pop %d" +pl011_fifo_tx_overrun(void) "TX FIFO overrun" +pl011_fifo_tx_drain(unsigned drained) "TX FIFO draining %u" pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")" # cmsdk-apb-uart.c