From patchwork Sun Jun 11 10:33:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793517 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20221208 header.b=ZP3bFh5c; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QfB6B2DSmz20fn for ; Sun, 11 Jun 2023 20:35:12 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q8IOv-0006Ps-WC; Sun, 11 Jun 2023 06:34:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q8IOv-0006Pi-5K for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:25 -0400 Received: from mail-ed1-x52f.google.com ([2a00:1450:4864:20::52f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q8IOt-0008Hc-IW for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:24 -0400 Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-5169f920a9dso6933817a12.0 for ; Sun, 11 Jun 2023 03:34:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686479661; x=1689071661; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hD9TOazhJkhd4pwOyDYDJodwNlYelsc5vKvw/KbQM0U=; b=ZP3bFh5cJNhBrpU4wOANNlCp0IZp4ae9dFtTEK7ZwiQYiqy8pwPOFtwNCbXLxeeZQS 1+3YKQKZkZ91FC3jcZesHxBqgfxeQdaQp5AfoHcrbObNBAYZL0nFcHQGH9kjndBKn8oc ervKh/yIYGWCFjkulCBXI+y1mKh0o+IKx/AAg4OUk1g4ijfjy5WLVFupAQz+ycpVNLuw BHZeYaxCWSjSGcO9R6fQzFD/FfwDuxRgt+PJm2n+tDQYSejcidYVuVmlqu+eYfdGE3np eLuv8E22L5Bf9l2psAXU4ZuPDDZGEP4ceHkZ82uO+tdPYnwUjR6ByBHz+Wf1jRhrum8g J+8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686479661; x=1689071661; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hD9TOazhJkhd4pwOyDYDJodwNlYelsc5vKvw/KbQM0U=; b=RCG/UkZUghRe37fxBBuK9YeBNww78CFPScAUtxK116frMK+shmuwMUS4n+3WR5Q441 vfs1RqBEHpmanpVvO5ez8sl6TnLnJ3hbyFCvxik7GAY2Ayvfih6rzH9ipmfduQYWUXt1 rgG8KLG8802K9wy6UWAjm13kHZL6WEprGZ3AbN6ubvmwaS5BM+ZLENnSulEp70B+On4p 6U+rtrGhr6g1cfcShvwigOJ4oP54jprZn8tOnLSImgaK5op9ben1PqdXs7ulJsjdAdda 3aeWLnA6ZpV0qOFtmxr81OIcyIN/luh7BWI3vagJ1ywe4i/g3yyhqfCCD2hw60megAT7 mjTg== X-Gm-Message-State: AC+VfDxTMRJ+FhNP4R8uFyq4VjmpU9jcyjnu4PiyzrcmywfCzp4zKdtP fckunXGCmrEPBZdjwuG/JITXghqOngE= X-Google-Smtp-Source: ACHHUZ6cbT0t6Fa+lKUG0AuZEqapmPfWIUEVoMqa6YPE34caLhLH3MZdJNxxQNzhIoQ0+r4JzrwqoQ== X-Received: by 2002:a05:6402:456:b0:514:224b:a48c with SMTP id p22-20020a056402045600b00514224ba48cmr3531660edw.0.1686479661267; Sun, 11 Jun 2023 03:34:21 -0700 (PDT) Received: from archlinux.. (ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:20 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow , Thomas Huth Subject: [PATCH 01/15] hw/i386/pc_q35: Resolve redundant q35_host variable Date: Sun, 11 Jun 2023 12:33:58 +0200 Message-ID: <20230611103412.12109-2-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=shentey@gmail.com; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The variable is redundant to "phb" and is never used by its real type. Signed-off-by: Bernhard Beschow Reviewed-by: Thomas Huth --- hw/i386/pc_q35.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 6155427e48..62c5d652b7 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -120,8 +120,7 @@ static void pc_q35_init(MachineState *machine) PCMachineState *pcms = PC_MACHINE(machine); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); X86MachineState *x86ms = X86_MACHINE(machine); - Q35PCIHost *q35_host; - PCIHostState *phb; + Object *phb; PCIBus *host_bus; PCIDevice *lpc; DeviceState *lpc_dev; @@ -207,10 +206,10 @@ static void pc_q35_init(MachineState *machine) } /* create pci host bus */ - q35_host = Q35_HOST_DEVICE(qdev_new(TYPE_Q35_HOST_DEVICE)); + phb = OBJECT(qdev_new(TYPE_Q35_HOST_DEVICE)); if (pcmc->pci_enabled) { - pci_hole64_size = object_property_get_uint(OBJECT(q35_host), + pci_hole64_size = object_property_get_uint(phb, PCI_HOST_PROP_PCI_HOLE64_SIZE, &error_abort); } @@ -218,23 +217,23 @@ static void pc_q35_init(MachineState *machine) /* allocate ram and load rom/bios */ pc_memory_init(pcms, system_memory, rom_memory, pci_hole64_size); - object_property_add_child(OBJECT(machine), "q35", OBJECT(q35_host)); - object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_RAM_MEM, + object_property_add_child(OBJECT(machine), "q35", phb); + object_property_set_link(phb, MCH_HOST_PROP_RAM_MEM, OBJECT(machine->ram), NULL); - object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_PCI_MEM, + object_property_set_link(phb, MCH_HOST_PROP_PCI_MEM, OBJECT(pci_memory), NULL); - object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_SYSTEM_MEM, + object_property_set_link(phb, MCH_HOST_PROP_SYSTEM_MEM, OBJECT(system_memory), NULL); - object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_IO_MEM, + object_property_set_link(phb, MCH_HOST_PROP_IO_MEM, OBJECT(system_io), NULL); - object_property_set_int(OBJECT(q35_host), PCI_HOST_BELOW_4G_MEM_SIZE, + object_property_set_int(phb, PCI_HOST_BELOW_4G_MEM_SIZE, x86ms->below_4g_mem_size, NULL); - object_property_set_int(OBJECT(q35_host), PCI_HOST_ABOVE_4G_MEM_SIZE, + object_property_set_int(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, x86ms->above_4g_mem_size, NULL); + /* pci */ - sysbus_realize_and_unref(SYS_BUS_DEVICE(q35_host), &error_fatal); - phb = PCI_HOST_BRIDGE(q35_host); - host_bus = phb->bus; + sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); + host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0")); /* create ISA bus */ lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC), true, TYPE_ICH9_LPC_DEVICE); From patchwork Sun Jun 11 10:33:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793529 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; 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(ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:21 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 02/15] hw/pci-host/q35: Fix double, contradicting .endianness assignment Date: Sun, 11 Jun 2023 12:33:59 +0200 Message-ID: <20230611103412.12109-3-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=shentey@gmail.com; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Fixes the following clangd warning (-Winitializer-overrides): q35.c:297:19: Initializer overrides prior initialization of this subobject q35.c:292:19: previous initialization is here Settle on native endian which causes the least overhead. Fixes: bafc90bdc594 ("q35: implement TSEG") Signed-off-by: Bernhard Beschow --- hw/pci-host/q35.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index fd18920e7f..859c197f25 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -290,7 +290,6 @@ static const MemoryRegionOps blackhole_ops = { .valid.max_access_size = 4, .impl.min_access_size = 4, .impl.max_access_size = 4, - .endianness = DEVICE_LITTLE_ENDIAN, }; /* PCIe MMCFG */ From patchwork Sun Jun 11 10:34:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793527 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20221208 header.b=TPe7iu9E; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QfB7x1QfMz20Ww for ; Sun, 11 Jun 2023 20:36:45 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q8IOx-0006R6-Ra; Sun, 11 Jun 2023 06:34:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q8IOw-0006Q0-Fa for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:26 -0400 Received: from mail-ej1-x633.google.com ([2a00:1450:4864:20::633]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q8IOu-0008Hq-VC for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:26 -0400 Received: by mail-ej1-x633.google.com with SMTP id a640c23a62f3a-977e83d536fso478815566b.3 for ; Sun, 11 Jun 2023 03:34:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686479663; x=1689071663; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fgXS/lSSrzIc4Mus6gPdK+VCh3dqtgaw7zM15A7rEs4=; b=TPe7iu9ENmGSuSvqNrBuwHvaYnr8a5wRb1thAo4MlGKTsBkJ3iVcBObkKPwIXc8M2O xxLAoiUDFQrxgMHYBGiqoc6aTY3NhVFetnonzihIyC3sGvD8MxmqSDCDBFLQytIl7FfX OIOOSWd+n/HrhUZ0pfD3NrKzrf07fzcMFihY8HuYp+EdsxrPLgNGFWlvhZAGY+Cs4Z6C Blc2w16OvhJLRDBo62/ReLlWcNl+pb/hgT1hx2SmIEMi+lkdo+eXP2ia3ebjmoQfCuOs RS/Ih+HwndEOaOaBQvxwhgVLbVkgTgm5Ifi5Z8z4ruj8D7sShKHfa/stPm6mfHztviFa b+SA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686479663; x=1689071663; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fgXS/lSSrzIc4Mus6gPdK+VCh3dqtgaw7zM15A7rEs4=; b=WHMgwYbIBc44Rtc3e2KP4Mx2ARExiLiuMx2v2ZXjAcb9EIJ0bkwaX+MvVCfuxtpZzK FdcXXffjkoqBuhh//y0PWp0FwG/IIovhV+lNN4lWxWj/eRdRwGgW6Hjj9ULWz3Ah30mD IJAg7cXMoNn15/8vJLDPwNeppMeKcFz4SCNYAtmqxfolmvkw2gsoI9I1uGHaxBziA86z 0zdgGkThIEr2lSVaYgchSu5i+ARV7AdYCHDmqC3fczKi25r40soiuHzCW/k2xa7FewjO K8RBNgFkTYrSWSMFdah6swSXRTzdZw58JCX5pW59i0mdmdF46h97Gd/Iz17QLsKJGzMl hVKw== X-Gm-Message-State: AC+VfDwk0LHm4D0SJWQQXKPbCs/bEnwnlKu1PSEnDlaVX+iJ3X3RIYxD niJalAQc1GgR/GEWDyf8fxfw21LJ5UE= X-Google-Smtp-Source: ACHHUZ41UXsSD6Yrt5v9qbtbtu+xNpUwUTS6xerch11d8ObHVos875gPa+Pe1Erz6ik9e1xQIKebag== X-Received: by 2002:a17:907:6e1a:b0:974:5d6e:7941 with SMTP id sd26-20020a1709076e1a00b009745d6e7941mr6253233ejc.6.1686479662835; Sun, 11 Jun 2023 03:34:22 -0700 (PDT) Received: from archlinux.. (ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:22 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 03/15] hw/pci-host/q35: Initialize PCMachineState::bus in board code Date: Sun, 11 Jun 2023 12:34:00 +0200 Message-ID: <20230611103412.12109-4-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=shentey@gmail.com; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The Q35 PCI host currently sets the PC machine's PCI bus attribute through global state, thereby assuming the machine to be a PC machine. The Q35 machine code already holds on to Q35's pci bus attribute, so can easily set its own property while preserving encapsulation. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Igor Mammedov --- hw/i386/pc_q35.c | 4 +++- hw/pci-host/q35.c | 1 - 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 62c5d652b7..29b46d3e1c 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -230,10 +230,12 @@ static void pc_q35_init(MachineState *machine) x86ms->below_4g_mem_size, NULL); object_property_set_int(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, x86ms->above_4g_mem_size, NULL); + sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); /* pci */ - sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0")); + pcms->bus = host_bus; + /* create ISA bus */ lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC), true, TYPE_ICH9_LPC_DEVICE); diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 859c197f25..23b689dba3 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -66,7 +66,6 @@ static void q35_host_realize(DeviceState *dev, Error **errp) s->mch.pci_address_space, s->mch.address_space_io, 0, TYPE_PCIE_BUS); - PC_MACHINE(qdev_get_machine())->bus = pci->bus; pci->bypass_iommu = PC_MACHINE(qdev_get_machine())->default_bus_bypass_iommu; qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal); From patchwork Sun Jun 11 10:34:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793530 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20221208 header.b=J2ysbB3m; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QfB8F2Pf6z20Ww for ; Sun, 11 Jun 2023 20:37:01 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q8IOy-0006RE-EE; Sun, 11 Jun 2023 06:34:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q8IOx-0006Qi-BE for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:27 -0400 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q8IOv-0008I5-PX for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:27 -0400 Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-977e0fbd742so484136766b.2 for ; Sun, 11 Jun 2023 03:34:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686479664; x=1689071664; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jbGaNTD1IiXPDweFUBn/7X2i4gmueAx1RXqG2cvrBCM=; b=J2ysbB3mZVPs7medY+IPzMt124R/Vk12WdLWE/O23brKy0HjHmuZXHAO/RMlgPUPBq 5NzEVy0JoEgrsLcgixsHRE8mvivkrSPZ0iqAwPgoVO8ZnUXysWeAy4Q9dKY4e6fNeEWx kYtY6jDyez4YbnZW5grXm4kOE8YaSeVLPBbPzMZLei5M8eSfWrJdi0Hv0pV/SFl5exYB N979yqB4P4FCbes/p8TB7MwCXeBe8ZBSojKkudQMttPT0Y29OZPdykF21oheQvgKbu7+ R1DQ88UKX6w45ta7Y61jhnnTN5D09pD4IigKV5HZ2GhF38jGNwaOh9tF+qk7pWsOMGpl KNUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686479664; x=1689071664; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jbGaNTD1IiXPDweFUBn/7X2i4gmueAx1RXqG2cvrBCM=; b=F27zQKYZyAT9547in5lrRsl/+WoG2Xs1UZ6hwDbZKI64Jvu4qmrtm/Ehb+TFVP0zMq K+90FXQNSIPM2tDkjtT5j32E+g0DlVvc2dsRuLdZbR2bQEsTWNY/9cGkBgtrdZBlX3iu 3FApfvR+/ZP72X2J3pjSKTN8mt8SNBjm1jjfPd/7BYweNGA9UPQt+7ld9WEiF1fEr1RZ 1zMIhuDCSNi/d6xIJcDUpfyzn3vdcrPnKEoK+OWDOWCeWqVaxIkEe4Pas0YeaJhvuPnL KeiG6AEjcdLgbmeMS01LqWaz+0UFPTASlDUx+vUK2wzWS4tcxuVS7Emg/fvCbnECrljd 0gSA== X-Gm-Message-State: AC+VfDz6M/clpfBK4yvjNY3WsQbbgXvY6b+PfzUUUEHs5fDf4E81yjPp 7ZrkfMySsQSQYcLF+4A66o1M3TRohlw= X-Google-Smtp-Source: ACHHUZ5KrOflEEgInb0aycF4pDsgiJOL8zliXTGqd0MpGYWuuY8WRizxDAzIVbTBlugVLymJqzE+kg== X-Received: by 2002:a17:906:eecb:b0:978:9ad7:e736 with SMTP id wu11-20020a170906eecb00b009789ad7e736mr6492343ejb.39.1686479663998; Sun, 11 Jun 2023 03:34:23 -0700 (PDT) Received: from archlinux.. (ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:23 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 04/15] hw/pci/pci_host: Introduce PCI_HOST_BYPASS_IOMMU macro Date: Sun, 11 Jun 2023 12:34:01 +0200 Message-ID: <20230611103412.12109-5-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=shentey@gmail.com; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce a macro to avoid copy and pasting strings which can easily cause typos. Suggested-by: Michael S. Tsirkin Signed-off-by: Bernhard Beschow Reviewed-by: Igor Mammedov --- include/hw/pci/pci_host.h | 2 ++ hw/pci/pci_host.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/include/hw/pci/pci_host.h b/include/hw/pci/pci_host.h index c6f4eb4585..e52d8ec2cd 100644 --- a/include/hw/pci/pci_host.h +++ b/include/hw/pci/pci_host.h @@ -31,6 +31,8 @@ #include "hw/sysbus.h" #include "qom/object.h" +#define PCI_HOST_BYPASS_IOMMU "bypass-iommu" + #define TYPE_PCI_HOST_BRIDGE "pci-host-bridge" OBJECT_DECLARE_TYPE(PCIHostState, PCIHostBridgeClass, PCI_HOST_BRIDGE) diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index dfd185bbb4..7af8afdcbe 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -232,7 +232,7 @@ const VMStateDescription vmstate_pcihost = { static Property pci_host_properties_common[] = { DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState, mig_enabled, true), - DEFINE_PROP_BOOL("bypass-iommu", PCIHostState, bypass_iommu, false), + DEFINE_PROP_BOOL(PCI_HOST_BYPASS_IOMMU, PCIHostState, bypass_iommu, false), DEFINE_PROP_END_OF_LIST(), }; From patchwork Sun Jun 11 10:34:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793526 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20221208 header.b=dL6hlIz/; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QfB7q1BH9z20Ww for ; Sun, 11 Jun 2023 20:36:39 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q8IP0-0006Rw-2E; Sun, 11 Jun 2023 06:34:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q8IOy-0006R7-4B for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:28 -0400 Received: from mail-ed1-x536.google.com ([2a00:1450:4864:20::536]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q8IOw-0008IH-IN for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:27 -0400 Received: by mail-ed1-x536.google.com with SMTP id 4fb4d7f45d1cf-5183101690cso1609835a12.0 for ; Sun, 11 Jun 2023 03:34:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686479665; x=1689071665; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Tt10HuR+62JCOV6v9nG6fmfAatbw2ckxOQLUUV+0Yac=; b=dL6hlIz/faHLjHILy/B6iG7ZiEOLaQ21vcITkRY+SK2bCLYMLajlhiwyn1Jpro5uXM YC2F92FGt/UrZQNHeib+55/SNwfr0x5PN2G2TynYjUoAAPEDL3QTVUABlHgPGUBzOMhO 0VDwhmlSbzS1HV/19NpkfGXPZdDhFWOxUuvW21jmKmNWacqIj2HUmhRPnqM2F13Cem15 UuwLjorsNEVgoEYexesBr4KPNlx8XU1gNkXszMcuhkTxgpuyUFOXxGHV7tp/CZSSwTsR vEPSWFb5UxZWsN8E4IIvVRipcePeP8IIrSDBBOiZjpvinJLTxAP1Wkm9w/UY5SFAtrIE +BmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686479665; x=1689071665; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Tt10HuR+62JCOV6v9nG6fmfAatbw2ckxOQLUUV+0Yac=; b=D1f5COBIXww+6mjIHH7BOwYD1zURBQEo+9u1XYziCBMhb2K4Av+EoPseAB26fG/2oX 7sezYZlTq2MEsyz3ljZW9yJXl+oYkcmi7kuePhGwPpBACKKxJ/FTESe4isn8uU6rGXIc bxTMvLC8mD/NygmXrTi/YA4m+l7W5hEQo/FS/rRT6d7A06Af4UkTJ5L4/sQenoZBR1c1 8vLQTQ+AUiUasbAYUBIK2hc3hPoSrIU/EStoxAstfc7J9pHxsjQLjzux8F9tLge6RCH9 8zlmp1h6riDIaSKCRfwAU9C+On/XxfmgRHrb8q5TXzkUCuzrlGYwWu5QrZUGU/K+hhrO KoLA== X-Gm-Message-State: AC+VfDzvnuesWBk0TsfoCSoXEAHaH02H7k7l2caozovfjwLW6N8ivFfM R+WAbRg6mXmDuV2k4EC3smBjvZrfvao= X-Google-Smtp-Source: ACHHUZ4W2m2R4q5JDvcCVh3en+LA+nrWiM7GA8QgcAvCzhtJdRb/Buz1Lw2EhHvSCidd4cWcNsIqSA== X-Received: by 2002:a17:907:7253:b0:96f:9cea:a34d with SMTP id ds19-20020a170907725300b0096f9ceaa34dmr7103793ejc.21.1686479664769; Sun, 11 Jun 2023 03:34:24 -0700 (PDT) Received: from archlinux.. (ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:24 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 05/15] hw/pci-host/q35: Initialize PCI_HOST_BYPASS_IOMMU property from board code Date: Sun, 11 Jun 2023 12:34:02 +0200 Message-ID: <20230611103412.12109-6-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=shentey@gmail.com; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The Q35 PCI host already has a PCI_HOST_BYPASS_IOMMU property. However, the host initializes this property itself by accessing global machine state, thereby assuming it to be a PC machine. Avoid this by having board code set this property. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Igor Mammedov --- hw/i386/pc_q35.c | 2 ++ hw/pci-host/q35.c | 3 +-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 29b46d3e1c..5220b535b2 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -230,6 +230,8 @@ static void pc_q35_init(MachineState *machine) x86ms->below_4g_mem_size, NULL); object_property_set_int(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, x86ms->above_4g_mem_size, NULL); + object_property_set_bool(phb, PCI_HOST_BYPASS_IOMMU, + pcms->default_bus_bypass_iommu, NULL); sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); /* pci */ diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 23b689dba3..7980ddde69 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -66,8 +66,7 @@ static void q35_host_realize(DeviceState *dev, Error **errp) s->mch.pci_address_space, s->mch.address_space_io, 0, TYPE_PCIE_BUS); - pci->bypass_iommu = - PC_MACHINE(qdev_get_machine())->default_bus_bypass_iommu; + qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal); } From patchwork Sun Jun 11 10:34:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793528 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20221208 header.b=LTFU61W3; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QfB7y1pB9z20Ww for ; Sun, 11 Jun 2023 20:36:46 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q8IP0-0006Rx-2W; Sun, 11 Jun 2023 06:34:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q8IOz-0006Ro-E1 for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:29 -0400 Received: from mail-ej1-x62f.google.com ([2a00:1450:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q8IOx-0008Ie-Px for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:29 -0400 Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-977e0fbd742so484139466b.2 for ; Sun, 11 Jun 2023 03:34:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686479666; x=1689071666; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7T0pLqowBSVTN/lU1DOL5X7uMjLvrnQzaN8qvhbCP9w=; b=LTFU61W3AgeqwikH/xZekmgG7w3++vIV7iSi7TgpqA+B4Bo+BOf9RJT1h4F6djAwxE esXsMy8Rhr7OSCjeh7gyx4DaRPyH1jptlolpJzMcyKWSDack/+vE3eRTvB/RMOIk7Rfp wKGswFLKdhXFFAkjhz+HApqHX3ZWf5dWQJ0CK8mbEOvM/3SaSbu9Ze17VLFf/6F9FeYl UfsFmIrzCncZvRgkog4qfULWhbIuFbK3YVXa3HnuCfSPZGHsnroir/skTyBtV5K0THmQ LpQnC6pdl0gHWlkF0BwTansMm91HKWNKrGqoT2cOHf9aLTO7nw04GbAxVUGTUUFzCVTI Gskw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686479666; x=1689071666; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7T0pLqowBSVTN/lU1DOL5X7uMjLvrnQzaN8qvhbCP9w=; b=ShsWLZxDovfrivC6dXN3rhxjy8QfKwrpBTDXKRETkQt09olDJPJKhLe32ZfJ6bKHun rLj54PrCE9aEYTVw+D1qPS3m16ouQHA05hCQ2aP7uTWl7lFl3qv027cC9vfCeGHXQEO5 0u7MU0cPwz73FgMDhmgKsaNbVJB3pfv53iJKdnAg9KnXH0yssL6ugdi/CwHizoMqATHo av5EmYVw9hw7Ys4CTlvvtBvdHZRyTKJBi2VON0z8i+3jwTJrAtjk+KsCeJUcSK5IoM76 HWPFtyGMFDd4Gg5L/iamQ00d8BYzTcHXczYaC2qtglagBZW/izpOnIrV4W/K4bbjtm6M ji7g== X-Gm-Message-State: AC+VfDy3PD5HZCyEyCYTONERToKdNjHXUYyc3Y4tz559mOwTSpnouj8w ViGczI9hWBGa4nVI7Af73hV20tYeOyY= X-Google-Smtp-Source: ACHHUZ7kI8TGKWmf1RicfYO93dvbez/o+EGsjRVd6AVI9H9IRpLwcxsP0PcbK+9HYkTGZyhGdhqTTw== X-Received: by 2002:a17:907:985:b0:94e:e5fe:b54f with SMTP id bf5-20020a170907098500b0094ee5feb54fmr6730393ejc.23.1686479666200; Sun, 11 Jun 2023 03:34:26 -0700 (PDT) Received: from archlinux.. (ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:25 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 06/15] hw/pci-host/q35: Make some property name macros reusable by i440fx Date: Sun, 11 Jun 2023 12:34:03 +0200 Message-ID: <20230611103412.12109-7-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=shentey@gmail.com; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Bernhard Beschow --- include/hw/i386/pc.h | 4 ++++ include/hw/pci-host/q35.h | 5 ----- hw/i386/pc_q35.c | 8 ++++---- hw/pci-host/q35.c | 8 ++++---- 4 files changed, 12 insertions(+), 13 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index c661e9cc80..812613cc07 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -145,6 +145,10 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level); void pc_guest_info_init(PCMachineState *pcms); +#define PCI_HOST_PROP_RAM_MEM "ram-mem" +#define PCI_HOST_PROP_PCI_MEM "pci-mem" +#define PCI_HOST_PROP_SYSTEM_MEM "system-mem" +#define PCI_HOST_PROP_IO_MEM "io-mem" #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index e89329c51e..1d98bbfe0d 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -74,11 +74,6 @@ struct Q35PCIHost { * gmch part */ -#define MCH_HOST_PROP_RAM_MEM "ram-mem" -#define MCH_HOST_PROP_PCI_MEM "pci-mem" -#define MCH_HOST_PROP_SYSTEM_MEM "system-mem" -#define MCH_HOST_PROP_IO_MEM "io-mem" - /* PCI configuration */ #define MCH_HOST_BRIDGE "MCH" diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 5220b535b2..8bfe388c9e 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -218,13 +218,13 @@ static void pc_q35_init(MachineState *machine) pc_memory_init(pcms, system_memory, rom_memory, pci_hole64_size); object_property_add_child(OBJECT(machine), "q35", phb); - object_property_set_link(phb, MCH_HOST_PROP_RAM_MEM, + object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM, OBJECT(machine->ram), NULL); - object_property_set_link(phb, MCH_HOST_PROP_PCI_MEM, + object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM, OBJECT(pci_memory), NULL); - object_property_set_link(phb, MCH_HOST_PROP_SYSTEM_MEM, + object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM, OBJECT(system_memory), NULL); - object_property_set_link(phb, MCH_HOST_PROP_IO_MEM, + object_property_set_link(phb, PCI_HOST_PROP_IO_MEM, OBJECT(system_io), NULL); object_property_set_int(phb, PCI_HOST_BELOW_4G_MEM_SIZE, x86ms->below_4g_mem_size, NULL); diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 7980ddde69..ded3f6e4f4 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -240,19 +240,19 @@ static void q35_host_initfn(Object *obj) object_property_add_uint64_ptr(obj, PCIE_HOST_MCFG_SIZE, &pehb->size, OBJ_PROP_FLAG_READ); - object_property_add_link(obj, MCH_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION, + object_property_add_link(obj, PCI_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.ram_memory, qdev_prop_allow_set_link_before_realize, 0); - object_property_add_link(obj, MCH_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION, + object_property_add_link(obj, PCI_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.pci_address_space, qdev_prop_allow_set_link_before_realize, 0); - object_property_add_link(obj, MCH_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, + object_property_add_link(obj, PCI_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.system_memory, qdev_prop_allow_set_link_before_realize, 0); - object_property_add_link(obj, MCH_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION, + object_property_add_link(obj, PCI_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.address_space_io, qdev_prop_allow_set_link_before_realize, 0); } From patchwork Sun Jun 11 10:34:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793521 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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(ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:26 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 07/15] hw/pci-host/i440fx: Replace magic values by existing constants Date: Sun, 11 Jun 2023 12:34:04 +0200 Message-ID: <20230611103412.12109-8-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=shentey@gmail.com; helo=mail-ed1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Igor Mammedov --- hw/pci-host/i440fx.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 61e7b97ff4..daa4d11104 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -277,8 +277,8 @@ PCIBus *i440fx_init(const char *pci_type, /* if *disabled* show SMRAM to all CPUs */ memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region", - f->pci_address_space, 0xa0000, 0x20000); - memory_region_add_subregion_overlap(f->system_memory, 0xa0000, + f->pci_address_space, SMRAM_C_BASE, SMRAM_C_SIZE); + memory_region_add_subregion_overlap(f->system_memory, SMRAM_C_BASE, &f->smram_region, 1); memory_region_set_enabled(&f->smram_region, true); @@ -286,9 +286,9 @@ PCIBus *i440fx_init(const char *pci_type, memory_region_init(&f->smram, OBJECT(d), "smram", 4 * GiB); memory_region_set_enabled(&f->smram, true); memory_region_init_alias(&f->low_smram, OBJECT(d), "smram-low", - f->ram_memory, 0xa0000, 0x20000); + f->ram_memory, SMRAM_C_BASE, SMRAM_C_SIZE); memory_region_set_enabled(&f->low_smram, true); - memory_region_add_subregion(&f->smram, 0xa0000, &f->low_smram); + memory_region_add_subregion(&f->smram, SMRAM_C_BASE, &f->low_smram); object_property_add_const_link(qdev_get_machine(), "smram", OBJECT(&f->smram)); From patchwork Sun Jun 11 10:34:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793522 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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(ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:27 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 08/15] hw/pci-host/i440fx: Have common names for some local variables Date: Sun, 11 Jun 2023 12:34:05 +0200 Message-ID: <20230611103412.12109-9-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=shentey@gmail.com; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org `PCIHostState` is often referred to as `phb`, own device state usually as `s`. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/i440fx.c | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index daa4d11104..88beaf99c4 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -205,28 +205,28 @@ static void i440fx_pcihost_get_pci_hole64_end(Object *obj, Visitor *v, static void i440fx_pcihost_initfn(Object *obj) { - PCIHostState *s = PCI_HOST_BRIDGE(obj); + PCIHostState *phb = PCI_HOST_BRIDGE(obj); - memory_region_init_io(&s->conf_mem, obj, &pci_host_conf_le_ops, s, + memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb, "pci-conf-idx", 4); - memory_region_init_io(&s->data_mem, obj, &pci_host_data_le_ops, s, + memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, "pci-conf-data", 4); } static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) { - PCIHostState *s = PCI_HOST_BRIDGE(dev); + PCIHostState *phb = PCI_HOST_BRIDGE(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - memory_region_add_subregion(s->bus->address_space_io, 0xcf8, &s->conf_mem); + memory_region_add_subregion(phb->bus->address_space_io, 0xcf8, &phb->conf_mem); sysbus_init_ioports(sbd, 0xcf8, 4); - memory_region_add_subregion(s->bus->address_space_io, 0xcfc, &s->data_mem); + memory_region_add_subregion(phb->bus->address_space_io, 0xcfc, &phb->data_mem); sysbus_init_ioports(sbd, 0xcfc, 4); /* register i440fx 0xcf8 port as coalesced pio */ - memory_region_set_flush_coalesced(&s->data_mem); - memory_region_add_coalescing(&s->conf_mem, 0, 4); + memory_region_set_flush_coalesced(&phb->data_mem); + memory_region_add_coalescing(&phb->conf_mem, 0, 4); } static void i440fx_realize(PCIDevice *dev, Error **errp) @@ -248,17 +248,16 @@ PCIBus *i440fx_init(const char *pci_type, MemoryRegion *pci_address_space, MemoryRegion *ram_memory) { + I440FXState *s = I440FX_PCI_HOST_BRIDGE(dev); + PCIHostState *phb = PCI_HOST_BRIDGE(dev); PCIBus *b; PCIDevice *d; - PCIHostState *s; PCII440FXState *f; unsigned i; - I440FXState *i440fx; - s = PCI_HOST_BRIDGE(dev); b = pci_root_bus_new(dev, NULL, pci_address_space, address_space_io, 0, TYPE_PCI_BUS); - s->bus = b; + phb->bus = b; object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev)); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -268,8 +267,7 @@ PCIBus *i440fx_init(const char *pci_type, f->pci_address_space = pci_address_space; f->ram_memory = ram_memory; - i440fx = I440FX_PCI_HOST_BRIDGE(dev); - range_set_bounds(&i440fx->pci_hole, below_4g_mem_size, + range_set_bounds(&s->pci_hole, below_4g_mem_size, IO_APIC_DEFAULT_ADDRESS - 1); /* setup pci memory mapping */ From patchwork Sun Jun 11 10:34:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793525 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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(ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:28 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 09/15] hw/pci-host/i440fx: Move i440fx_realize() into PCII440FXState section Date: Sun, 11 Jun 2023 12:34:06 +0200 Message-ID: <20230611103412.12109-10-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=shentey@gmail.com; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org i440fx_realize() realizes the PCI device inside the host bridge (PCII440FXState), but is implemented between i440fx_pcihost_realize() and i440fx_init() which deal with the host bridge itself (I440FXState). Since we want to append i440fx_init() to i440fx_pcihost_realize() later let's move i440fx_realize() out of the way. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/i440fx.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 88beaf99c4..9df4688b2e 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -65,6 +65,15 @@ struct I440FXState { */ #define I440FX_COREBOOT_RAM_SIZE 0x57 +static void i440fx_realize(PCIDevice *dev, Error **errp) +{ + dev->config[I440FX_SMRAM] = 0x02; + + if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) { + warn_report("i440fx doesn't support emulated iommu"); + } +} + static void i440fx_update_memory_mappings(PCII440FXState *d) { int i; @@ -229,15 +238,6 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) memory_region_add_coalescing(&phb->conf_mem, 0, 4); } -static void i440fx_realize(PCIDevice *dev, Error **errp) -{ - dev->config[I440FX_SMRAM] = 0x02; - - if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) { - warn_report("i440fx doesn't support emulated iommu"); - } -} - PCIBus *i440fx_init(const char *pci_type, DeviceState *dev, MemoryRegion *address_space_mem, From patchwork Sun Jun 11 10:34:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793524 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20221208 header.b=r6wUXl4H; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QfB7M2wp4z20fV for ; Sun, 11 Jun 2023 20:36:15 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q8IPD-0006X4-LN; Sun, 11 Jun 2023 06:34:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q8IP3-0006TB-SH for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:34 -0400 Received: from mail-ed1-x535.google.com ([2a00:1450:4864:20::535]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q8IP2-0008Kp-1p for qemu-devel@nongnu.org; Sun, 11 Jun 2023 06:34:33 -0400 Received: by mail-ed1-x535.google.com with SMTP id 4fb4d7f45d1cf-516a008e495so6920125a12.1 for ; Sun, 11 Jun 2023 03:34:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686479670; x=1689071670; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OVkoidxP0HHQEryTQwrMVjugXe9vuiGaOhyjtPj/j/o=; b=r6wUXl4HHkTgRRaJqGkZm2uXjz8BsGo0z1kfLIy9H2oVhLtNkXjhCiwuuIk0vhAMHv vRrDgnn8uJc3xTuXoEs7ZgZGHXHBZa32jeFgVQtgCjEIYKrbWQL9y2cgyLKfriOUJUSc uCAM17REtKqB2m7joosf6RfSodAD0RSy5RRzKDui1hpc9Rggl0hLDemewAJ8uF2oGokJ Paq47kOlaCJi65v0aYLXEIcEt/47m2iXThF3iCF2UNlFIaWRYoaiTQpOatTjbctgEogF aALWyPdKJ4nfA7yWaqnAShmLmUrjO3EX5aU5M1y/MOc2fTcKNN0EhBhDPy34IpwRGHBJ cHWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686479670; x=1689071670; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OVkoidxP0HHQEryTQwrMVjugXe9vuiGaOhyjtPj/j/o=; b=BbuYJZNBQ/ke5NlS+tJVMwbuLCHhkpkydt4SyIGsFG0CRDjgFufeCAVD22kSOUxZR4 qSCR7VNWuZe8e61iIWwQdbW4/JvemRoeAHc3uHOMs9dEUxT9FkybgEAwixkYp7lcgZJo yiOfLbXyBJ4ayBHqTFZjkmFbKrX/9wcMP/6InZW6L+sNXMF9QA2ExmYKxwZaSZfJxw+G 04HUUO3tcTjZrd3C7fTTVJP9JFat5GT8G4Njaj0rRotaFKMuGnIxBdrZ4JW5PGLrl1Ur BTN0FHBMS5/UeoGLXgy0AShhYOlxj/L6KZIZftRfxa5Zg6Gn+1DT74WxMx+1ZRR4w4gH 4FIQ== X-Gm-Message-State: AC+VfDxOr7853MbRyCJwznwJu6aD316oWu1iBKGKkmmCywWA3T1NJQ4M F7ca4Gap8frJ2iuyF/M5bPnR0Fqia2I= X-Google-Smtp-Source: ACHHUZ5rfeQ30WgEWsvihW+AQWlCShTDRMKE33KIcXVUD2BrSfEimu8y8IKHZRWydfXJkRj6itRYVA== X-Received: by 2002:a05:6402:27c9:b0:506:bbf8:5152 with SMTP id c9-20020a05640227c900b00506bbf85152mr3232070ede.9.1686479670090; Sun, 11 Jun 2023 03:34:30 -0700 (PDT) Received: from archlinux.. (ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:29 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 10/15] hw/pci-host/i440fx: Make MemoryRegion pointers accessible as properties Date: Sun, 11 Jun 2023 12:34:07 +0200 Message-ID: <20230611103412.12109-11-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=shentey@gmail.com; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The goal is to eliminate i440fx_init() which is a legacy init function. This neccessitates the memory regions to be properties, like in Q35, which will be assigned in board code. Since i440fx needs different PCI devices in Xen mode, and since i440fx shall be self-contained, the PCI device will be created during realization of the host. Thus the pointers need to be moved to the host structure to be usable as properties. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- include/hw/pci-host/i440fx.h | 3 --- hw/pci-host/i440fx.c | 44 ++++++++++++++++++++++++++---------- 2 files changed, 32 insertions(+), 15 deletions(-) diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index bf57216c78..e3a550021e 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -25,9 +25,6 @@ struct PCII440FXState { PCIDevice parent_obj; /*< public >*/ - MemoryRegion *system_memory; - MemoryRegion *pci_address_space; - MemoryRegion *ram_memory; PAMMemoryRegion pam_regions[PAM_REGIONS_COUNT]; MemoryRegion smram_region; MemoryRegion smram, low_smram; diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 9df4688b2e..050200cc46 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -46,7 +46,13 @@ OBJECT_DECLARE_SIMPLE_TYPE(I440FXState, I440FX_PCI_HOST_BRIDGE) struct I440FXState { + /*< private >*/ PCIHostState parent_obj; + /*< public >*/ + + MemoryRegion *system_memory; + MemoryRegion *pci_address_space; + MemoryRegion *ram_memory; Range pci_hole; uint64_t pci_hole64_size; bool pci_hole64_fix; @@ -214,12 +220,25 @@ static void i440fx_pcihost_get_pci_hole64_end(Object *obj, Visitor *v, static void i440fx_pcihost_initfn(Object *obj) { + I440FXState *s = I440FX_PCI_HOST_BRIDGE(obj); PCIHostState *phb = PCI_HOST_BRIDGE(obj); memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb, "pci-conf-idx", 4); memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, "pci-conf-data", 4); + + object_property_add_link(obj, PCI_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION, + (Object **) &s->ram_memory, + qdev_prop_allow_set_link_before_realize, 0); + + object_property_add_link(obj, PCI_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION, + (Object **) &s->pci_address_space, + qdev_prop_allow_set_link_before_realize, 0); + + object_property_add_link(obj, PCI_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, + (Object **) &s->system_memory, + qdev_prop_allow_set_link_before_realize, 0); } static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) @@ -255,7 +274,11 @@ PCIBus *i440fx_init(const char *pci_type, PCII440FXState *f; unsigned i; - b = pci_root_bus_new(dev, NULL, pci_address_space, + s->system_memory = address_space_mem; + s->pci_address_space = pci_address_space; + s->ram_memory = ram_memory; + + b = pci_root_bus_new(dev, NULL, s->pci_address_space, address_space_io, 0, TYPE_PCI_BUS); phb->bus = b; object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev)); @@ -263,20 +286,17 @@ PCIBus *i440fx_init(const char *pci_type, d = pci_create_simple(b, 0, pci_type); f = I440FX_PCI_DEVICE(d); - f->system_memory = address_space_mem; - f->pci_address_space = pci_address_space; - f->ram_memory = ram_memory; range_set_bounds(&s->pci_hole, below_4g_mem_size, IO_APIC_DEFAULT_ADDRESS - 1); /* setup pci memory mapping */ - pc_pci_as_mapping_init(f->system_memory, f->pci_address_space); + pc_pci_as_mapping_init(s->system_memory, s->pci_address_space); /* if *disabled* show SMRAM to all CPUs */ memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region", - f->pci_address_space, SMRAM_C_BASE, SMRAM_C_SIZE); - memory_region_add_subregion_overlap(f->system_memory, SMRAM_C_BASE, + s->pci_address_space, SMRAM_C_BASE, SMRAM_C_SIZE); + memory_region_add_subregion_overlap(s->system_memory, SMRAM_C_BASE, &f->smram_region, 1); memory_region_set_enabled(&f->smram_region, true); @@ -284,17 +304,17 @@ PCIBus *i440fx_init(const char *pci_type, memory_region_init(&f->smram, OBJECT(d), "smram", 4 * GiB); memory_region_set_enabled(&f->smram, true); memory_region_init_alias(&f->low_smram, OBJECT(d), "smram-low", - f->ram_memory, SMRAM_C_BASE, SMRAM_C_SIZE); + s->ram_memory, SMRAM_C_BASE, SMRAM_C_SIZE); memory_region_set_enabled(&f->low_smram, true); memory_region_add_subregion(&f->smram, SMRAM_C_BASE, &f->low_smram); object_property_add_const_link(qdev_get_machine(), "smram", OBJECT(&f->smram)); - init_pam(&f->pam_regions[0], OBJECT(d), f->ram_memory, f->system_memory, - f->pci_address_space, PAM_BIOS_BASE, PAM_BIOS_SIZE); + init_pam(&f->pam_regions[0], OBJECT(d), s->ram_memory, s->system_memory, + s->pci_address_space, PAM_BIOS_BASE, PAM_BIOS_SIZE); for (i = 0; i < ARRAY_SIZE(f->pam_regions) - 1; ++i) { - init_pam(&f->pam_regions[i + 1], OBJECT(d), f->ram_memory, - f->system_memory, f->pci_address_space, + init_pam(&f->pam_regions[i + 1], OBJECT(d), s->ram_memory, + s->system_memory, s->pci_address_space, PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); } From patchwork Sun Jun 11 10:34:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793520 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20221208 header.b=rE4EhJBs; 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(ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:30 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 11/15] hw/pci-host/i440fx: Add PCI_HOST_PROP_IO_MEM property Date: Sun, 11 Jun 2023 12:34:08 +0200 Message-ID: <20230611103412.12109-12-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=shentey@gmail.com; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce the property in anticipation of QOM'ification; Q35 has the same property. Signed-off-by: Bernhard Beschow --- hw/pci-host/i440fx.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 050200cc46..67eeffb421 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -27,7 +27,6 @@ #include "qemu/range.h" #include "hw/i386/pc.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pci_host.h" #include "hw/pci-host/i440fx.h" #include "hw/qdev-properties.h" @@ -51,6 +50,7 @@ struct I440FXState { /*< public >*/ MemoryRegion *system_memory; + MemoryRegion *address_space_io; MemoryRegion *pci_address_space; MemoryRegion *ram_memory; Range pci_hole; @@ -239,17 +239,22 @@ static void i440fx_pcihost_initfn(Object *obj) object_property_add_link(obj, PCI_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, (Object **) &s->system_memory, qdev_prop_allow_set_link_before_realize, 0); + + object_property_add_link(obj, PCI_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION, + (Object **) &s->address_space_io, + qdev_prop_allow_set_link_before_realize, 0); } static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) { + I440FXState *s = I440FX_PCI_HOST_BRIDGE(dev); PCIHostState *phb = PCI_HOST_BRIDGE(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - memory_region_add_subregion(phb->bus->address_space_io, 0xcf8, &phb->conf_mem); + memory_region_add_subregion(s->address_space_io, 0xcf8, &phb->conf_mem); sysbus_init_ioports(sbd, 0xcf8, 4); - memory_region_add_subregion(phb->bus->address_space_io, 0xcfc, &phb->data_mem); + memory_region_add_subregion(s->address_space_io, 0xcfc, &phb->data_mem); sysbus_init_ioports(sbd, 0xcfc, 4); /* register i440fx 0xcf8 port as coalesced pio */ @@ -275,11 +280,12 @@ PCIBus *i440fx_init(const char *pci_type, unsigned i; s->system_memory = address_space_mem; + s->address_space_io = address_space_io; s->pci_address_space = pci_address_space; s->ram_memory = ram_memory; b = pci_root_bus_new(dev, NULL, s->pci_address_space, - address_space_io, 0, TYPE_PCI_BUS); + s->address_space_io, 0, TYPE_PCI_BUS); phb->bus = b; object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev)); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); From patchwork Sun Jun 11 10:34:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793516 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20221208 header.b=hCYzsirE; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QfB6B20hyz20fV for ; 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(ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:31 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 12/15] hw/pci-host/i440fx: Add PCI_HOST_{ABOVE, BELOW}_4G_MEM_SIZE properties Date: Sun, 11 Jun 2023 12:34:09 +0200 Message-ID: <20230611103412.12109-13-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=shentey@gmail.com; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce the properties in anticipation of QOM'ification; Q35 has the same properties. Note that we want to avoid a "ram size" property in the QOM interface since it seems redundant to both properties introduced in this change. Thus the removal of the ram_size parameter. We assume the invariant of both properties to sum up to "ram size" which is already asserted in pc_memory_init(). Under Xen the invariant seems to hold as well, so we now also check it there. Signed-off-by: Bernhard Beschow --- include/hw/pci-host/i440fx.h | 1 - hw/i386/pc_piix.c | 5 ++++- hw/pci-host/i440fx.c | 12 ++++++++++-- 3 files changed, 14 insertions(+), 4 deletions(-) diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index e3a550021e..7e38456ebb 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -36,7 +36,6 @@ PCIBus *i440fx_init(const char *pci_type, DeviceState *dev, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, - ram_addr_t ram_size, ram_addr_t below_4g_mem_size, ram_addr_t above_4g_mem_size, MemoryRegion *pci_memory, diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 42af03dbb4..f9141536cf 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -227,6 +227,9 @@ static void pc_init1(MachineState *machine, if (!xen_enabled()) { pc_memory_init(pcms, system_memory, rom_memory, hole64_size); } else { + assert(machine->ram_size == x86ms->below_4g_mem_size + + x86ms->above_4g_mem_size); + pc_system_flash_cleanup_unused(pcms); if (machine->kernel_filename != NULL) { /* For xen HVM direct kernel boot, load linux here */ @@ -242,7 +245,7 @@ static void pc_init1(MachineState *machine, pci_bus = i440fx_init(pci_type, i440fx_host, - system_memory, system_io, machine->ram_size, + system_memory, system_io, x86ms->below_4g_mem_size, x86ms->above_4g_mem_size, pci_memory, ram_memory); diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 67eeffb421..3c44f24d2a 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -54,6 +54,8 @@ struct I440FXState { MemoryRegion *pci_address_space; MemoryRegion *ram_memory; Range pci_hole; + uint64_t below_4g_mem_size; + uint64_t above_4g_mem_size; uint64_t pci_hole64_size; bool pci_hole64_fix; uint32_t short_root_bus; @@ -266,7 +268,6 @@ PCIBus *i440fx_init(const char *pci_type, DeviceState *dev, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, - ram_addr_t ram_size, ram_addr_t below_4g_mem_size, ram_addr_t above_4g_mem_size, MemoryRegion *pci_address_space, @@ -283,6 +284,8 @@ PCIBus *i440fx_init(const char *pci_type, s->address_space_io = address_space_io; s->pci_address_space = pci_address_space; s->ram_memory = ram_memory; + s->below_4g_mem_size = below_4g_mem_size; + s->above_4g_mem_size = above_4g_mem_size; b = pci_root_bus_new(dev, NULL, s->pci_address_space, s->address_space_io, 0, TYPE_PCI_BUS); @@ -293,7 +296,7 @@ PCIBus *i440fx_init(const char *pci_type, d = pci_create_simple(b, 0, pci_type); f = I440FX_PCI_DEVICE(d); - range_set_bounds(&s->pci_hole, below_4g_mem_size, + range_set_bounds(&s->pci_hole, s->below_4g_mem_size, IO_APIC_DEFAULT_ADDRESS - 1); /* setup pci memory mapping */ @@ -324,6 +327,7 @@ PCIBus *i440fx_init(const char *pci_type, PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); } + ram_addr_t ram_size = s->below_4g_mem_size + s->above_4g_mem_size; ram_size = ram_size / 8 / 1024 / 1024; if (ram_size > 255) { ram_size = 255; @@ -383,6 +387,10 @@ static Property i440fx_props[] = { DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, I440FXState, pci_hole64_size, I440FX_PCI_HOST_HOLE64_SIZE_DEFAULT), DEFINE_PROP_UINT32("short_root_bus", I440FXState, short_root_bus, 0), + DEFINE_PROP_SIZE(PCI_HOST_BELOW_4G_MEM_SIZE, I440FXState, + below_4g_mem_size, 0), + DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MEM_SIZE, I440FXState, + above_4g_mem_size, 0), DEFINE_PROP_BOOL("x-pci-hole64-fix", I440FXState, pci_hole64_fix, true), DEFINE_PROP_END_OF_LIST(), }; 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(ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:32 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 13/15] hw/pci-host/i440fx: Add I440FX_HOST_PROP_PCI_TYPE property Date: Sun, 11 Jun 2023 12:34:10 +0200 Message-ID: <20230611103412.12109-14-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=shentey@gmail.com; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org I440FX needs a different PCI device model if the "igd-passthru" property is enabled. The type name is currently passed as a parameter to i440fx_init(). This parameter will be replaced by a property assignment once i440fx_init() gets resolved. Signed-off-by: Bernhard Beschow --- include/hw/pci-host/i440fx.h | 2 ++ hw/pci-host/i440fx.c | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index 7e38456ebb..2d7bae5a45 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -15,6 +15,8 @@ #include "hw/pci-host/pam.h" #include "qom/object.h" +#define I440FX_HOST_PROP_PCI_TYPE "pci-type" + #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" #define TYPE_I440FX_PCI_DEVICE "i440FX" diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 3c44f24d2a..44ff3f7ea0 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -59,6 +59,8 @@ struct I440FXState { uint64_t pci_hole64_size; bool pci_hole64_fix; uint32_t short_root_bus; + + char *pci_type; }; #define I440FX_PAM 0x59 @@ -286,6 +288,7 @@ PCIBus *i440fx_init(const char *pci_type, s->ram_memory = ram_memory; s->below_4g_mem_size = below_4g_mem_size; s->above_4g_mem_size = above_4g_mem_size; + s->pci_type = (char *)pci_type; b = pci_root_bus_new(dev, NULL, s->pci_address_space, s->address_space_io, 0, TYPE_PCI_BUS); @@ -293,7 +296,7 @@ PCIBus *i440fx_init(const char *pci_type, object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev)); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - d = pci_create_simple(b, 0, pci_type); + d = pci_create_simple(b, 0, s->pci_type); f = I440FX_PCI_DEVICE(d); range_set_bounds(&s->pci_hole, s->below_4g_mem_size, @@ -392,6 +395,7 @@ static Property i440fx_props[] = { DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MEM_SIZE, I440FXState, above_4g_mem_size, 0), DEFINE_PROP_BOOL("x-pci-hole64-fix", I440FXState, pci_hole64_fix, true), + DEFINE_PROP_STRING(I440FX_HOST_PROP_PCI_TYPE, I440FXState, pci_type), DEFINE_PROP_END_OF_LIST(), }; From patchwork Sun Jun 11 10:34:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793523 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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(ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:33 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 14/15] hw/pci-host/i440fx: Resolve i440fx_init() Date: Sun, 11 Jun 2023 12:34:11 +0200 Message-ID: <20230611103412.12109-15-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=shentey@gmail.com; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org i440fx_init() is a legacy init function. The previous patches worked towards TYPE_I440FX_PCI_HOST_BRIDGE to be instantiated the QOM way. Do this now by transforming the parameters passed to i440fx_init() into property assignments. Signed-off-by: Bernhard Beschow --- include/hw/pci-host/i440fx.h | 10 ---------- hw/i386/pc_piix.c | 30 +++++++++++++++++++++--------- hw/pci-host/i440fx.c | 34 +++++----------------------------- 3 files changed, 26 insertions(+), 48 deletions(-) diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index 2d7bae5a45..c988f70890 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -34,14 +34,4 @@ struct PCII440FXState { #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" -PCIBus *i440fx_init(const char *pci_type, - DeviceState *dev, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - ram_addr_t below_4g_mem_size, - ram_addr_t above_4g_mem_size, - MemoryRegion *pci_memory, - MemoryRegion *ram_memory); - - #endif diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index f9141536cf..22173b122b 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -126,7 +126,7 @@ static void pc_init1(MachineState *machine, MemoryRegion *rom_memory; ram_addr_t lowmem; uint64_t hole64_size; - DeviceState *i440fx_host; + Object *i440fx_host; /* * Calculate ram split, for memory below and above 4G. It's a bit @@ -201,8 +201,8 @@ static void pc_init1(MachineState *machine, pci_memory = g_new(MemoryRegion, 1); memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); rom_memory = pci_memory; - i440fx_host = qdev_new(host_type); - hole64_size = object_property_get_uint(OBJECT(i440fx_host), + i440fx_host = OBJECT(qdev_new(host_type)); + hole64_size = object_property_get_uint(i440fx_host, PCI_HOST_PROP_PCI_HOLE64_SIZE, &error_abort); } else { @@ -243,12 +243,24 @@ static void pc_init1(MachineState *machine, PIIX3State *piix3; PCIDevice *pci_dev; - pci_bus = i440fx_init(pci_type, - i440fx_host, - system_memory, system_io, - x86ms->below_4g_mem_size, - x86ms->above_4g_mem_size, - pci_memory, ram_memory); + object_property_add_child(OBJECT(machine), "i440fx", i440fx_host); + object_property_set_link(i440fx_host, PCI_HOST_PROP_RAM_MEM, + OBJECT(ram_memory), &error_fatal); + object_property_set_link(i440fx_host, PCI_HOST_PROP_PCI_MEM, + OBJECT(pci_memory), &error_fatal); + object_property_set_link(i440fx_host, PCI_HOST_PROP_SYSTEM_MEM, + OBJECT(system_memory), &error_fatal); + object_property_set_link(i440fx_host, PCI_HOST_PROP_IO_MEM, + OBJECT(system_io), &error_fatal); + object_property_set_uint(i440fx_host, PCI_HOST_BELOW_4G_MEM_SIZE, + x86ms->below_4g_mem_size, &error_fatal); + object_property_set_uint(i440fx_host, PCI_HOST_ABOVE_4G_MEM_SIZE, + x86ms->above_4g_mem_size, &error_fatal); + object_property_set_str(i440fx_host, I440FX_HOST_PROP_PCI_TYPE, + pci_type, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(i440fx_host), &error_fatal); + + pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(i440fx_host), "pci.0")); pci_bus_map_irqs(pci_bus, xen_enabled() ? xen_pci_slot_get_pirq : pc_pci_slot_get_pirq); diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 44ff3f7ea0..e1708bf2c9 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -251,9 +251,14 @@ static void i440fx_pcihost_initfn(Object *obj) static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) { + ERRP_GUARD(); I440FXState *s = I440FX_PCI_HOST_BRIDGE(dev); PCIHostState *phb = PCI_HOST_BRIDGE(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + PCIBus *b; + PCIDevice *d; + PCII440FXState *f; + unsigned i; memory_region_add_subregion(s->address_space_io, 0xcf8, &phb->conf_mem); sysbus_init_ioports(sbd, 0xcf8, 4); @@ -264,37 +269,10 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) /* register i440fx 0xcf8 port as coalesced pio */ memory_region_set_flush_coalesced(&phb->data_mem); memory_region_add_coalescing(&phb->conf_mem, 0, 4); -} - -PCIBus *i440fx_init(const char *pci_type, - DeviceState *dev, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - ram_addr_t below_4g_mem_size, - ram_addr_t above_4g_mem_size, - MemoryRegion *pci_address_space, - MemoryRegion *ram_memory) -{ - I440FXState *s = I440FX_PCI_HOST_BRIDGE(dev); - PCIHostState *phb = PCI_HOST_BRIDGE(dev); - PCIBus *b; - PCIDevice *d; - PCII440FXState *f; - unsigned i; - - s->system_memory = address_space_mem; - s->address_space_io = address_space_io; - s->pci_address_space = pci_address_space; - s->ram_memory = ram_memory; - s->below_4g_mem_size = below_4g_mem_size; - s->above_4g_mem_size = above_4g_mem_size; - s->pci_type = (char *)pci_type; b = pci_root_bus_new(dev, NULL, s->pci_address_space, s->address_space_io, 0, TYPE_PCI_BUS); phb->bus = b; - object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev)); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); d = pci_create_simple(b, 0, s->pci_type); f = I440FX_PCI_DEVICE(d); @@ -338,8 +316,6 @@ PCIBus *i440fx_init(const char *pci_type, d->config[I440FX_COREBOOT_RAM_SIZE] = ram_size; i440fx_update_memory_mappings(f); - - return b; } static void i440fx_class_init(ObjectClass *klass, void *data) From patchwork Sun Jun 11 10:34:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 1793519 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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(ip5f5bd7c0.dynamic.kabel-deutschland.de. [95.91.215.192]) by smtp.gmail.com with ESMTPSA id m8-20020a056402050800b005149cb5ee2dsm3794314edv.82.2023.06.11.03.34.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jun 2023 03:34:34 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Bernhard Beschow Subject: [PATCH 15/15] hw/i386/pc_piix: Move i440fx' realize near its qdev_new() Date: Sun, 11 Jun 2023 12:34:12 +0200 Message-ID: <20230611103412.12109-16-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230611103412.12109-1-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=shentey@gmail.com; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org I440FX realization is currently mixed with PIIX3 creation. Furthermore, it is common practice to only set properties between a device's qdev_new() and qdev_realize(). Clean up to resolve both issues. Since I440FX spawns a PCI bus let's also move the pci_bus initialization there. Note that when running `qemu-system-x86_64 -M pc -S` before and after this patch, `info mtree` in the QEMU console doesn't show any differences except that the ordering is different. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/pc_piix.c | 57 ++++++++++++++++++++++++----------------------- 1 file changed, 29 insertions(+), 28 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 22173b122b..23b9725c94 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -126,7 +126,6 @@ static void pc_init1(MachineState *machine, MemoryRegion *rom_memory; ram_addr_t lowmem; uint64_t hole64_size; - Object *i440fx_host; /* * Calculate ram split, for memory below and above 4G. It's a bit @@ -198,17 +197,43 @@ static void pc_init1(MachineState *machine, } if (pcmc->pci_enabled) { + Object *phb; + pci_memory = g_new(MemoryRegion, 1); memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); rom_memory = pci_memory; - i440fx_host = OBJECT(qdev_new(host_type)); - hole64_size = object_property_get_uint(i440fx_host, + + phb = OBJECT(qdev_new(host_type)); + object_property_add_child(OBJECT(machine), "i440fx", phb); + object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM, + OBJECT(ram_memory), &error_fatal); + object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM, + OBJECT(pci_memory), &error_fatal); + object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM, + OBJECT(system_memory), &error_fatal); + object_property_set_link(phb, PCI_HOST_PROP_IO_MEM, + OBJECT(system_io), &error_fatal); + object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE, + x86ms->below_4g_mem_size, &error_fatal); + object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, + x86ms->above_4g_mem_size, &error_fatal); + object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type, + &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); + + pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0")); + pci_bus_map_irqs(pci_bus, + xen_enabled() ? xen_pci_slot_get_pirq + : pc_pci_slot_get_pirq); + pcms->bus = pci_bus; + + hole64_size = object_property_get_uint(phb, PCI_HOST_PROP_PCI_HOLE64_SIZE, &error_abort); } else { pci_memory = NULL; rom_memory = system_memory; - i440fx_host = NULL; + pci_bus = NULL; hole64_size = 0; } @@ -243,29 +268,6 @@ static void pc_init1(MachineState *machine, PIIX3State *piix3; PCIDevice *pci_dev; - object_property_add_child(OBJECT(machine), "i440fx", i440fx_host); - object_property_set_link(i440fx_host, PCI_HOST_PROP_RAM_MEM, - OBJECT(ram_memory), &error_fatal); - object_property_set_link(i440fx_host, PCI_HOST_PROP_PCI_MEM, - OBJECT(pci_memory), &error_fatal); - object_property_set_link(i440fx_host, PCI_HOST_PROP_SYSTEM_MEM, - OBJECT(system_memory), &error_fatal); - object_property_set_link(i440fx_host, PCI_HOST_PROP_IO_MEM, - OBJECT(system_io), &error_fatal); - object_property_set_uint(i440fx_host, PCI_HOST_BELOW_4G_MEM_SIZE, - x86ms->below_4g_mem_size, &error_fatal); - object_property_set_uint(i440fx_host, PCI_HOST_ABOVE_4G_MEM_SIZE, - x86ms->above_4g_mem_size, &error_fatal); - object_property_set_str(i440fx_host, I440FX_HOST_PROP_PCI_TYPE, - pci_type, &error_fatal); - sysbus_realize_and_unref(SYS_BUS_DEVICE(i440fx_host), &error_fatal); - - pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(i440fx_host), "pci.0")); - pci_bus_map_irqs(pci_bus, - xen_enabled() ? xen_pci_slot_get_pirq - : pc_pci_slot_get_pirq); - pcms->bus = pci_bus; - pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, TYPE_PIIX3_DEVICE); @@ -290,7 +292,6 @@ static void pc_init1(MachineState *machine, rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev), "rtc")); } else { - pci_bus = NULL; isa_bus = isa_bus_new(NULL, system_memory, system_io, &error_abort);