From patchwork Wed May 3 15:30:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Schwab X-Patchwork-Id: 1776566 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=suse.de header.i=@suse.de header.a=rsa-sha256 header.s=susede2_rsa header.b=IfE8YayA; dkim=pass header.d=suse.de header.i=@suse.de header.a=ed25519-sha256 header.s=susede2_ed25519 header.b=xY9cwfgJ; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QBLW56Lq4z1ydX for ; Thu, 4 May 2023 01:30:41 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1puEQw-0002xE-E1; Wed, 03 May 2023 11:30:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1puEQt-0002wh-HL for qemu-devel@nongnu.org; Wed, 03 May 2023 11:30:19 -0400 Received: from smtp-out1.suse.de ([195.135.220.28]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1puEQq-0002QK-9B for qemu-devel@nongnu.org; Wed, 03 May 2023 11:30:18 -0400 Received: from relay2.suse.de (relay2.suse.de [149.44.160.134]) by smtp-out1.suse.de (Postfix) with ESMTP id 8BEAE2298E; Wed, 3 May 2023 15:30:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1683127812; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type; bh=OMTz4WaZav7ggbW3D2JGInU1tyLsnWu0ZUFlrCrX4oM=; b=IfE8YayAZ0yLoj/oqMVJ+PpTSo/YJbsI7HHHVAmnDfRnVf4sCDLd9x10pBILyOXr9iYdyK TjyhcKCGl+LLxJe1DdLS0FbfrCudcBVNLPiiJJCGu2ea1sU/ZBNuAN6Bq+17oCzF+DxC9J VozC24frW3j3vnGSOG4kOjKwNzTr6e0= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1683127812; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type; bh=OMTz4WaZav7ggbW3D2JGInU1tyLsnWu0ZUFlrCrX4oM=; b=xY9cwfgJpoGm4Na5cUTTvHZnQ9RBO1f/JXfEetotlfVZiOlrO9f9R2jjcVtGDr8lDhvU80 wJO/V7dS9acxGiBw== Received: from hawking.suse.de (unknown [10.168.4.11]) by relay2.suse.de (Postfix) with ESMTP id 709752C141; Wed, 3 May 2023 15:30:12 +0000 (UTC) Received: by hawking.suse.de (Postfix, from userid 17005) id 64D2F4AAD8C; Wed, 3 May 2023 17:30:12 +0200 (CEST) From: Andreas Schwab To: Laurent Vivier Cc: Palmer Dabbelt , qemu-devel@nongnu.org Subject: [PATCH v3] linux-user: Add /proc/cpuinfo handler for RISC-V X-Yow: Do I hear th' SPINNING of various WHIRRING, ROUND, and WARM WHIRLOMATICS?! Date: Wed, 03 May 2023 17:30:12 +0200 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 Received-SPF: pass client-ip=195.135.220.28; envelope-from=schwab@suse.de; helo=smtp-out1.suse.de X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From 912af433fa5d93ce81d2054135ed475ab7462d2d Mon Sep 17 00:00:00 2001 From: Andreas Schwab Date: Tue, 18 Apr 2023 11:54:01 +0200 Signed-off-by: Andreas Schwab Reviewed-by: Palmer Dabbelt --- v3: fix isa order linux-user/syscall.c | 55 ++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 2 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 69f740ff98..5207259b56 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -8231,7 +8231,8 @@ void target_exception_dump(CPUArchState *env, const char *fmt, int code) } #if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN || \ - defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA) + defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA) || \ + defined(TARGET_RISCV) static int is_proc(const char *filename, const char *entry) { return strcmp(filename, entry) == 0; @@ -8309,6 +8310,56 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd) } #endif +#if defined(TARGET_RISCV) +static int open_cpuinfo(CPUArchState *cpu_env, int fd) +{ + int i, num_cpus; + char isa[32]; + +#if defined(TARGET_RISCV32) + strcpy (isa, "rv32"); +#endif +#if defined(TARGET_RISCV64) + strcpy (isa, "rv64"); +#endif + i = strlen (isa); + if (riscv_has_ext (cpu_env, RVI)) + isa[i++] = 'i'; + if (riscv_has_ext (cpu_env, RVE)) + isa[i++] = 'e'; + if (riscv_has_ext (cpu_env, RVM)) + isa[i++] = 'm'; + if (riscv_has_ext (cpu_env, RVA)) + isa[i++] = 'a'; + if (riscv_has_ext (cpu_env, RVF)) + isa[i++] = 'f'; + if (riscv_has_ext (cpu_env, RVD)) + isa[i++] = 'd'; + if (riscv_has_ext (cpu_env, RVC)) + isa[i++] = 'c'; + if (riscv_has_ext (cpu_env, RVV)) + isa[i++] = 'v'; + isa[i] = 0; + + num_cpus = sysconf(_SC_NPROCESSORS_ONLN); + for (i = 0; i < num_cpus; i++) { + dprintf(fd, "processor\t: %d\n", i); + dprintf(fd, "hart\t\t: %d\n", i); + dprintf(fd, "isa\t\t: %s\n", isa); +#if defined(TARGET_RISCV32) + dprintf(fd, "mmu\t\t: sv32\n"); +#endif +#if defined(TARGET_RISCV64) + dprintf(fd, "mmu\t\t: sv57\n"); +#endif + dprintf(fd, "mvendorid\t: 0x0\n"); + dprintf(fd, "marchid\t\t: 0x0\n"); + dprintf(fd, "mimpid\t\t: 0x0\n\n"); + } + return 0; +} +#endif + #if defined(TARGET_M68K) static int open_hardware(CPUArchState *cpu_env, int fd) { @@ -8333,7 +8384,7 @@ static int do_openat(CPUArchState *cpu_env, int dirfd, const char *pathname, int #if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN { "/proc/net/route", open_net_route, is_proc }, #endif -#if defined(TARGET_SPARC) || defined(TARGET_HPPA) +#if defined(TARGET_SPARC) || defined(TARGET_HPPA) || defined(TARGET_RISCV) { "/proc/cpuinfo", open_cpuinfo, is_proc }, #endif #if defined(TARGET_M68K)