From patchwork Fri Apr 28 16:48:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gurchetan Singh X-Patchwork-Id: 1775067 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=ArZ1bzs9; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q7JV215lfz23tZ for ; Sat, 29 Apr 2023 02:49:14 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1psRGx-0001CK-JK; Fri, 28 Apr 2023 12:48:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1psRGq-0001BZ-1e for qemu-devel@nongnu.org; Fri, 28 Apr 2023 12:48:33 -0400 Received: from mail-pf1-x42b.google.com ([2607:f8b0:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1psRGn-0004pL-Oo for qemu-devel@nongnu.org; Fri, 28 Apr 2023 12:48:31 -0400 Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-64115eef620so13910844b3a.1 for ; Fri, 28 Apr 2023 09:48:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1682700506; x=1685292506; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=Y3zt4VMlRxuhbqyC4FpwqUcCzS4vqcvfSbOdrHpo2FE=; b=ArZ1bzs9VClJbslLyWvpr+DfraSljnHCHRw2hURUVLw1Gd6EBHiY9pyHtTmEajYRf7 0g271ptr6MMciQcA7EnmM5+lqVUDenV3so8l/sqenCuodY9ohMKcdSd/K7WbTSSlpZwE 9j/+FwVnkXFhhwiiJ3MJS0oInc2csj4StCP04= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682700506; x=1685292506; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=Y3zt4VMlRxuhbqyC4FpwqUcCzS4vqcvfSbOdrHpo2FE=; b=drrJB+L87Pcq1p/5Vl+JW4sIYTUkvZOre3oLbQemt5oD4DFc7KXMHpAB1RPd+k72sZ emfR23hjn/zTANt3iRw4dHeyaITgzpcJ5qWV1dhAVlYst2Q17GAJzaRGKytv+L6C5pVU ZUoCH8CBO+Q32f0Qmo8I6gRFhz3oy1B40/iFiu91+xiHAGJxbMbjHOIXyVyrXIfr5R92 MYRqjMFedQAgQU3cTrwSrObBY44eSBQKgjWU6AeOZuZn7OsUIS1v92cHfahl9now45Nx /sCJzR2vh84SboagOJvIDXKCF9g2mAUrxeoTIqtSShNrUlCE+PXSxCYXC7aVxH8uKpWL /8dw== X-Gm-Message-State: AC+VfDyrku/Gl5a26t6aZguWixg7sPl78oJJBMFypozBVNRpyyOfacit xlkuCDBgcT4OZb9Qc7+HAfsq4w3YSZPIW6Oy8Lo= X-Google-Smtp-Source: ACHHUZ5kQLxO8akFmwwBxxLe60mG/6CTXz9ke0ZhYW94mP7aatMPdx/xgSssgwuO/5lBc45A16lAOg== X-Received: by 2002:a17:902:e88e:b0:1a1:ca4d:120a with SMTP id w14-20020a170902e88e00b001a1ca4d120amr12209664plg.7.1682700506368; Fri, 28 Apr 2023 09:48:26 -0700 (PDT) Received: from gurchetansingh0.mtv.corp.google.com ([2620:15c:a7:2:fdc4:a664:d93b:43db]) by smtp.gmail.com with ESMTPSA id jf19-20020a170903269300b001a2806ae2f7sm13566796plb.83.2023.04.28.09.48.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Apr 2023 09:48:25 -0700 (PDT) From: Gurchetan Singh X-Google-Original-From: Gurchetan Singh To: qemu-devel@nongnu.org Cc: philmd@linaro.org, kraxel@redhat.com, marcandre.lureau@redhat.com, akihiko.odaki@gmail.com, dmitry.osipenko@collabora.com, ray.huang@amd.com, alex.bennee@linaro.org Subject: [PATCH v2 1/5] hw/display/virtio-gpu-virgl: virtio_gpu_gl -> virtio_gpu_virgl Date: Fri, 28 Apr 2023 09:48:19 -0700 Message-Id: <20230428164823.789-1-gurchetansingh@google.com> X-Mailer: git-send-email 2.31.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=gurchetansingh@chromium.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.171, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Gurchetan Singh The virtio-gpu GL device has a heavy dependence on virgl. Acknowledge this by naming functions accurately. Signed-off-by: Gurchetan Singh Reviewed-by: Philippe Mathieu-Daudé --- v1: - (Philippe) virtio_gpu_virglrenderer_reset --> virtio_gpu_virgl_reset_renderer v2: - (Akihiko) Fix unnecessary line break hw/display/virtio-gpu-gl.c | 26 +++++++++++++------------- hw/display/virtio-gpu-virgl.c | 2 +- include/hw/virtio/virtio-gpu.h | 2 +- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c index e06be60dfb..8573043b85 100644 --- a/hw/display/virtio-gpu-gl.c +++ b/hw/display/virtio-gpu-gl.c @@ -25,9 +25,9 @@ #include -static void virtio_gpu_gl_update_cursor_data(VirtIOGPU *g, - struct virtio_gpu_scanout *s, - uint32_t resource_id) +static void virtio_gpu_virgl_update_cursor(VirtIOGPU *g, + struct virtio_gpu_scanout *s, + uint32_t resource_id) { uint32_t width, height; uint32_t pixels, *data; @@ -48,14 +48,14 @@ static void virtio_gpu_gl_update_cursor_data(VirtIOGPU *g, free(data); } -static void virtio_gpu_gl_flushed(VirtIOGPUBase *b) +static void virtio_gpu_virgl_flushed(VirtIOGPUBase *b) { VirtIOGPU *g = VIRTIO_GPU(b); virtio_gpu_process_cmdq(g); } -static void virtio_gpu_gl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) +static void virtio_gpu_virgl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) { VirtIOGPU *g = VIRTIO_GPU(vdev); VirtIOGPUGL *gl = VIRTIO_GPU_GL(vdev); @@ -71,7 +71,7 @@ static void virtio_gpu_gl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) } if (gl->renderer_reset) { gl->renderer_reset = false; - virtio_gpu_virgl_reset(g); + virtio_gpu_virgl_reset_renderer(g); } cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); @@ -87,7 +87,7 @@ static void virtio_gpu_gl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) virtio_gpu_virgl_fence_poll(g); } -static void virtio_gpu_gl_reset(VirtIODevice *vdev) +static void virtio_gpu_virgl_reset(VirtIODevice *vdev) { VirtIOGPU *g = VIRTIO_GPU(vdev); VirtIOGPUGL *gl = VIRTIO_GPU_GL(vdev); @@ -104,7 +104,7 @@ static void virtio_gpu_gl_reset(VirtIODevice *vdev) } } -static void virtio_gpu_gl_device_realize(DeviceState *qdev, Error **errp) +static void virtio_gpu_virgl_device_realize(DeviceState *qdev, Error **errp) { VirtIOGPU *g = VIRTIO_GPU(qdev); @@ -143,13 +143,13 @@ static void virtio_gpu_gl_class_init(ObjectClass *klass, void *data) VirtIOGPUBaseClass *vbc = VIRTIO_GPU_BASE_CLASS(klass); VirtIOGPUClass *vgc = VIRTIO_GPU_CLASS(klass); - vbc->gl_flushed = virtio_gpu_gl_flushed; - vgc->handle_ctrl = virtio_gpu_gl_handle_ctrl; + vbc->gl_flushed = virtio_gpu_virgl_flushed; + vgc->handle_ctrl = virtio_gpu_virgl_handle_ctrl; vgc->process_cmd = virtio_gpu_virgl_process_cmd; - vgc->update_cursor_data = virtio_gpu_gl_update_cursor_data; + vgc->update_cursor_data = virtio_gpu_virgl_update_cursor; - vdc->realize = virtio_gpu_gl_device_realize; - vdc->reset = virtio_gpu_gl_reset; + vdc->realize = virtio_gpu_virgl_device_realize; + vdc->reset = virtio_gpu_virgl_reset; device_class_set_props(dc, virtio_gpu_gl_properties); } diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index 1c47603d40..ffe4ec7f3d 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -599,7 +599,7 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g) } } -void virtio_gpu_virgl_reset(VirtIOGPU *g) +void virtio_gpu_virgl_reset_renderer(VirtIOGPU *g) { virgl_renderer_reset(); } diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 2e28507efe..21b0f55bc8 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -281,7 +281,7 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd); void virtio_gpu_virgl_fence_poll(VirtIOGPU *g); void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g); -void virtio_gpu_virgl_reset(VirtIOGPU *g); +void virtio_gpu_virgl_reset_renderer(VirtIOGPU *g); int virtio_gpu_virgl_init(VirtIOGPU *g); int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g); From patchwork Fri Apr 28 16:48:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gurchetan Singh X-Patchwork-Id: 1775069 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; 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Fri, 28 Apr 2023 09:48:27 -0700 (PDT) Received: from gurchetansingh0.mtv.corp.google.com ([2620:15c:a7:2:fdc4:a664:d93b:43db]) by smtp.gmail.com with ESMTPSA id jf19-20020a170903269300b001a2806ae2f7sm13566796plb.83.2023.04.28.09.48.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Apr 2023 09:48:27 -0700 (PDT) From: Gurchetan Singh X-Google-Original-From: Gurchetan Singh To: qemu-devel@nongnu.org Cc: philmd@linaro.org, kraxel@redhat.com, marcandre.lureau@redhat.com, akihiko.odaki@gmail.com, dmitry.osipenko@collabora.com, ray.huang@amd.com, alex.bennee@linaro.org Subject: [PATCH v2 2/5] hw/display/virtio-gpu-virgl: make GL device more library agnostic Date: Fri, 28 Apr 2023 09:48:20 -0700 Message-Id: <20230428164823.789-2-gurchetansingh@google.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20230428164823.789-1-gurchetansingh@google.com> References: <20230428164823.789-1-gurchetansingh@google.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=gurchetansingh@chromium.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.171, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Gurchetan Singh Rather than create a virtio-gpu-gfxstream device and it's associated variants (vga, pci), let's just extend the GL device. We need to: - Move all virgl functions to their own file - Only all needed class callbacks in the generic GL device Signed-off-by: Gurchetan Singh Reviewed-by: Philippe Mathieu-Daudé --- v2: - (Akihiko) Fix unnecessary line break hw/display/virtio-gpu-gl.c | 109 ------------------------------ hw/display/virtio-gpu-virgl.c | 118 +++++++++++++++++++++++++++++++-- include/hw/virtio/virtio-gpu.h | 11 +-- 3 files changed, 119 insertions(+), 119 deletions(-) diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c index 8573043b85..2d140e8792 100644 --- a/hw/display/virtio-gpu-gl.c +++ b/hw/display/virtio-gpu-gl.c @@ -15,121 +15,12 @@ #include "qemu/iov.h" #include "qemu/module.h" #include "qemu/error-report.h" -#include "qapi/error.h" -#include "sysemu/sysemu.h" #include "hw/virtio/virtio.h" #include "hw/virtio/virtio-gpu.h" #include "hw/virtio/virtio-gpu-bswap.h" #include "hw/virtio/virtio-gpu-pixman.h" #include "hw/qdev-properties.h" -#include - -static void virtio_gpu_virgl_update_cursor(VirtIOGPU *g, - struct virtio_gpu_scanout *s, - uint32_t resource_id) -{ - uint32_t width, height; - uint32_t pixels, *data; - - data = virgl_renderer_get_cursor_data(resource_id, &width, &height); - if (!data) { - return; - } - - if (width != s->current_cursor->width || - height != s->current_cursor->height) { - free(data); - return; - } - - pixels = s->current_cursor->width * s->current_cursor->height; - memcpy(s->current_cursor->data, data, pixels * sizeof(uint32_t)); - free(data); -} - -static void virtio_gpu_virgl_flushed(VirtIOGPUBase *b) -{ - VirtIOGPU *g = VIRTIO_GPU(b); - - virtio_gpu_process_cmdq(g); -} - -static void virtio_gpu_virgl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) -{ - VirtIOGPU *g = VIRTIO_GPU(vdev); - VirtIOGPUGL *gl = VIRTIO_GPU_GL(vdev); - struct virtio_gpu_ctrl_command *cmd; - - if (!virtio_queue_ready(vq)) { - return; - } - - if (!gl->renderer_inited) { - virtio_gpu_virgl_init(g); - gl->renderer_inited = true; - } - if (gl->renderer_reset) { - gl->renderer_reset = false; - virtio_gpu_virgl_reset_renderer(g); - } - - cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); - while (cmd) { - cmd->vq = vq; - cmd->error = 0; - cmd->finished = false; - QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next); - cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); - } - - virtio_gpu_process_cmdq(g); - virtio_gpu_virgl_fence_poll(g); -} - -static void virtio_gpu_virgl_reset(VirtIODevice *vdev) -{ - VirtIOGPU *g = VIRTIO_GPU(vdev); - VirtIOGPUGL *gl = VIRTIO_GPU_GL(vdev); - - virtio_gpu_reset(vdev); - - /* - * GL functions must be called with the associated GL context in main - * thread, and when the renderer is unblocked. - */ - if (gl->renderer_inited && !gl->renderer_reset) { - virtio_gpu_virgl_reset_scanout(g); - gl->renderer_reset = true; - } -} - -static void virtio_gpu_virgl_device_realize(DeviceState *qdev, Error **errp) -{ - VirtIOGPU *g = VIRTIO_GPU(qdev); - -#if HOST_BIG_ENDIAN - error_setg(errp, "virgl is not supported on bigendian platforms"); - return; -#endif - - if (!object_resolve_path_type("", TYPE_VIRTIO_GPU_GL, NULL)) { - error_setg(errp, "at most one %s device is permitted", TYPE_VIRTIO_GPU_GL); - return; - } - - if (!display_opengl) { - error_setg(errp, "opengl is not available"); - return; - } - - g->parent_obj.conf.flags |= (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED); - VIRTIO_GPU_BASE(g)->virtio_config.num_capsets = - virtio_gpu_virgl_get_num_capsets(g); - - virtio_gpu_device_realize(qdev, errp); -} - static Property virtio_gpu_gl_properties[] = { DEFINE_PROP_BIT("stats", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_STATS_ENABLED, false), diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index ffe4ec7f3d..786351446c 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -14,6 +14,8 @@ #include "qemu/osdep.h" #include "qemu/error-report.h" #include "qemu/iov.h" +#include "qapi/error.h" +#include "sysemu/sysemu.h" #include "trace.h" #include "hw/virtio/virtio.h" #include "hw/virtio/virtio-gpu.h" @@ -584,12 +586,12 @@ static void virtio_gpu_fence_poll(void *opaque) } } -void virtio_gpu_virgl_fence_poll(VirtIOGPU *g) +static void virtio_gpu_virgl_fence_poll(VirtIOGPU *g) { virtio_gpu_fence_poll(g); } -void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g) +static void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g) { int i; @@ -599,12 +601,12 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g) } } -void virtio_gpu_virgl_reset_renderer(VirtIOGPU *g) +static void virtio_gpu_virgl_reset_renderer(VirtIOGPU *g) { virgl_renderer_reset(); } -int virtio_gpu_virgl_init(VirtIOGPU *g) +static int virtio_gpu_virgl_init(VirtIOGPU *g) { int ret; @@ -625,7 +627,7 @@ int virtio_gpu_virgl_init(VirtIOGPU *g) return 0; } -int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g) +static int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g) { uint32_t capset2_max_ver, capset2_max_size; virgl_renderer_get_cap_set(VIRTIO_GPU_CAPSET_VIRGL2, @@ -634,3 +636,109 @@ int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g) return capset2_max_ver ? 2 : 1; } + +void virtio_gpu_virgl_update_cursor(VirtIOGPU *g, + struct virtio_gpu_scanout *s, + uint32_t resource_id) +{ + uint32_t width, height; + uint32_t pixels, *data; + + data = virgl_renderer_get_cursor_data(resource_id, &width, &height); + if (!data) { + return; + } + + if (width != s->current_cursor->width || + height != s->current_cursor->height) { + free(data); + return; + } + + pixels = s->current_cursor->width * s->current_cursor->height; + memcpy(s->current_cursor->data, data, pixels * sizeof(uint32_t)); + free(data); +} + +void virtio_gpu_virgl_flushed(VirtIOGPUBase *b) +{ + VirtIOGPU *g = VIRTIO_GPU(b); + + virtio_gpu_process_cmdq(g); +} + +void virtio_gpu_virgl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) +{ + VirtIOGPU *g = VIRTIO_GPU(vdev); + VirtIOGPUGL *gl = VIRTIO_GPU_GL(vdev); + struct virtio_gpu_ctrl_command *cmd; + + if (!virtio_queue_ready(vq)) { + return; + } + + if (!gl->renderer_inited) { + virtio_gpu_virgl_init(g); + gl->renderer_inited = true; + } + if (gl->renderer_reset) { + gl->renderer_reset = false; + virtio_gpu_virgl_reset_renderer(g); + } + + cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); + while (cmd) { + cmd->vq = vq; + cmd->error = 0; + cmd->finished = false; + QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next); + cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); + } + + virtio_gpu_process_cmdq(g); + virtio_gpu_virgl_fence_poll(g); +} + +void virtio_gpu_virgl_reset(VirtIODevice *vdev) +{ + VirtIOGPU *g = VIRTIO_GPU(vdev); + VirtIOGPUGL *gl = VIRTIO_GPU_GL(vdev); + + virtio_gpu_reset(vdev); + + /* + * GL functions must be called with the associated GL context in main + * thread, and when the renderer is unblocked. + */ + if (gl->renderer_inited && !gl->renderer_reset) { + virtio_gpu_virgl_reset_scanout(g); + gl->renderer_reset = true; + } +} + +void virtio_gpu_virgl_device_realize(DeviceState *qdev, Error **errp) +{ + VirtIOGPU *g = VIRTIO_GPU(qdev); + +#if HOST_BIG_ENDIAN + error_setg(errp, "virgl is not supported on bigendian platforms"); + return; +#endif + + if (!object_resolve_path_type("", TYPE_VIRTIO_GPU_GL, NULL)) { + error_setg(errp, "at most one %s device is permitted", + TYPE_VIRTIO_GPU_GL); + return; + } + + if (!display_opengl) { + error_setg(errp, "opengl is not available"); + return; + } + + g->parent_obj.conf.flags |= (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED); + VIRTIO_GPU_BASE(g)->virtio_config.num_capsets = + virtio_gpu_virgl_get_num_capsets(g); + + virtio_gpu_device_realize(qdev, errp); +} diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 21b0f55bc8..89ee133f07 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -279,10 +279,11 @@ int virtio_gpu_update_dmabuf(VirtIOGPU *g, /* virtio-gpu-3d.c */ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd); -void virtio_gpu_virgl_fence_poll(VirtIOGPU *g); -void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g); -void virtio_gpu_virgl_reset_renderer(VirtIOGPU *g); -int virtio_gpu_virgl_init(VirtIOGPU *g); -int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g); +void virtio_gpu_virgl_update_cursor(VirtIOGPU *g, struct virtio_gpu_scanout *s, + uint32_t resource_id); +void virtio_gpu_virgl_flushed(VirtIOGPUBase *b); +void virtio_gpu_virgl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq); +void virtio_gpu_virgl_reset(VirtIODevice *vdev); +void virtio_gpu_virgl_device_realize(DeviceState *qdev, Error **errp); #endif From patchwork Fri Apr 28 16:48:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gurchetan Singh X-Patchwork-Id: 1775066 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=coV54rDO; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q7JV00ksNz23v6 for ; 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Fri, 28 Apr 2023 09:48:28 -0700 (PDT) Received: from gurchetansingh0.mtv.corp.google.com ([2620:15c:a7:2:fdc4:a664:d93b:43db]) by smtp.gmail.com with ESMTPSA id jf19-20020a170903269300b001a2806ae2f7sm13566796plb.83.2023.04.28.09.48.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Apr 2023 09:48:28 -0700 (PDT) From: Gurchetan Singh X-Google-Original-From: Gurchetan Singh To: qemu-devel@nongnu.org Cc: philmd@linaro.org, kraxel@redhat.com, marcandre.lureau@redhat.com, akihiko.odaki@gmail.com, dmitry.osipenko@collabora.com, ray.huang@amd.com, alex.bennee@linaro.org Subject: [PATCH v2 3/5] hw/display/virtio-gpu-virgl: define callbacks in realize function Date: Fri, 28 Apr 2023 09:48:21 -0700 Message-Id: <20230428164823.789-3-gurchetansingh@google.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20230428164823.789-1-gurchetansingh@google.com> References: <20230428164823.789-1-gurchetansingh@google.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=gurchetansingh@chromium.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.171, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Gurchetan Singh This reduces the amount of renderer backend specific needed to be exposed to the GL device. We only need one realize function per renderer backend. Signed-off-by: Gurchetan Singh Reviewed-by: Philippe Mathieu-Daudé --- v1: - Remove NULL inits (Philippe) - Use VIRTIO_GPU_BASE where possible (Philippe) v2: - Fix unnecessary line break (Akihiko) hw/display/virtio-gpu-gl.c | 15 ++++++--------- hw/display/virtio-gpu-virgl.c | 35 ++++++++++++++++++++++++---------- include/hw/virtio/virtio-gpu.h | 7 ------- 3 files changed, 31 insertions(+), 26 deletions(-) diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c index 2d140e8792..cdc9483e4d 100644 --- a/hw/display/virtio-gpu-gl.c +++ b/hw/display/virtio-gpu-gl.c @@ -21,6 +21,11 @@ #include "hw/virtio/virtio-gpu-pixman.h" #include "hw/qdev-properties.h" +static void virtio_gpu_gl_device_realize(DeviceState *qdev, Error **errp) +{ + virtio_gpu_virgl_device_realize(qdev, errp); +} + static Property virtio_gpu_gl_properties[] = { DEFINE_PROP_BIT("stats", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_STATS_ENABLED, false), @@ -31,16 +36,8 @@ static void virtio_gpu_gl_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass); - VirtIOGPUBaseClass *vbc = VIRTIO_GPU_BASE_CLASS(klass); - VirtIOGPUClass *vgc = VIRTIO_GPU_CLASS(klass); - - vbc->gl_flushed = virtio_gpu_virgl_flushed; - vgc->handle_ctrl = virtio_gpu_virgl_handle_ctrl; - vgc->process_cmd = virtio_gpu_virgl_process_cmd; - vgc->update_cursor_data = virtio_gpu_virgl_update_cursor; - vdc->realize = virtio_gpu_virgl_device_realize; - vdc->reset = virtio_gpu_virgl_reset; + vdc->realize = virtio_gpu_gl_device_realize; device_class_set_props(dc, virtio_gpu_gl_properties); } diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index 786351446c..d7e01f1c77 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -401,8 +401,9 @@ static void virgl_cmd_get_capset(VirtIOGPU *g, g_free(resp); } -void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, - struct virtio_gpu_ctrl_command *cmd) +static void +virtio_gpu_virgl_process_cmd(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) { VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr); @@ -637,7 +638,7 @@ static int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g) return capset2_max_ver ? 2 : 1; } -void virtio_gpu_virgl_update_cursor(VirtIOGPU *g, +static void virtio_gpu_virgl_update_cursor(VirtIOGPU *g, struct virtio_gpu_scanout *s, uint32_t resource_id) { @@ -660,14 +661,14 @@ void virtio_gpu_virgl_update_cursor(VirtIOGPU *g, free(data); } -void virtio_gpu_virgl_flushed(VirtIOGPUBase *b) +static void virtio_gpu_virgl_flushed(VirtIOGPUBase *b) { VirtIOGPU *g = VIRTIO_GPU(b); virtio_gpu_process_cmdq(g); } -void virtio_gpu_virgl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) +static void virtio_gpu_virgl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) { VirtIOGPU *g = VIRTIO_GPU(vdev); VirtIOGPUGL *gl = VIRTIO_GPU_GL(vdev); @@ -699,7 +700,7 @@ void virtio_gpu_virgl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) virtio_gpu_virgl_fence_poll(g); } -void virtio_gpu_virgl_reset(VirtIODevice *vdev) +static void virtio_gpu_virgl_reset(VirtIODevice *vdev) { VirtIOGPU *g = VIRTIO_GPU(vdev); VirtIOGPUGL *gl = VIRTIO_GPU_GL(vdev); @@ -718,7 +719,21 @@ void virtio_gpu_virgl_reset(VirtIODevice *vdev) void virtio_gpu_virgl_device_realize(DeviceState *qdev, Error **errp) { - VirtIOGPU *g = VIRTIO_GPU(qdev); + VirtIODevice *vdev = VIRTIO_DEVICE(qdev); + VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); + + VirtIOGPUBase *bdev = VIRTIO_GPU_BASE(qdev); + VirtIOGPUBaseClass *vbc = VIRTIO_GPU_BASE_GET_CLASS(bdev); + + VirtIOGPU *gpudev = VIRTIO_GPU(qdev); + VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(gpudev); + + vbc->gl_flushed = virtio_gpu_virgl_flushed; + vgc->handle_ctrl = virtio_gpu_virgl_handle_ctrl; + vgc->process_cmd = virtio_gpu_virgl_process_cmd; + vgc->update_cursor_data = virtio_gpu_virgl_update_cursor; + + vdc->reset = virtio_gpu_virgl_reset; #if HOST_BIG_ENDIAN error_setg(errp, "virgl is not supported on bigendian platforms"); @@ -736,9 +751,9 @@ void virtio_gpu_virgl_device_realize(DeviceState *qdev, Error **errp) return; } - g->parent_obj.conf.flags |= (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED); - VIRTIO_GPU_BASE(g)->virtio_config.num_capsets = - virtio_gpu_virgl_get_num_capsets(g); + VIRTIO_GPU_BASE(gpudev)->conf.flags |= (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED); + VIRTIO_GPU_BASE(gpudev)->virtio_config.num_capsets = + virtio_gpu_virgl_get_num_capsets(gpudev); virtio_gpu_device_realize(qdev, errp); } diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 89ee133f07..d5808f2ab6 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -277,13 +277,6 @@ int virtio_gpu_update_dmabuf(VirtIOGPU *g, struct virtio_gpu_rect *r); /* virtio-gpu-3d.c */ -void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, - struct virtio_gpu_ctrl_command *cmd); -void virtio_gpu_virgl_update_cursor(VirtIOGPU *g, struct virtio_gpu_scanout *s, - uint32_t resource_id); -void virtio_gpu_virgl_flushed(VirtIOGPUBase *b); -void virtio_gpu_virgl_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq); -void virtio_gpu_virgl_reset(VirtIODevice *vdev); void virtio_gpu_virgl_device_realize(DeviceState *qdev, Error **errp); #endif From patchwork Fri Apr 28 16:48:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gurchetan Singh X-Patchwork-Id: 1775065 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=AJa9/E+5; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q7JTz6dr9z23tZ for ; Sat, 29 Apr 2023 02:49:11 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1psRGz-0001Cw-I7; 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Fri, 28 Apr 2023 09:48:29 -0700 (PDT) Received: from gurchetansingh0.mtv.corp.google.com ([2620:15c:a7:2:fdc4:a664:d93b:43db]) by smtp.gmail.com with ESMTPSA id jf19-20020a170903269300b001a2806ae2f7sm13566796plb.83.2023.04.28.09.48.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Apr 2023 09:48:29 -0700 (PDT) From: Gurchetan Singh X-Google-Original-From: Gurchetan Singh To: qemu-devel@nongnu.org Cc: philmd@linaro.org, kraxel@redhat.com, marcandre.lureau@redhat.com, akihiko.odaki@gmail.com, dmitry.osipenko@collabora.com, ray.huang@amd.com, alex.bennee@linaro.org Subject: [PATCH v2 4/5] virtio: Add shared memory capability Date: Fri, 28 Apr 2023 09:48:22 -0700 Message-Id: <20230428164823.789-4-gurchetansingh@google.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20230428164823.789-1-gurchetansingh@google.com> References: <20230428164823.789-1-gurchetansingh@google.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=gurchetansingh@chromium.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.171, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' to allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. Signed-off-by: Dr. David Alan Gilbert Signed-off-by: Antonio Caggiano Reviewed-by: Gurchetan Singh Signed-off-by: Gurchetan Singh --- hw/virtio/virtio-pci.c | 18 ++++++++++++++++++ include/hw/virtio/virtio-pci.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 02fb84a8fa..40a798d794 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1399,6 +1399,24 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, return offset; } +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id) +{ + struct virtio_pci_cap64 cap = { + .cap.cap_len = sizeof cap, + .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, + }; + + cap.cap.bar = bar; + cap.cap.length = cpu_to_le32(length); + cap.length_hi = cpu_to_le32(length >> 32); + cap.cap.offset = cpu_to_le32(offset); + cap.offset_hi = cpu_to_le32(offset >> 32); + cap.cap.id = id; + return virtio_pci_add_mem_cap(proxy, &cap.cap); +} + static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index ab2051b64b..5a3f182f99 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -264,4 +264,8 @@ unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues); void virtio_pci_set_guest_notifier_fd_handler(VirtIODevice *vdev, VirtQueue *vq, int n, bool assign, bool with_irqfd); + +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, uint8_t bar, uint64_t offset, + uint64_t length, uint8_t id); + #endif From patchwork Fri Apr 28 16:48:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gurchetan Singh X-Patchwork-Id: 1775068 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; 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Fri, 28 Apr 2023 09:48:31 -0700 (PDT) Received: from gurchetansingh0.mtv.corp.google.com ([2620:15c:a7:2:fdc4:a664:d93b:43db]) by smtp.gmail.com with ESMTPSA id jf19-20020a170903269300b001a2806ae2f7sm13566796plb.83.2023.04.28.09.48.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Apr 2023 09:48:30 -0700 (PDT) From: Gurchetan Singh X-Google-Original-From: Gurchetan Singh To: qemu-devel@nongnu.org Cc: philmd@linaro.org, kraxel@redhat.com, marcandre.lureau@redhat.com, akihiko.odaki@gmail.com, dmitry.osipenko@collabora.com, ray.huang@amd.com, alex.bennee@linaro.org Subject: [PATCH v2 5/5] virtio-gpu: CONTEXT_INIT feature Date: Fri, 28 Apr 2023 09:48:23 -0700 Message-Id: <20230428164823.789-5-gurchetansingh@google.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20230428164823.789-1-gurchetansingh@google.com> References: <20230428164823.789-1-gurchetansingh@google.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=gurchetansingh@chromium.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.171, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Antonio Caggiano The feature can be enabled when a backend wants it. Signed-off-by: Antonio Caggiano Reviewed-by: Marc-André Lureau Signed-off-by: Gurchetan Singh Reviewed-by: Philippe Mathieu-Daudé --- hw/display/virtio-gpu-base.c | 3 +++ include/hw/virtio/virtio-gpu.h | 3 +++ 2 files changed, 6 insertions(+) diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index a29f191aa8..6c5f1f327f 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -215,6 +215,9 @@ virtio_gpu_base_get_features(VirtIODevice *vdev, uint64_t features, if (virtio_gpu_blob_enabled(g->conf)) { features |= (1 << VIRTIO_GPU_F_RESOURCE_BLOB); } + if (virtio_gpu_context_init_enabled(g->conf)) { + features |= (1 << VIRTIO_GPU_F_CONTEXT_INIT); + } return features; } diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index d5808f2ab6..cf24d2e21b 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -90,6 +90,7 @@ enum virtio_gpu_base_conf_flags { VIRTIO_GPU_FLAG_EDID_ENABLED, VIRTIO_GPU_FLAG_DMABUF_ENABLED, VIRTIO_GPU_FLAG_BLOB_ENABLED, + VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED, }; #define virtio_gpu_virgl_enabled(_cfg) \ @@ -102,6 +103,8 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) #define virtio_gpu_blob_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) +#define virtio_gpu_context_init_enabled(_cfg) \ + (_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED)) struct virtio_gpu_base_conf { uint32_t max_outputs;