From patchwork Thu Feb 16 05:17:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcin Nowakowski X-Patchwork-Id: 1743305 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=fungible.com header.i=@fungible.com header.a=rsa-sha256 header.s=google header.b=eQUH6FTH; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PHNWV6p3tz240K for ; Thu, 16 Feb 2023 16:18:14 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pSWeF-0002Hl-2t; Thu, 16 Feb 2023 00:17:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pSWeC-0002HE-Oe for qemu-devel@nongnu.org; Thu, 16 Feb 2023 00:17:32 -0500 Received: from mail-lf1-x130.google.com ([2a00:1450:4864:20::130]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pSWeB-0002yc-4X for qemu-devel@nongnu.org; Thu, 16 Feb 2023 00:17:32 -0500 Received: by mail-lf1-x130.google.com with SMTP id w11so1354797lfu.11 for ; Wed, 15 Feb 2023 21:17:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fungible.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=N4CyYFlQ9lJnVulTLeH6Vug8QJSqq38HI4xXOKNMb/s=; b=eQUH6FTH8oASifbVNJSWTCM1qU51eSOaJgp6QBcJgujfUr1899rm7qMD2YxXtVU4R7 l+/85jxbB8TmxjsIjmUAX2U5M6JFjjnQOuKNzEU4SY3v0hB9CWuUrWAtjnEHi0DiuoOF eFlryNIsvVkrjlQNXRi4Xv+jduxLgC80xqmqg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=N4CyYFlQ9lJnVulTLeH6Vug8QJSqq38HI4xXOKNMb/s=; b=IFVvUc61tqjb95RwXO2AxhESsOOjhLQkdQxXkf79QQ8s954H6ij8bLsqogLK/uURoQ xVl2UlM7oKnyqGdM4G9xes38IMrZ0jQQ/0uJfTcZA/C3cAMB7H13xmT+rshXWEShVcFs MJHRmbOR9Yu7AErHyneEar/3SObug1lEnzDE+gLZMMo0wmYYbxB5OzC5CmLH+AAIKQaA UiParF1yGXgXfJ2dJdNbZyLUoKIUNtsdo1ylVYV/Nm4CNqwHlorH2wjbDbo6ko8UphpM Sut1+0RE0emM5yw+Y2lkuR2223zGcChzPCkIr2NeGi7EmbGyHZz2R1pAEd4FcyBNU2KX ZNeQ== X-Gm-Message-State: AO0yUKUdY0UCfo2JgRBGDUtoag7/0KeNWwMZpAKHzxLXneyisSAJlTtf f5o3w3QUTTULLVVch7/qPEmet7D14Ywf/Zxp X-Google-Smtp-Source: AK7set8h4Cq9p0HxrUZUMS0JcKK1Pm2MS2BhjV10w4kTIM0Tyn5C179ytr4uNjv3RnlwRrdlahHHdQ== X-Received: by 2002:ac2:42c2:0:b0:4b6:f51e:b8b6 with SMTP id n2-20020ac242c2000000b004b6f51eb8b6mr1007707lfl.56.1676524649144; Wed, 15 Feb 2023 21:17:29 -0800 (PST) Received: from WR-NOWAKOWSKI.fungible.local (77-255-255-121.adsl.inetia.pl. [77.255.255.121]) by smtp.gmail.com with ESMTPSA id s1-20020a19ad41000000b004b7033da2d7sm141278lfd.128.2023.02.15.21.17.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Feb 2023 21:17:28 -0800 (PST) From: Marcin Nowakowski To: qemu-devel@nongnu.org Cc: marcin.nowakowski@fungible.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Richard Henderson Subject: [PATCH v2 1/4] target/mips: fix JALS32/J32 instruction handling for microMIPS Date: Thu, 16 Feb 2023 06:17:14 +0100 Message-Id: <20230216051717.3911212-2-marcin.nowakowski@fungible.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230216051717.3911212-1-marcin.nowakowski@fungible.com> References: <20230216051717.3911212-1-marcin.nowakowski@fungible.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=marcin.nowakowski@fungible.com; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org microMIPS J & JAL instructions perform a jump in a 128MB region and 5 top bits of the address need to be preserved. This is different behavior compared to standard mips systems, where the jump is executed within a 256MB region. Note that microMIPS32 instruction set documentation appears to have inconsistent information regarding JALX32 instruction - it is written in the doc that: "To execute a procedure call within the current 256 MB-aligned region (...) The low 26 bits of the target address is the target field shifted left 2 bits." But the target address is already 26 bits. Moreover, the operation description indicates that 28 bits are copied, so the statement about use of 26 bits is _most likely_ incorrect and the corresponding code remains the same as for standard mips instruction set. Signed-off-by: Marcin Nowakowski Reviewed-by: Richard Henderson --- target/mips/tcg/translate.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 624e6b7786..567ca11ccf 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -4917,6 +4917,13 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, break; case OPC_J: case OPC_JAL: + { + /* Jump to immediate */ + int jal_mask = ctx->hflags & MIPS_HFLAG_M16 ? 0xF8000000 : 0xF0000000; + btgt = ((ctx->base.pc_next + insn_bytes) & jal_mask) | + (uint32_t)offset; + break; + } case OPC_JALX: /* Jump to immediate */ btgt = ((ctx->base.pc_next + insn_bytes) & (int32_t)0xF0000000) | From patchwork Thu Feb 16 05:17:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Marcin Nowakowski X-Patchwork-Id: 1743308 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=fungible.com header.i=@fungible.com header.a=rsa-sha256 header.s=google header.b=BI9q75/+; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PHNWc5DPwz23yD for ; Thu, 16 Feb 2023 16:18:20 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pSWeG-0002IC-3r; Thu, 16 Feb 2023 00:17:36 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pSWeD-0002Hc-Q5 for qemu-devel@nongnu.org; Thu, 16 Feb 2023 00:17:33 -0500 Received: from mail-lf1-x131.google.com ([2a00:1450:4864:20::131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pSWeC-0002z0-8a for qemu-devel@nongnu.org; Thu, 16 Feb 2023 00:17:33 -0500 Received: by mail-lf1-x131.google.com with SMTP id j17so1411634lfr.3 for ; Wed, 15 Feb 2023 21:17:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fungible.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YJpoJan2rSCcRgdqx81gLTcIRZ83+AP6IzlPgi+QAhI=; b=BI9q75/+1jk0R0k7rBAfBtwChZKD3jzfVvvmkb7gxxVu9Rg8zruvjQNJxF6WE0sbtN Q98zax+3loArPkfTSuQnF7GLPFsdlI02djmZvlqsoJaDMf7gIHxCTe0qIxCsofmIHOVs N70o1Efvy/DjryzdYOWMZB74mOAbL1vPdY//A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YJpoJan2rSCcRgdqx81gLTcIRZ83+AP6IzlPgi+QAhI=; b=dr1rGDJHSI3RulHch5rmjKLQho5MQBzaojuH/E089k0kvHc00rQtEQ4ye3+reAol32 XcsaPs3BIcGTv1Ea+tZqgSzf4fJbBI6r0zRTXD3hl977bRdo6xPTb2tzFrK9uy6NnpWr MD2qukR8TEqT4S7o4ZjxyMShBHI7RV0EeYtS33bwSj0g2e40dPWSXccnWre0ZDXo1JIg Djb4QHN5IstXwm5CxRG+o+k1iAfpqNQDw7IaRnPK8PmNGhYhoaGcKabF1y5xcbJNPGgc Dyr0oV9g6oESSFHPzzE1Lsq2okh0pUUO2X/EZPLOsu2R0n1tvIsbe+SR4g43f8R4vIx4 mR1g== X-Gm-Message-State: AO0yUKWy4ZLk6hmFuAlXI8AEg8dxSlO91fIuiIsb+nltuzvzCDmK0bsp Ku9/pWvOCX4nLZHWMPWBHKI8aO3lIG7vk4oh X-Google-Smtp-Source: AK7set8iii4LC1X9i6jM4K1FAfO1oKyPAyxWGA+DGqEV99WksOWwDvXoxL3Q3xSpIGvk0Pqqi4JpCg== X-Received: by 2002:a19:f505:0:b0:4d5:9682:6ec6 with SMTP id j5-20020a19f505000000b004d596826ec6mr1486460lfb.18.1676524650242; Wed, 15 Feb 2023 21:17:30 -0800 (PST) Received: from WR-NOWAKOWSKI.fungible.local (77-255-255-121.adsl.inetia.pl. [77.255.255.121]) by smtp.gmail.com with ESMTPSA id s1-20020a19ad41000000b004b7033da2d7sm141278lfd.128.2023.02.15.21.17.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Feb 2023 21:17:29 -0800 (PST) From: Marcin Nowakowski To: qemu-devel@nongnu.org Cc: marcin.nowakowski@fungible.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo Subject: [PATCH v2 2/4] target/mips: fix SWM32 handling for micromips Date: Thu, 16 Feb 2023 06:17:15 +0100 Message-Id: <20230216051717.3911212-3-marcin.nowakowski@fungible.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230216051717.3911212-1-marcin.nowakowski@fungible.com> References: <20230216051717.3911212-1-marcin.nowakowski@fungible.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::131; envelope-from=marcin.nowakowski@fungible.com; helo=mail-lf1-x131.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org SWM32 should store a sequence of 32-bit words from the GPRs, but it was incorrectly coded to store 16-bit words only. As a result, an LWM32 that usually follows would restore invalid register values. Fixes: 7dd547e5ab ("target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX") Signed-off-by: Marcin Nowakowski Reviewed-by: Philippe Mathieu-Daudé --- target/mips/tcg/ldst_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c index d0bd0267b2..c1a8380e34 100644 --- a/target/mips/tcg/ldst_helper.c +++ b/target/mips/tcg/ldst_helper.c @@ -248,14 +248,14 @@ void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, target_ulong i; for (i = 0; i < base_reglist; i++) { - cpu_stw_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], + cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], mem_idx, GETPC()); addr += 4; } } if (do_r31) { - cpu_stw_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); + cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); } } From patchwork Thu Feb 16 05:17:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Marcin Nowakowski X-Patchwork-Id: 1743309 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=fungible.com header.i=@fungible.com header.a=rsa-sha256 header.s=google header.b=NrvpjH1w; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PHNWw5l12z23yD for ; Thu, 16 Feb 2023 16:18:36 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pSWeG-0002IV-M9; Thu, 16 Feb 2023 00:17:36 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pSWeF-0002Hn-7k for qemu-devel@nongnu.org; Thu, 16 Feb 2023 00:17:35 -0500 Received: from mail-lf1-x12b.google.com ([2a00:1450:4864:20::12b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pSWeD-0002zH-Bd for qemu-devel@nongnu.org; Thu, 16 Feb 2023 00:17:34 -0500 Received: by mail-lf1-x12b.google.com with SMTP id y25so1372616lfa.9 for ; Wed, 15 Feb 2023 21:17:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fungible.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=v/mhdnoI8V3zPJb7Pp3bfWPtRM6qlhJB1hb2CGMA88s=; b=NrvpjH1wqaKaFVSmvKXk2+cF6Cg41RgdJnMf+XUvaLUsugmLvyl1VUuhfFA39Yyhpc lmJ1wnkJP5GZQ9Yeb6M3D5YGmQlZIvb3mDRvEl9Rln0A5XszD1NLY7EBHwkEFHl64voj VXe4SWd3fkVUSHdSUJc74n/sLb90yNaGjz7jc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=v/mhdnoI8V3zPJb7Pp3bfWPtRM6qlhJB1hb2CGMA88s=; b=agyEmorRDdT3GJVdEwbBFUu0Bytk1OxRL37Oz+b+nPVc5sVnFdWx/I/yrKjGFqsWJv G9ZLGHIRioe/dzmDUt6x5JG+LtNLm4Ei0RQNacZJa1ZoZCpz7m5J1RKLuDe24d1ohcYJ tGNMKd9u82g0Y/15BZfSNIc2DSv8xIOtJjXikBsEWAN/Nl/zDZUvhPtIk0LB2ON1ye+D IF8PVbXGRr80inl09CwyvVB7br7ml4vISjnZ5tvYWDJwm+bAAxpWIH8mnoADaa9UIzQE +Xelfc9dqn7ujZ2CFKdIRSQsz53R9hEj3VO0fNEAqEK+0fORZ1e6jK9H/7SCRUvhmkYO pEug== X-Gm-Message-State: AO0yUKU6d2JC+OG8vnLQdYVpiK/USmsStLvtU6wcVVBKpjInED6C+knS yKVVmG7d313aWSsUYQSYXeu6Zv/136JdjH3N X-Google-Smtp-Source: AK7set8Fskt98IQpmAC0ShRWmP9ldQqzDG6712h6zLiMQkkVlH4uOdXCepVZChYjhNt/c1ajwq6Evg== X-Received: by 2002:ac2:5395:0:b0:4a4:68b7:e71c with SMTP id g21-20020ac25395000000b004a468b7e71cmr1090074lfh.6.1676524651395; Wed, 15 Feb 2023 21:17:31 -0800 (PST) Received: from WR-NOWAKOWSKI.fungible.local (77-255-255-121.adsl.inetia.pl. [77.255.255.121]) by smtp.gmail.com with ESMTPSA id s1-20020a19ad41000000b004b7033da2d7sm141278lfd.128.2023.02.15.21.17.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Feb 2023 21:17:30 -0800 (PST) From: Marcin Nowakowski To: qemu-devel@nongnu.org Cc: marcin.nowakowski@fungible.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo Subject: [PATCH v2 3/4] target/mips: implement CP0.Config7.WII bit support Date: Thu, 16 Feb 2023 06:17:16 +0100 Message-Id: <20230216051717.3911212-4-marcin.nowakowski@fungible.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230216051717.3911212-1-marcin.nowakowski@fungible.com> References: <20230216051717.3911212-1-marcin.nowakowski@fungible.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12b; envelope-from=marcin.nowakowski@fungible.com; helo=mail-lf1-x12b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Some pre-release 6 cores use CP0.Config7.WII bit to indicate that a disabled interrupt should wake up a sleeping CPU. Enable this bit by default for M14K(c) and P5600. There are potentially other cores that support this feature, but I do not have a complete list. Signed-off-by: Marcin Nowakowski Reviewed-by: Philippe Mathieu-Daudé --- target/mips/cpu-defs.c.inc | 3 +++ target/mips/cpu.c | 6 ++++-- target/mips/cpu.h | 1 + 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index 480e60aeec..fdde04dfb9 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -333,6 +333,7 @@ const mips_def_t mips_defs[] = .CP0_Config1 = MIPS_CONFIG1, .CP0_Config2 = MIPS_CONFIG2, .CP0_Config3 = MIPS_CONFIG3 | (0x2 << CP0C3_ISA) | (1 << CP0C3_VInt), + .CP0_Config7 = 1 << CP0C7_WII, .CP0_LLAddr_rw_bitmask = 0, .CP0_LLAddr_shift = 4, .SYNCI_Step = 32, @@ -354,6 +355,7 @@ const mips_def_t mips_defs[] = (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA), .CP0_Config2 = MIPS_CONFIG2, .CP0_Config3 = MIPS_CONFIG3 | (0x2 << CP0C3_ISA) | (0 << CP0C3_VInt), + .CP0_Config7 = 1 << CP0C7_WII, .CP0_LLAddr_rw_bitmask = 0, .CP0_LLAddr_shift = 4, .SYNCI_Step = 32, @@ -392,6 +394,7 @@ const mips_def_t mips_defs[] = .CP0_Config5_rw_bitmask = (1 << CP0C5_K) | (1 << CP0C5_CV) | (1 << CP0C5_MSAEn) | (1 << CP0C5_UFE) | (1 << CP0C5_FRE) | (1 << CP0C5_UFR), + .CP0_Config7 = 1 << CP0C7_WII, .CP0_LLAddr_rw_bitmask = 0, .CP0_LLAddr_shift = 0, .SYNCI_Step = 32, diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 7a565466cb..7ba359696f 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -144,12 +144,14 @@ static bool mips_cpu_has_work(CPUState *cs) /* * Prior to MIPS Release 6 it is implementation dependent if non-enabled * interrupts wake-up the CPU, however most of the implementations only - * check for interrupts that can be taken. + * check for interrupts that can be taken. For pre-release 6 CPUs, + * check for CP0 Config7 'Wait IE ignore' bit. */ if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && cpu_mips_hw_interrupts_pending(env)) { if (cpu_mips_hw_interrupts_enabled(env) || - (env->insn_flags & ISA_MIPS_R6)) { + (env->insn_flags & ISA_MIPS_R6) || + (env->CP0_Config7 & (1 << CP0C7_WII))) { has_work = true; } } diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 0a085643a3..abee7a99d7 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -980,6 +980,7 @@ typedef struct CPUArchState { #define CP0C6_DATAPREF 0 int32_t CP0_Config7; int64_t CP0_Config7_rw_bitmask; +#define CP0C7_WII 31 #define CP0C7_NAPCGEN 2 #define CP0C7_UNIMUEN 1 #define CP0C7_VFPUCGEN 0 From patchwork Thu Feb 16 05:17:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Marcin Nowakowski X-Patchwork-Id: 1743310 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=fungible.com header.i=@fungible.com header.a=rsa-sha256 header.s=google header.b=C3QBo0Si; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PHNX06dFnz23yD for ; Thu, 16 Feb 2023 16:18:40 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pSWeI-0002JB-8J; Thu, 16 Feb 2023 00:17:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pSWeG-0002IU-Kl for qemu-devel@nongnu.org; Thu, 16 Feb 2023 00:17:36 -0500 Received: from mail-lf1-x136.google.com ([2a00:1450:4864:20::136]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pSWeE-0002zd-US for qemu-devel@nongnu.org; Thu, 16 Feb 2023 00:17:36 -0500 Received: by mail-lf1-x136.google.com with SMTP id g28so1462181lfv.0 for ; Wed, 15 Feb 2023 21:17:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fungible.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XMlkMTz7ZJfnoghF2v1XErS4DvexjjXA3x7/KGncEGY=; b=C3QBo0Si6FXpW70JrVtmvlvAN30bQ19K8CzoT/fZZpaNdd7HHY/Bfruedj72DlSHQ0 iUulksWpXXxK3pLMJPfwxAVXMKu660/hukLTKr/N9WvUCxeBF5FF+2RsSm+A/xn+9kqk 18HZEW9n2bKOydWMCYSFSYAHW9SSv6zO+20EU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XMlkMTz7ZJfnoghF2v1XErS4DvexjjXA3x7/KGncEGY=; b=C5Rc4piOoIWXmLoT0bjOsaAkclVMaHHwgcOpJIeOccgPha1pJaX3q0OG7VPXA1XwEX wwq2VFhbBRmjYbLG1/zlCxBTDvQFYxXj8QpoTChAduxa5Pxu9wuAFaq31GrMdlvv1U4K 5WLDLKZlSxX/9jzU+1sYTzzuzhV/m7Uragt4qEvXBX83aSHtuyxDQmC/iq5cXkSzbh8I uE9FnM9frEBj4igiwdmoc/pei5Rjv793WjqG4ksPM2fGnGL4eIcbIEOZZm5p/Rghj2DG Ih41wrXKotMnnUBjySJ4eXK/KqA9ScjGdU7TvLEcKSa6DkYXldVJJYKWjr5XIjBTkRwV 6TfQ== X-Gm-Message-State: AO0yUKWpK3yAymLIpR7yBs4C3OzPwc/SLhE4yvnrQsCkkVDvM2fQdls6 X/n0eJ93NIO46vMDh1er0k+cp41a4JevkK1z X-Google-Smtp-Source: AK7set/xZSP3gDgTtxUhdAMxp7dVZZvxz2MIP571qpNupQqNZnybraodO9ZCGxnDjvbHC9RVU5/U4g== X-Received: by 2002:ac2:4219:0:b0:4cb:28b4:b415 with SMTP id y25-20020ac24219000000b004cb28b4b415mr1060446lfh.34.1676524652933; Wed, 15 Feb 2023 21:17:32 -0800 (PST) Received: from WR-NOWAKOWSKI.fungible.local (77-255-255-121.adsl.inetia.pl. [77.255.255.121]) by smtp.gmail.com with ESMTPSA id s1-20020a19ad41000000b004b7033da2d7sm141278lfd.128.2023.02.15.21.17.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Feb 2023 21:17:32 -0800 (PST) From: Marcin Nowakowski To: qemu-devel@nongnu.org Cc: marcin.nowakowski@fungible.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo Subject: [PATCH v2 4/4] target/mips: set correct CP0.Config[4, 5] values for M14K(c) Date: Thu, 16 Feb 2023 06:17:17 +0100 Message-Id: <20230216051717.3911212-5-marcin.nowakowski@fungible.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230216051717.3911212-1-marcin.nowakowski@fungible.com> References: <20230216051717.3911212-1-marcin.nowakowski@fungible.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::136; envelope-from=marcin.nowakowski@fungible.com; helo=mail-lf1-x136.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Marcin Nowakowski Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé --- target/mips/cpu-defs.c.inc | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index fdde04dfb9..d45f245a67 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -332,7 +332,10 @@ const mips_def_t mips_defs[] = (0x1 << CP0C0_AR) | (MMU_TYPE_FMT << CP0C0_MT), .CP0_Config1 = MIPS_CONFIG1, .CP0_Config2 = MIPS_CONFIG2, - .CP0_Config3 = MIPS_CONFIG3 | (0x2 << CP0C3_ISA) | (1 << CP0C3_VInt), + .CP0_Config3 = MIPS_CONFIG3 | (0x2 << CP0C3_ISA) | (1 << CP0C3_VInt) | + (1 << CP0C3_M), + .CP0_Config4 = MIPS_CONFIG4 | (1 << CP0C4_M), + .CP0_Config5 = MIPS_CONFIG5 | (1 << CP0C5_NFExists), .CP0_Config7 = 1 << CP0C7_WII, .CP0_LLAddr_rw_bitmask = 0, .CP0_LLAddr_shift = 4, @@ -354,7 +357,10 @@ const mips_def_t mips_defs[] = (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA), .CP0_Config2 = MIPS_CONFIG2, - .CP0_Config3 = MIPS_CONFIG3 | (0x2 << CP0C3_ISA) | (0 << CP0C3_VInt), + .CP0_Config3 = MIPS_CONFIG3 | (0x2 << CP0C3_ISA) | (0 << CP0C3_VInt) | + (1 << CP0C3_M), + .CP0_Config4 = MIPS_CONFIG4 | (1 << CP0C4_M), + .CP0_Config5 = MIPS_CONFIG5 | (1 << CP0C5_NFExists), .CP0_Config7 = 1 << CP0C7_WII, .CP0_LLAddr_rw_bitmask = 0, .CP0_LLAddr_shift = 4,